drivers/hwmon/coretemp.c

   1 /*
   2  * coretemp.c - Linux kernel module for hardware monitoring
   3  *
   4  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
   5  *
   6  * Inspired from many hwmon drivers
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20  * 02110-1301 USA.
  21  */
  22
  23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <linux/slab.h>
  28 #include <linux/jiffies.h>
  29 #include <linux/hwmon.h>
  30 #include <linux/sysfs.h>
  31 #include <linux/hwmon-sysfs.h>
  32 #include <linux/err.h>
  33 #include <linux/mutex.h>
  34 #include <linux/list.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/cpu.h>
  37 #include <linux/pci.h>
  38 #include <linux/smp.h>
  39 #include <linux/moduleparam.h>
  40 #include <asm/msr.h>
  41 #include <asm/processor.h>
  42 #include <asm/cpu_device_id.h>
  43
  44 #define DRVNAME "coretemp"
  45
  46 /*
  47  * force_tjmax only matters when TjMax can't be read from the CPU itself.
  48  * When set, it replaces the driver's suboptimal heuristic.
  49  */
  50 static int force_tjmax;
  51 module_param_named(tjmax, force_tjmax, int, 0444);
  52 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
  53
  54 #define BASE_SYSFS_ATTR_NO      2       /* Sysfs Base attr no for coretemp */
  55 #define NUM_REAL_CORES          32      /* Number of Real cores per cpu */
  56 #define CORETEMP_NAME_LENGTH    17      /* String Length of attrs */
  57 #define MAX_CORE_ATTRS          4       /* Maximum no of basic attrs */
  58 #define TOTAL_ATTRS             (MAX_CORE_ATTRS + 1)
  59 #define MAX_CORE_DATA           (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
  60
  61 #define TO_PHYS_ID(cpu)         (cpu_data(cpu).phys_proc_id)
  62 #define TO_CORE_ID(cpu)         (cpu_data(cpu).cpu_core_id)
  63 #define TO_ATTR_NO(cpu)         (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
  64
  65 #ifdef CONFIG_SMP
  66 #define for_each_sibling(i, cpu)        for_each_cpu(i, cpu_sibling_mask(cpu))
  67 #else
  68 #define for_each_sibling(i, cpu)        for (i = 0; false; )
  69 #endif
  70
  71 /*
  72  * Per-Core Temperature Data
  73  * @last_updated: The time when the current temperature value was updated
  74  *              earlier (in jiffies).
  75  * @cpu_core_id: The CPU Core from which temperature values should be read
  76  *              This value is passed as "id" field to rdmsr/wrmsr functions.
  77  * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
  78  *              from where the temperature values should be read.
  79  * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
  80  * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
  81  *              Otherwise, temp_data holds coretemp data.
  82  * @valid: If this is 1, the current temperature is valid.
  83  */
  84 struct temp_data {
  85         int temp;
  86         int ttarget;
  87         int tjmax;
  88         unsigned long last_updated;
  89         unsigned int cpu;
  90         u32 cpu_core_id;
  91         u32 status_reg;
  92         int attr_size;
  93         bool is_pkg_data;
  94         bool valid;
  95         struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
  96         char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
  97         struct mutex update_lock;
  98 };
  99
 100 /* Platform Data per Physical CPU */
 101 struct platform_data {
 102         struct device *hwmon_dev;
 103         u16 phys_proc_id;
 104         struct temp_data *core_data[MAX_CORE_DATA];
 105         struct device_attribute name_attr;
 106 };
 107
 108 struct pdev_entry {
 109         struct list_head list;
 110         struct platform_device *pdev;
 111         u16 phys_proc_id;
 112 };
 113
 114 static LIST_HEAD(pdev_list);
 115 static DEFINE_MUTEX(pdev_list_mutex);
 116
 117 static ssize_t show_name(struct device *dev,
 118                         struct device_attribute *devattr, char *buf)
 119 {
 120         return sprintf(buf, "%s\n", DRVNAME);
 121 }
 122
 123 static ssize_t show_label(struct device *dev,
 124                                 struct device_attribute *devattr, char *buf)
 125 {
 126         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 127         struct platform_data *pdata = dev_get_drvdata(dev);
 128         struct temp_data *tdata = pdata->core_data[attr->index];
 129
 130         if (tdata->is_pkg_data)
 131                 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
 132
 133         return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
 134 }
 135
 136 static ssize_t show_crit_alarm(struct device *dev,
 137                                 struct device_attribute *devattr, char *buf)
 138 {
 139         u32 eax, edx;
 140         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 141         struct platform_data *pdata = dev_get_drvdata(dev);
 142         struct temp_data *tdata = pdata->core_data[attr->index];
 143
 144         rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
 145
 146         return sprintf(buf, "%d\n", (eax >> 5) & 1);
 147 }
 148
 149 static ssize_t show_tjmax(struct device *dev,
 150                         struct device_attribute *devattr, char *buf)
 151 {
 152         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 153         struct platform_data *pdata = dev_get_drvdata(dev);
 154
 155         return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
 156 }
 157
 158 static ssize_t show_ttarget(struct device *dev,
 159                                 struct device_attribute *devattr, char *buf)
 160 {
 161         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 162         struct platform_data *pdata = dev_get_drvdata(dev);
 163
 164         return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
 165 }
 166
 167 static ssize_t show_temp(struct device *dev,
 168                         struct device_attribute *devattr, char *buf)
 169 {
 170         u32 eax, edx;
 171         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 172         struct platform_data *pdata = dev_get_drvdata(dev);
 173         struct temp_data *tdata = pdata->core_data[attr->index];
 174
 175         mutex_lock(&tdata->update_lock);
 176
 177         /* Check whether the time interval has elapsed */
 178         if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
 179                 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
 180                 tdata->valid = 0;
 181                 /* Check whether the data is valid */
 182                 if (eax & 0x80000000) {
 183                         tdata->temp = tdata->tjmax -
 184                                         ((eax >> 16) & 0x7f) * 1000;
 185                         tdata->valid = 1;
 186                 }
 187                 tdata->last_updated = jiffies;
 188         }
 189
 190         mutex_unlock(&tdata->update_lock);
 191         return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
 192 }
 193
 194 struct tjmax {
 195         char const *id;
 196         int tjmax;
 197 };
 198
 199 static const struct tjmax __cpuinitconst tjmax_table[] = {
 200         { "CPU D410", 100000 },
 201         { "CPU D425", 100000 },
 202         { "CPU D510", 100000 },
 203         { "CPU D525", 100000 },
 204         { "CPU N450", 100000 },
 205         { "CPU N455", 100000 },
 206         { "CPU N470", 100000 },
 207         { "CPU N475", 100000 },
 208         { "CPU  230", 100000 },         /* Model 0x1c, stepping 2       */
 209         { "CPU  330", 125000 },         /* Model 0x1c, stepping 2       */
 210         { "CPU CE4110", 110000 },       /* Model 0x1c, stepping 10      */
 211         { "CPU CE4150", 110000 },       /* Model 0x1c, stepping 10      */
 212         { "CPU CE4170", 110000 },       /* Model 0x1c, stepping 10      */
 213 };
 214
 215 static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
 216                                   struct device *dev)
 217 {
 218         /* The 100C is default for both mobile and non mobile CPUs */
 219
 220         int tjmax = 100000;
 221         int tjmax_ee = 85000;
 222         int usemsr_ee = 1;
 223         int err;
 224         u32 eax, edx;
 225         struct pci_dev *host_bridge;
 226         int i;
 227
 228         /* explicit tjmax table entries override heuristics */
 229         for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
 230                 if (strstr(c->x86_model_id, tjmax_table[i].id))
 231                         return tjmax_table[i].tjmax;
 232         }
 233
 234         /* Early chips have no MSR for TjMax */
 235
 236         if (c->x86_model == 0xf && c->x86_mask < 4)
 237                 usemsr_ee = 0;
 238
 239         /* Atom CPUs */
 240
 241         if (c->x86_model == 0x1c || c->x86_model == 0x26
 242             || c->x86_model == 0x27) {
 243                 usemsr_ee = 0;
 244
 245                 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
 246
 247                 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
 248                     && (host_bridge->device == 0xa000   /* NM10 based nettop */
 249                     || host_bridge->device == 0xa010))  /* NM10 based netbook */
 250                         tjmax = 100000;
 251                 else
 252                         tjmax = 90000;
 253
 254                 pci_dev_put(host_bridge);
 255         } else if (c->x86_model == 0x36) {
 256                 usemsr_ee = 0;
 257                 tjmax = 100000;
 258         }
 259
 260         if (c->x86_model > 0xe && usemsr_ee) {
 261                 u8 platform_id;
 262
 263                 /*
 264                  * Now we can detect the mobile CPU using Intel provided table
 265                  * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
 266                  * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
 267                  */
 268                 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
 269                 if (err) {
 270                         dev_warn(dev,
 271                                  "Unable to access MSR 0x17, assuming desktop"
 272                                  " CPU\n");
 273                         usemsr_ee = 0;
 274                 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
 275                         /*
 276                          * Trust bit 28 up to Penryn, I could not find any
 277                          * documentation on that; if you happen to know
 278                          * someone at Intel please ask
 279                          */
 280                         usemsr_ee = 0;
 281                 } else {
 282                         /* Platform ID bits 52:50 (EDX starts at bit 32) */
 283                         platform_id = (edx >> 18) & 0x7;
 284
 285                         /*
 286                          * Mobile Penryn CPU seems to be platform ID 7 or 5
 287                          * (guesswork)
 288                          */
 289                         if (c->x86_model == 0x17 &&
 290                             (platform_id == 5 || platform_id == 7)) {
 291                                 /*
 292                                  * If MSR EE bit is set, set it to 90 degrees C,
 293                                  * otherwise 105 degrees C
 294                                  */
 295                                 tjmax_ee = 90000;
 296                                 tjmax = 105000;
 297                         }
 298                 }
 299         }
 300
 301         if (usemsr_ee) {
 302                 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
 303                 if (err) {
 304                         dev_warn(dev,
 305                                  "Unable to access MSR 0xEE, for Tjmax, left"
 306                                  " at default\n");
 307                 } else if (eax & 0x40000000) {
 308                         tjmax = tjmax_ee;
 309                 }
 310         } else if (tjmax == 100000) {
 311                 /*
 312                  * If we don't use msr EE it means we are desktop CPU
 313                  * (with exeception of Atom)
 314                  */
 315                 dev_warn(dev, "Using relative temperature scale!\n");
 316         }
 317
 318         return tjmax;
 319 }
 320
 321 static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
 322                                struct device *dev)
 323 {
 324         int err;
 325         u32 eax, edx;
 326         u32 val;
 327
 328         /*
 329          * A new feature of current Intel(R) processors, the
 330          * IA32_TEMPERATURE_TARGET contains the TjMax value
 331          */
 332         err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
 333         if (err) {
 334                 if (c->x86_model > 0xe && c->x86_model != 0x1c)
 335                         dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
 336         } else {
 337                 val = (eax >> 16) & 0xff;
 338                 /*
 339                  * If the TjMax is not plausible, an assumption
 340                  * will be used
 341                  */
 342                 if (val) {
 343                         dev_dbg(dev, "TjMax is %d degrees C\n", val);
 344                         return val * 1000;
 345                 }
 346         }
 347
 348         if (force_tjmax) {
 349                 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
 350                            force_tjmax);
 351                 return force_tjmax * 1000;
 352         }
 353
 354         /*
 355          * An assumption is made for early CPUs and unreadable MSR.
 356          * NOTE: the calculated value may not be correct.
 357          */
 358         return adjust_tjmax(c, id, dev);
 359 }
 360
 361 static int create_name_attr(struct platform_data *pdata,
 362                                       struct device *dev)
 363 {
 364         sysfs_attr_init(&pdata->name_attr.attr);
 365         pdata->name_attr.attr.name = "name";
 366         pdata->name_attr.attr.mode = S_IRUGO;
 367         pdata->name_attr.show = show_name;
 368         return device_create_file(dev, &pdata->name_attr);
 369 }
 370
 371 static int __cpuinit create_core_attrs(struct temp_data *tdata,
 372                                        struct device *dev, int attr_no)
 373 {
 374         int err, i;
 375         static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
 376                         struct device_attribute *devattr, char *buf) = {
 377                         show_label, show_crit_alarm, show_temp, show_tjmax,
 378                         show_ttarget };
 379         static const char *const names[TOTAL_ATTRS] = {
 380                                         "temp%d_label", "temp%d_crit_alarm",
 381                                         "temp%d_input", "temp%d_crit",
 382                                         "temp%d_max" };
 383
 384         for (i = 0; i < tdata->attr_size; i++) {
 385                 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
 386                         attr_no);
 387                 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
 388                 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
 389                 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
 390                 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
 391                 tdata->sd_attrs[i].index = attr_no;
 392                 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
 393                 if (err)
 394                         goto exit_free;
 395         }
 396         return 0;
 397
 398 exit_free:
 399         while (--i >= 0)
 400                 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
 401         return err;
 402 }
 403
 404
 405 static int __cpuinit chk_ucode_version(unsigned int cpu)
 406 {
 407         struct cpuinfo_x86 *c = &cpu_data(cpu);
 408
 409         /*
 410          * Check if we have problem with errata AE18 of Core processors:
 411          * Readings might stop update when processor visited too deep sleep,
 412          * fixed for stepping D0 (6EC).
 413          */
 414         if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
 415                 pr_err("Errata AE18 not fixed, update BIOS or "
 416                        "microcode of the CPU!\n");
 417                 return -ENODEV;
 418         }
 419         return 0;
 420 }
 421
 422 static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
 423 {
 424         u16 phys_proc_id = TO_PHYS_ID(cpu);
 425         struct pdev_entry *p;
 426
 427         mutex_lock(&pdev_list_mutex);
 428
 429         list_for_each_entry(p, &pdev_list, list)
 430                 if (p->phys_proc_id == phys_proc_id) {
 431                         mutex_unlock(&pdev_list_mutex);
 432                         return p->pdev;
 433                 }
 434
 435         mutex_unlock(&pdev_list_mutex);
 436         return NULL;
 437 }
 438
 439 static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
 440                                                   int pkg_flag)
 441 {
 442         struct temp_data *tdata;
 443
 444         tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
 445         if (!tdata)
 446                 return NULL;
 447
 448         tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
 449                                                         MSR_IA32_THERM_STATUS;
 450         tdata->is_pkg_data = pkg_flag;
 451         tdata->cpu = cpu;
 452         tdata->cpu_core_id = TO_CORE_ID(cpu);
 453         tdata->attr_size = MAX_CORE_ATTRS;
 454         mutex_init(&tdata->update_lock);
 455         return tdata;
 456 }
 457
 458 static int __cpuinit create_core_data(struct platform_device *pdev,
 459                                 unsigned int cpu, int pkg_flag)
 460 {
 461         struct temp_data *tdata;
 462         struct platform_data *pdata = platform_get_drvdata(pdev);
 463         struct cpuinfo_x86 *c = &cpu_data(cpu);
 464         u32 eax, edx;
 465         int err, attr_no;
 466
 467         /*
 468          * Find attr number for sysfs:
 469          * We map the attr number to core id of the CPU
 470          * The attr number is always core id + 2
 471          * The Pkgtemp will always show up as temp1_*, if available
 472          */
 473         attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
 474
 475         if (attr_no > MAX_CORE_DATA - 1)
 476                 return -ERANGE;
 477
 478         /*
 479          * Provide a single set of attributes for all HT siblings of a core
 480          * to avoid duplicate sensors (the processor ID and core ID of all
 481          * HT siblings of a core are the same).
 482          * Skip if a HT sibling of this core is already registered.
 483          * This is not an error.
 484          */
 485         if (pdata->core_data[attr_no] != NULL)
 486                 return 0;
 487
 488         tdata = init_temp_data(cpu, pkg_flag);
 489         if (!tdata)
 490                 return -ENOMEM;
 491
 492         /* Test if we can access the status register */
 493         err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
 494         if (err)
 495                 goto exit_free;
 496
 497         /* We can access status register. Get Critical Temperature */
 498         tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
 499
 500         /*
 501          * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
 502          * The target temperature is available on older CPUs but not in this
 503          * register. Atoms don't have the register at all.
 504          */
 505         if (c->x86_model > 0xe && c->x86_model != 0x1c) {
 506                 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
 507                                         &eax, &edx);
 508                 if (!err) {
 509                         tdata->ttarget
 510                           = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
 511                         tdata->attr_size++;
 512                 }
 513         }
 514
 515         pdata->core_data[attr_no] = tdata;
 516
 517         /* Create sysfs interfaces */
 518         err = create_core_attrs(tdata, &pdev->dev, attr_no);
 519         if (err)
 520                 goto exit_free;
 521
 522         return 0;
 523 exit_free:
 524         pdata->core_data[attr_no] = NULL;
 525         kfree(tdata);
 526         return err;
 527 }
 528
 529 static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
 530 {
 531         struct platform_device *pdev = coretemp_get_pdev(cpu);
 532         int err;
 533
 534         if (!pdev)
 535                 return;
 536
 537         err = create_core_data(pdev, cpu, pkg_flag);
 538         if (err)
 539                 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
 540 }
 541
 542 static void coretemp_remove_core(struct platform_data *pdata,
 543                                 struct device *dev, int indx)
 544 {
 545         int i;
 546         struct temp_data *tdata = pdata->core_data[indx];
 547
 548         /* Remove the sysfs attributes */
 549         for (i = 0; i < tdata->attr_size; i++)
 550                 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
 551
 552         kfree(pdata->core_data[indx]);
 553         pdata->core_data[indx] = NULL;
 554 }
 555
 556 static int coretemp_probe(struct platform_device *pdev)
 557 {
 558         struct platform_data *pdata;
 559         int err;
 560
 561         /* Initialize the per-package data structures */
 562         pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
 563         if (!pdata)
 564                 return -ENOMEM;
 565
 566         err = create_name_attr(pdata, &pdev->dev);
 567         if (err)
 568                 goto exit_free;
 569
 570         pdata->phys_proc_id = pdev->id;
 571         platform_set_drvdata(pdev, pdata);
 572
 573         pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
 574         if (IS_ERR(pdata->hwmon_dev)) {
 575                 err = PTR_ERR(pdata->hwmon_dev);
 576                 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
 577                 goto exit_name;
 578         }
 579         return 0;
 580
 581 exit_name:
 582         device_remove_file(&pdev->dev, &pdata->name_attr);
 583         platform_set_drvdata(pdev, NULL);
 584 exit_free:
 585         kfree(pdata);
 586         return err;
 587 }
 588
 589 static int __devexit coretemp_remove(struct platform_device *pdev)
 590 {
 591         struct platform_data *pdata = platform_get_drvdata(pdev);
 592         int i;
 593
 594         for (i = MAX_CORE_DATA - 1; i >= 0; --i)
 595                 if (pdata->core_data[i])
 596                         coretemp_remove_core(pdata, &pdev->dev, i);
 597
 598         device_remove_file(&pdev->dev, &pdata->name_attr);
 599         hwmon_device_unregister(pdata->hwmon_dev);
 600         platform_set_drvdata(pdev, NULL);
 601         kfree(pdata);
 602         return 0;
 603 }
 604
 605 static struct platform_driver coretemp_driver = {
 606         .driver = {
 607                 .owner = THIS_MODULE,
 608                 .name = DRVNAME,
 609         },
 610         .probe = coretemp_probe,
 611         .remove = coretemp_remove,
 612 };
 613
 614 static int __cpuinit coretemp_device_add(unsigned int cpu)
 615 {
 616         int err;
 617         struct platform_device *pdev;
 618         struct pdev_entry *pdev_entry;
 619
 620         mutex_lock(&pdev_list_mutex);
 621
 622         pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
 623         if (!pdev) {
 624                 err = -ENOMEM;
 625                 pr_err("Device allocation failed\n");
 626                 goto exit;
 627         }
 628
 629         pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
 630         if (!pdev_entry) {
 631                 err = -ENOMEM;
 632                 goto exit_device_put;
 633         }
 634
 635         err = platform_device_add(pdev);
 636         if (err) {
 637                 pr_err("Device addition failed (%d)\n", err);
 638                 goto exit_device_free;
 639         }
 640
 641         pdev_entry->pdev = pdev;
 642         pdev_entry->phys_proc_id = pdev->id;
 643
 644         list_add_tail(&pdev_entry->list, &pdev_list);
 645         mutex_unlock(&pdev_list_mutex);
 646
 647         return 0;
 648
 649 exit_device_free:
 650         kfree(pdev_entry);
 651 exit_device_put:
 652         platform_device_put(pdev);
 653 exit:
 654         mutex_unlock(&pdev_list_mutex);
 655         return err;
 656 }
 657
 658 static void __cpuinit coretemp_device_remove(unsigned int cpu)
 659 {
 660         struct pdev_entry *p, *n;
 661         u16 phys_proc_id = TO_PHYS_ID(cpu);
 662
 663         mutex_lock(&pdev_list_mutex);
 664         list_for_each_entry_safe(p, n, &pdev_list, list) {
 665                 if (p->phys_proc_id != phys_proc_id)
 666                         continue;
 667                 platform_device_unregister(p->pdev);
 668                 list_del(&p->list);
 669                 kfree(p);
 670         }
 671         mutex_unlock(&pdev_list_mutex);
 672 }
 673
 674 static bool __cpuinit is_any_core_online(struct platform_data *pdata)
 675 {
 676         int i;
 677
 678         /* Find online cores, except pkgtemp data */
 679         for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
 680                 if (pdata->core_data[i] &&
 681                         !pdata->core_data[i]->is_pkg_data) {
 682                         return true;
 683                 }
 684         }
 685         return false;
 686 }
 687
 688 static void __cpuinit get_core_online(unsigned int cpu)
 689 {
 690         struct cpuinfo_x86 *c = &cpu_data(cpu);
 691         struct platform_device *pdev = coretemp_get_pdev(cpu);
 692         int err;
 693
 694         /*
 695          * CPUID.06H.EAX[0] indicates whether the CPU has thermal
 696          * sensors. We check this bit only, all the early CPUs
 697          * without thermal sensors will be filtered out.
 698          */
 699         if (!cpu_has(c, X86_FEATURE_DTHERM))
 700                 return;
 701
 702         if (!pdev) {
 703                 /* Check the microcode version of the CPU */
 704                 if (chk_ucode_version(cpu))
 705                         return;
 706
 707                 /*
 708                  * Alright, we have DTS support.
 709                  * We are bringing the _first_ core in this pkg
 710                  * online. So, initialize per-pkg data structures and
 711                  * then bring this core online.
 712                  */
 713                 err = coretemp_device_add(cpu);
 714                 if (err)
 715                         return;
 716                 /*
 717                  * Check whether pkgtemp support is available.
 718                  * If so, add interfaces for pkgtemp.
 719                  */
 720                 if (cpu_has(c, X86_FEATURE_PTS))
 721                         coretemp_add_core(cpu, 1);
 722         }
 723         /*
 724          * Physical CPU device already exists.
 725          * So, just add interfaces for this core.
 726          */
 727         coretemp_add_core(cpu, 0);
 728 }
 729
 730 static void __cpuinit put_core_offline(unsigned int cpu)
 731 {
 732         int i, indx;
 733         struct platform_data *pdata;
 734         struct platform_device *pdev = coretemp_get_pdev(cpu);
 735
 736         /* If the physical CPU device does not exist, just return */
 737         if (!pdev)
 738                 return;
 739
 740         pdata = platform_get_drvdata(pdev);
 741
 742         indx = TO_ATTR_NO(cpu);
 743
 744         /* The core id is too big, just return */
 745         if (indx > MAX_CORE_DATA - 1)
 746                 return;
 747
 748         if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
 749                 coretemp_remove_core(pdata, &pdev->dev, indx);
 750
 751         /*
 752          * If a HT sibling of a core is taken offline, but another HT sibling
 753          * of the same core is still online, register the alternate sibling.
 754          * This ensures that exactly one set of attributes is provided as long
 755          * as at least one HT sibling of a core is online.
 756          */
 757         for_each_sibling(i, cpu) {
 758                 if (i != cpu) {
 759                         get_core_online(i);
 760                         /*
 761                          * Display temperature sensor data for one HT sibling
 762                          * per core only, so abort the loop after one such
 763                          * sibling has been found.
 764                          */
 765                         break;
 766                 }
 767         }
 768         /*
 769          * If all cores in this pkg are offline, remove the device.
 770          * coretemp_device_remove calls unregister_platform_device,
 771          * which in turn calls coretemp_remove. This removes the
 772          * pkgtemp entry and does other clean ups.
 773          */
 774         if (!is_any_core_online(pdata))
 775                 coretemp_device_remove(cpu);
 776 }
 777
 778 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
 779                                  unsigned long action, void *hcpu)
 780 {
 781         unsigned int cpu = (unsigned long) hcpu;
 782
 783         switch (action) {
 784         case CPU_ONLINE:
 785         case CPU_DOWN_FAILED:
 786                 get_core_online(cpu);
 787                 break;
 788         case CPU_DOWN_PREPARE:
 789                 put_core_offline(cpu);
 790                 break;
 791         }
 792         return NOTIFY_OK;
 793 }
 794
 795 static struct notifier_block coretemp_cpu_notifier __refdata = {
 796         .notifier_call = coretemp_cpu_callback,
 797 };
 798
 799 static const struct x86_cpu_id __initconst coretemp_ids[] = {
 800         { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
 801         {}
 802 };
 803 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
 804
 805 static int __init coretemp_init(void)
 806 {
 807         int i, err;
 808
 809         /*
 810          * CPUID.06H.EAX[0] indicates whether the CPU has thermal
 811          * sensors. We check this bit only, all the early CPUs
 812          * without thermal sensors will be filtered out.
 813          */
 814         if (!x86_match_cpu(coretemp_ids))
 815                 return -ENODEV;
 816
 817         err = platform_driver_register(&coretemp_driver);
 818         if (err)
 819                 goto exit;
 820
 821         get_online_cpus();
 822         for_each_online_cpu(i)
 823                 get_core_online(i);
 824
 825 #ifndef CONFIG_HOTPLUG_CPU
 826         if (list_empty(&pdev_list)) {
 827                 put_online_cpus();
 828                 err = -ENODEV;
 829                 goto exit_driver_unreg;
 830         }
 831 #endif
 832
 833         register_hotcpu_notifier(&coretemp_cpu_notifier);
 834         put_online_cpus();
 835         return 0;
 836
 837 #ifndef CONFIG_HOTPLUG_CPU
 838 exit_driver_unreg:
 839         platform_driver_unregister(&coretemp_driver);
 840 #endif
 841 exit:
 842         return err;
 843 }
 844
 845 static void __exit coretemp_exit(void)
 846 {
 847         struct pdev_entry *p, *n;
 848
 849         get_online_cpus();
 850         unregister_hotcpu_notifier(&coretemp_cpu_notifier);
 851         mutex_lock(&pdev_list_mutex);
 852         list_for_each_entry_safe(p, n, &pdev_list, list) {
 853                 platform_device_unregister(p->pdev);
 854                 list_del(&p->list);
 855                 kfree(p);
 856         }
 857         mutex_unlock(&pdev_list_mutex);
 858         put_online_cpus();
 859         platform_driver_unregister(&coretemp_driver);
 860 }
 861
 862 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
 863 MODULE_DESCRIPTION("Intel Core temperature monitor");
 864 MODULE_LICENSE("GPL");
 865
 866 module_init(coretemp_init)
 867 module_exit(coretemp_exit)