2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x, SCH5027,
3 * and SCH5127 Super-I/O chips integrated hardware monitoring
5 * Copyright (c) 2007, 2008, 2009, 2010 Juerg Haefliger <juergh@gmail.com>
7 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
8 * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus
9 * if a SCH311x or SCH5127 chip is found. Both types of chips have very
10 * similar hardware monitoring capabilities but differ in the way they can be
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/module.h>
31 #include <linux/init.h>
32 #include <linux/slab.h>
33 #include <linux/jiffies.h>
34 #include <linux/i2c.h>
35 #include <linux/platform_device.h>
36 #include <linux/hwmon.h>
37 #include <linux/hwmon-sysfs.h>
38 #include <linux/hwmon-vid.h>
39 #include <linux/err.h>
40 #include <linux/mutex.h>
41 #include <linux/acpi.h>
44 /* ISA device, if found */
45 static struct platform_device
*pdev
;
47 /* Module load parameters */
48 static int force_start
;
49 module_param(force_start
, bool, 0);
50 MODULE_PARM_DESC(force_start
, "Force the chip to start monitoring inputs");
52 static unsigned short force_id
;
53 module_param(force_id
, ushort
, 0);
54 MODULE_PARM_DESC(force_id
, "Override the detected device ID");
56 static int probe_all_addr
;
57 module_param(probe_all_addr
, bool, 0);
58 MODULE_PARM_DESC(probe_all_addr
, "Include probing of non-standard LPC "
61 /* Addresses to scan */
62 static const unsigned short normal_i2c
[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END
};
64 enum chips
{ dme1737
, sch5027
, sch311x
, sch5127
};
66 /* ---------------------------------------------------------------------
69 * The sensors are defined as follows:
71 * Voltages Temperatures
72 * -------- ------------
73 * in0 +5VTR (+5V stdby) temp1 Remote diode 1
74 * in1 Vccp (proc core) temp2 Internal temp
75 * in2 VCC (internal +3.3V) temp3 Remote diode 2
78 * in5 VTR (+3.3V stby)
81 * --------------------------------------------------------------------- */
83 /* Voltages (in) numbered 0-6 (ix) */
84 #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \
86 #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
88 #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
91 /* Temperatures (temp) numbered 0-2 (ix) */
92 #define DME1737_REG_TEMP(ix) (0x25 + (ix))
93 #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
94 #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
95 #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
98 /* Voltage and temperature LSBs
99 * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
100 * IN_TEMP_LSB(0) = [in5, in6]
101 * IN_TEMP_LSB(1) = [temp3, temp1]
102 * IN_TEMP_LSB(2) = [in4, temp2]
103 * IN_TEMP_LSB(3) = [in3, in0]
104 * IN_TEMP_LSB(4) = [in2, in1] */
105 #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
106 static const u8 DME1737_REG_IN_LSB
[] = {3, 4, 4, 3, 2, 0, 0};
107 static const u8 DME1737_REG_IN_LSB_SHL
[] = {4, 4, 0, 0, 0, 0, 4};
108 static const u8 DME1737_REG_TEMP_LSB
[] = {1, 2, 1};
109 static const u8 DME1737_REG_TEMP_LSB_SHL
[] = {4, 4, 0};
111 /* Fans numbered 0-5 (ix) */
112 #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
114 #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
116 #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
118 #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
120 /* PWMs numbered 0-2, 4-5 (ix) */
121 #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
123 #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
124 #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
125 #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
127 /* The layout of the ramp rate registers is different from the other pwm
128 * registers. The bits for the 3 PWMs are stored in 2 registers:
129 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
130 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */
131 #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
133 /* Thermal zones 0-2 */
134 #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
135 #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
136 /* The layout of the hysteresis registers is different from the other zone
137 * registers. The bits for the 3 zones are stored in 2 registers:
138 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
139 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */
140 #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
142 /* Alarm registers and bit mapping
143 * The 3 8-bit alarm registers will be concatenated to a single 32-bit
144 * alarm value [0, ALARM3, ALARM2, ALARM1]. */
145 #define DME1737_REG_ALARM1 0x41
146 #define DME1737_REG_ALARM2 0x42
147 #define DME1737_REG_ALARM3 0x83
148 static const u8 DME1737_BIT_ALARM_IN
[] = {0, 1, 2, 3, 8, 16, 17};
149 static const u8 DME1737_BIT_ALARM_TEMP
[] = {4, 5, 6};
150 static const u8 DME1737_BIT_ALARM_FAN
[] = {10, 11, 12, 13, 22, 23};
152 /* Miscellaneous registers */
153 #define DME1737_REG_DEVICE 0x3d
154 #define DME1737_REG_COMPANY 0x3e
155 #define DME1737_REG_VERSTEP 0x3f
156 #define DME1737_REG_CONFIG 0x40
157 #define DME1737_REG_CONFIG2 0x7f
158 #define DME1737_REG_VID 0x43
159 #define DME1737_REG_TACH_PWM 0x81
161 /* ---------------------------------------------------------------------
163 * --------------------------------------------------------------------- */
165 /* Chip identification */
166 #define DME1737_COMPANY_SMSC 0x5c
167 #define DME1737_VERSTEP 0x88
168 #define DME1737_VERSTEP_MASK 0xf8
169 #define SCH311X_DEVICE 0x8c
170 #define SCH5027_VERSTEP 0x69
171 #define SCH5127_DEVICE 0x8e
173 /* Device ID values (global configuration register index 0x20) */
174 #define DME1737_ID_1 0x77
175 #define DME1737_ID_2 0x78
176 #define SCH3112_ID 0x7c
177 #define SCH3114_ID 0x7d
178 #define SCH3116_ID 0x7f
179 #define SCH5027_ID 0x89
180 #define SCH5127_ID 0x86
182 /* Length of ISA address segment */
183 #define DME1737_EXTENT 2
185 /* chip-dependent features */
186 #define HAS_TEMP_OFFSET (1 << 0) /* bit 0 */
187 #define HAS_VID (1 << 1) /* bit 1 */
188 #define HAS_ZONE3 (1 << 2) /* bit 2 */
189 #define HAS_ZONE_HYST (1 << 3) /* bit 3 */
190 #define HAS_PWM_MIN (1 << 4) /* bit 4 */
191 #define HAS_FAN(ix) (1 << ((ix) + 5)) /* bits 5-10 */
192 #define HAS_PWM(ix) (1 << ((ix) + 11)) /* bits 11-16 */
194 /* ---------------------------------------------------------------------
195 * Data structures and manipulation thereof
196 * --------------------------------------------------------------------- */
198 struct dme1737_data
{
199 struct i2c_client
*client
; /* for I2C devices only */
200 struct device
*hwmon_dev
;
202 unsigned int addr
; /* for ISA devices only */
204 struct mutex update_lock
;
205 int valid
; /* !=0 if following fields are valid */
206 unsigned long last_update
; /* in jiffies */
207 unsigned long last_vbat
; /* in jiffies */
209 const int *in_nominal
; /* pointer to IN_NOMINAL array */
215 /* Register values */
242 /* Nominal voltage values */
243 static const int IN_NOMINAL_DME1737
[] = {5000, 2250, 3300, 5000, 12000, 3300,
245 static const int IN_NOMINAL_SCH311x
[] = {2500, 1500, 3300, 5000, 12000, 3300,
247 static const int IN_NOMINAL_SCH5027
[] = {5000, 2250, 3300, 1125, 1125, 3300,
249 static const int IN_NOMINAL_SCH5127
[] = {2500, 2250, 3300, 1125, 1125, 3300,
251 #define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \
252 (type) == sch5027 ? IN_NOMINAL_SCH5027 : \
253 (type) == sch5127 ? IN_NOMINAL_SCH5127 : \
257 * Voltage inputs have 16 bits resolution, limit values have 8 bits
259 static inline int IN_FROM_REG(int reg
, int nominal
, int res
)
261 return (reg
* nominal
+ (3 << (res
- 3))) / (3 << (res
- 2));
264 static inline int IN_TO_REG(int val
, int nominal
)
266 return SENSORS_LIMIT((val
* 192 + nominal
/ 2) / nominal
, 0, 255);
270 * The register values represent temperatures in 2's complement notation from
271 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
272 * values have 8 bits resolution. */
273 static inline int TEMP_FROM_REG(int reg
, int res
)
275 return (reg
* 1000) >> (res
- 8);
278 static inline int TEMP_TO_REG(int val
)
280 return SENSORS_LIMIT((val
< 0 ? val
- 500 : val
+ 500) / 1000,
284 /* Temperature range */
285 static const int TEMP_RANGE
[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
286 10000, 13333, 16000, 20000, 26666, 32000,
287 40000, 53333, 80000};
289 static inline int TEMP_RANGE_FROM_REG(int reg
)
291 return TEMP_RANGE
[(reg
>> 4) & 0x0f];
294 static int TEMP_RANGE_TO_REG(int val
, int reg
)
298 for (i
= 15; i
> 0; i
--) {
299 if (val
> (TEMP_RANGE
[i
] + TEMP_RANGE
[i
- 1] + 1) / 2) {
304 return (reg
& 0x0f) | (i
<< 4);
307 /* Temperature hysteresis
309 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
310 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */
311 static inline int TEMP_HYST_FROM_REG(int reg
, int ix
)
313 return (((ix
== 1) ? reg
: reg
>> 4) & 0x0f) * 1000;
316 static inline int TEMP_HYST_TO_REG(int val
, int ix
, int reg
)
318 int hyst
= SENSORS_LIMIT((val
+ 500) / 1000, 0, 15);
320 return (ix
== 1) ? (reg
& 0xf0) | hyst
: (reg
& 0x0f) | (hyst
<< 4);
324 static inline int FAN_FROM_REG(int reg
, int tpc
)
329 return (reg
== 0 || reg
== 0xffff) ? 0 : 90000 * 60 / reg
;
333 static inline int FAN_TO_REG(int val
, int tpc
)
336 return SENSORS_LIMIT(val
/ tpc
, 0, 0xffff);
338 return (val
<= 0) ? 0xffff :
339 SENSORS_LIMIT(90000 * 60 / val
, 0, 0xfffe);
343 /* Fan TPC (tach pulse count)
344 * Converts a register value to a TPC multiplier or returns 0 if the tachometer
345 * is configured in legacy (non-tpc) mode */
346 static inline int FAN_TPC_FROM_REG(int reg
)
348 return (reg
& 0x20) ? 0 : 60 >> (reg
& 0x03);
352 * The type of a fan is expressed in number of pulses-per-revolution that it
354 static inline int FAN_TYPE_FROM_REG(int reg
)
356 int edge
= (reg
>> 1) & 0x03;
358 return (edge
> 0) ? 1 << (edge
- 1) : 0;
361 static inline int FAN_TYPE_TO_REG(int val
, int reg
)
363 int edge
= (val
== 4) ? 3 : val
;
365 return (reg
& 0xf9) | (edge
<< 1);
369 static const int FAN_MAX
[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
372 static int FAN_MAX_FROM_REG(int reg
)
376 for (i
= 10; i
> 0; i
--) {
377 if (reg
== FAN_MAX
[i
]) {
382 return 1000 + i
* 500;
385 static int FAN_MAX_TO_REG(int val
)
389 for (i
= 10; i
> 0; i
--) {
390 if (val
> (1000 + (i
- 1) * 500)) {
399 * Register to enable mapping:
400 * 000: 2 fan on zone 1 auto
401 * 001: 2 fan on zone 2 auto
402 * 010: 2 fan on zone 3 auto
404 * 100: -1 fan disabled
405 * 101: 2 fan on hottest of zones 2,3 auto
406 * 110: 2 fan on hottest of zones 1,2,3 auto
407 * 111: 1 fan in manual mode */
408 static inline int PWM_EN_FROM_REG(int reg
)
410 static const int en
[] = {2, 2, 2, 0, -1, 2, 2, 1};
412 return en
[(reg
>> 5) & 0x07];
415 static inline int PWM_EN_TO_REG(int val
, int reg
)
417 int en
= (val
== 1) ? 7 : 3;
419 return (reg
& 0x1f) | ((en
& 0x07) << 5);
422 /* PWM auto channels zone
423 * Register to auto channels zone mapping (ACZ is a bitfield with bit x
424 * corresponding to zone x+1):
425 * 000: 001 fan on zone 1 auto
426 * 001: 010 fan on zone 2 auto
427 * 010: 100 fan on zone 3 auto
428 * 011: 000 fan full on
429 * 100: 000 fan disabled
430 * 101: 110 fan on hottest of zones 2,3 auto
431 * 110: 111 fan on hottest of zones 1,2,3 auto
432 * 111: 000 fan in manual mode */
433 static inline int PWM_ACZ_FROM_REG(int reg
)
435 static const int acz
[] = {1, 2, 4, 0, 0, 6, 7, 0};
437 return acz
[(reg
>> 5) & 0x07];
440 static inline int PWM_ACZ_TO_REG(int val
, int reg
)
442 int acz
= (val
== 4) ? 2 : val
- 1;
444 return (reg
& 0x1f) | ((acz
& 0x07) << 5);
448 static const int PWM_FREQ
[] = {11, 15, 22, 29, 35, 44, 59, 88,
449 15000, 20000, 30000, 25000, 0, 0, 0, 0};
451 static inline int PWM_FREQ_FROM_REG(int reg
)
453 return PWM_FREQ
[reg
& 0x0f];
456 static int PWM_FREQ_TO_REG(int val
, int reg
)
460 /* the first two cases are special - stupid chip design! */
463 } else if (val
> 22500) {
466 for (i
= 9; i
> 0; i
--) {
467 if (val
> (PWM_FREQ
[i
] + PWM_FREQ
[i
- 1] + 1) / 2) {
473 return (reg
& 0xf0) | i
;
478 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
479 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */
480 static const u8 PWM_RR
[] = {206, 104, 69, 41, 26, 18, 10, 5};
482 static inline int PWM_RR_FROM_REG(int reg
, int ix
)
484 int rr
= (ix
== 1) ? reg
>> 4 : reg
;
486 return (rr
& 0x08) ? PWM_RR
[rr
& 0x07] : 0;
489 static int PWM_RR_TO_REG(int val
, int ix
, int reg
)
493 for (i
= 0; i
< 7; i
++) {
494 if (val
> (PWM_RR
[i
] + PWM_RR
[i
+ 1] + 1) / 2) {
499 return (ix
== 1) ? (reg
& 0x8f) | (i
<< 4) : (reg
& 0xf8) | i
;
502 /* PWM ramp rate enable */
503 static inline int PWM_RR_EN_FROM_REG(int reg
, int ix
)
505 return PWM_RR_FROM_REG(reg
, ix
) ? 1 : 0;
508 static inline int PWM_RR_EN_TO_REG(int val
, int ix
, int reg
)
510 int en
= (ix
== 1) ? 0x80 : 0x08;
512 return val
? reg
| en
: reg
& ~en
;
516 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
517 * the register layout). */
518 static inline int PWM_OFF_FROM_REG(int reg
, int ix
)
520 return (reg
>> (ix
+ 5)) & 0x01;
523 static inline int PWM_OFF_TO_REG(int val
, int ix
, int reg
)
525 return (reg
& ~(1 << (ix
+ 5))) | ((val
& 0x01) << (ix
+ 5));
528 /* ---------------------------------------------------------------------
531 * ISA access is performed through an index/data register pair and needs to
532 * be protected by a mutex during runtime (not required for initialization).
533 * We use data->update_lock for this and need to ensure that we acquire it
534 * before calling dme1737_read or dme1737_write.
535 * --------------------------------------------------------------------- */
537 static u8
dme1737_read(const struct dme1737_data
*data
, u8 reg
)
539 struct i2c_client
*client
= data
->client
;
542 if (client
) { /* I2C device */
543 val
= i2c_smbus_read_byte_data(client
, reg
);
546 dev_warn(&client
->dev
, "Read from register "
547 "0x%02x failed! Please report to the driver "
548 "maintainer.\n", reg
);
550 } else { /* ISA device */
551 outb(reg
, data
->addr
);
552 val
= inb(data
->addr
+ 1);
558 static s32
dme1737_write(const struct dme1737_data
*data
, u8 reg
, u8 val
)
560 struct i2c_client
*client
= data
->client
;
563 if (client
) { /* I2C device */
564 res
= i2c_smbus_write_byte_data(client
, reg
, val
);
567 dev_warn(&client
->dev
, "Write to register "
568 "0x%02x failed! Please report to the driver "
569 "maintainer.\n", reg
);
571 } else { /* ISA device */
572 outb(reg
, data
->addr
);
573 outb(val
, data
->addr
+ 1);
579 static struct dme1737_data
*dme1737_update_device(struct device
*dev
)
581 struct dme1737_data
*data
= dev_get_drvdata(dev
);
585 mutex_lock(&data
->update_lock
);
587 /* Enable a Vbat monitoring cycle every 10 mins */
588 if (time_after(jiffies
, data
->last_vbat
+ 600 * HZ
) || !data
->valid
) {
589 dme1737_write(data
, DME1737_REG_CONFIG
, dme1737_read(data
,
590 DME1737_REG_CONFIG
) | 0x10);
591 data
->last_vbat
= jiffies
;
594 /* Sample register contents every 1 sec */
595 if (time_after(jiffies
, data
->last_update
+ HZ
) || !data
->valid
) {
596 if (data
->has_features
& HAS_VID
) {
597 data
->vid
= dme1737_read(data
, DME1737_REG_VID
) &
601 /* In (voltage) registers */
602 for (ix
= 0; ix
< ARRAY_SIZE(data
->in
); ix
++) {
603 /* Voltage inputs are stored as 16 bit values even
604 * though they have only 12 bits resolution. This is
605 * to make it consistent with the temp inputs. */
606 data
->in
[ix
] = dme1737_read(data
,
607 DME1737_REG_IN(ix
)) << 8;
608 data
->in_min
[ix
] = dme1737_read(data
,
609 DME1737_REG_IN_MIN(ix
));
610 data
->in_max
[ix
] = dme1737_read(data
,
611 DME1737_REG_IN_MAX(ix
));
615 for (ix
= 0; ix
< ARRAY_SIZE(data
->temp
); ix
++) {
616 /* Temp inputs are stored as 16 bit values even
617 * though they have only 12 bits resolution. This is
618 * to take advantage of implicit conversions between
619 * register values (2's complement) and temp values
620 * (signed decimal). */
621 data
->temp
[ix
] = dme1737_read(data
,
622 DME1737_REG_TEMP(ix
)) << 8;
623 data
->temp_min
[ix
] = dme1737_read(data
,
624 DME1737_REG_TEMP_MIN(ix
));
625 data
->temp_max
[ix
] = dme1737_read(data
,
626 DME1737_REG_TEMP_MAX(ix
));
627 if (data
->has_features
& HAS_TEMP_OFFSET
) {
628 data
->temp_offset
[ix
] = dme1737_read(data
,
629 DME1737_REG_TEMP_OFFSET(ix
));
633 /* In and temp LSB registers
634 * The LSBs are latched when the MSBs are read, so the order in
635 * which the registers are read (MSB first, then LSB) is
637 for (ix
= 0; ix
< ARRAY_SIZE(lsb
); ix
++) {
638 lsb
[ix
] = dme1737_read(data
,
639 DME1737_REG_IN_TEMP_LSB(ix
));
641 for (ix
= 0; ix
< ARRAY_SIZE(data
->in
); ix
++) {
642 data
->in
[ix
] |= (lsb
[DME1737_REG_IN_LSB
[ix
]] <<
643 DME1737_REG_IN_LSB_SHL
[ix
]) & 0xf0;
645 for (ix
= 0; ix
< ARRAY_SIZE(data
->temp
); ix
++) {
646 data
->temp
[ix
] |= (lsb
[DME1737_REG_TEMP_LSB
[ix
]] <<
647 DME1737_REG_TEMP_LSB_SHL
[ix
]) & 0xf0;
651 for (ix
= 0; ix
< ARRAY_SIZE(data
->fan
); ix
++) {
652 /* Skip reading registers if optional fans are not
654 if (!(data
->has_features
& HAS_FAN(ix
))) {
657 data
->fan
[ix
] = dme1737_read(data
,
658 DME1737_REG_FAN(ix
));
659 data
->fan
[ix
] |= dme1737_read(data
,
660 DME1737_REG_FAN(ix
) + 1) << 8;
661 data
->fan_min
[ix
] = dme1737_read(data
,
662 DME1737_REG_FAN_MIN(ix
));
663 data
->fan_min
[ix
] |= dme1737_read(data
,
664 DME1737_REG_FAN_MIN(ix
) + 1) << 8;
665 data
->fan_opt
[ix
] = dme1737_read(data
,
666 DME1737_REG_FAN_OPT(ix
));
667 /* fan_max exists only for fan[5-6] */
669 data
->fan_max
[ix
- 4] = dme1737_read(data
,
670 DME1737_REG_FAN_MAX(ix
));
675 for (ix
= 0; ix
< ARRAY_SIZE(data
->pwm
); ix
++) {
676 /* Skip reading registers if optional PWMs are not
678 if (!(data
->has_features
& HAS_PWM(ix
))) {
681 data
->pwm
[ix
] = dme1737_read(data
,
682 DME1737_REG_PWM(ix
));
683 data
->pwm_freq
[ix
] = dme1737_read(data
,
684 DME1737_REG_PWM_FREQ(ix
));
685 /* pwm_config and pwm_min exist only for pwm[1-3] */
687 data
->pwm_config
[ix
] = dme1737_read(data
,
688 DME1737_REG_PWM_CONFIG(ix
));
689 data
->pwm_min
[ix
] = dme1737_read(data
,
690 DME1737_REG_PWM_MIN(ix
));
693 for (ix
= 0; ix
< ARRAY_SIZE(data
->pwm_rr
); ix
++) {
694 data
->pwm_rr
[ix
] = dme1737_read(data
,
695 DME1737_REG_PWM_RR(ix
));
698 /* Thermal zone registers */
699 for (ix
= 0; ix
< ARRAY_SIZE(data
->zone_low
); ix
++) {
700 /* Skip reading registers if zone3 is not present */
701 if ((ix
== 2) && !(data
->has_features
& HAS_ZONE3
)) {
704 /* sch5127 zone2 registers are special */
705 if ((ix
== 1) && (data
->type
== sch5127
)) {
706 data
->zone_low
[1] = dme1737_read(data
,
707 DME1737_REG_ZONE_LOW(2));
708 data
->zone_abs
[1] = dme1737_read(data
,
709 DME1737_REG_ZONE_ABS(2));
711 data
->zone_low
[ix
] = dme1737_read(data
,
712 DME1737_REG_ZONE_LOW(ix
));
713 data
->zone_abs
[ix
] = dme1737_read(data
,
714 DME1737_REG_ZONE_ABS(ix
));
717 if (data
->has_features
& HAS_ZONE_HYST
) {
718 for (ix
= 0; ix
< ARRAY_SIZE(data
->zone_hyst
); ix
++) {
719 data
->zone_hyst
[ix
] = dme1737_read(data
,
720 DME1737_REG_ZONE_HYST(ix
));
724 /* Alarm registers */
725 data
->alarms
= dme1737_read(data
,
727 /* Bit 7 tells us if the other alarm registers are non-zero and
728 * therefore also need to be read */
729 if (data
->alarms
& 0x80) {
730 data
->alarms
|= dme1737_read(data
,
731 DME1737_REG_ALARM2
) << 8;
732 data
->alarms
|= dme1737_read(data
,
733 DME1737_REG_ALARM3
) << 16;
736 /* The ISA chips require explicit clearing of alarm bits.
737 * Don't worry, an alarm will come back if the condition
738 * that causes it still exists */
740 if (data
->alarms
& 0xff0000) {
741 dme1737_write(data
, DME1737_REG_ALARM3
,
744 if (data
->alarms
& 0xff00) {
745 dme1737_write(data
, DME1737_REG_ALARM2
,
748 if (data
->alarms
& 0xff) {
749 dme1737_write(data
, DME1737_REG_ALARM1
,
754 data
->last_update
= jiffies
;
758 mutex_unlock(&data
->update_lock
);
763 /* ---------------------------------------------------------------------
764 * Voltage sysfs attributes
766 * --------------------------------------------------------------------- */
768 #define SYS_IN_INPUT 0
771 #define SYS_IN_ALARM 3
773 static ssize_t
show_in(struct device
*dev
, struct device_attribute
*attr
,
776 struct dme1737_data
*data
= dme1737_update_device(dev
);
777 struct sensor_device_attribute_2
778 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
779 int ix
= sensor_attr_2
->index
;
780 int fn
= sensor_attr_2
->nr
;
785 res
= IN_FROM_REG(data
->in
[ix
], data
->in_nominal
[ix
], 16);
788 res
= IN_FROM_REG(data
->in_min
[ix
], data
->in_nominal
[ix
], 8);
791 res
= IN_FROM_REG(data
->in_max
[ix
], data
->in_nominal
[ix
], 8);
794 res
= (data
->alarms
>> DME1737_BIT_ALARM_IN
[ix
]) & 0x01;
798 dev_dbg(dev
, "Unknown function %d.\n", fn
);
801 return sprintf(buf
, "%d\n", res
);
804 static ssize_t
set_in(struct device
*dev
, struct device_attribute
*attr
,
805 const char *buf
, size_t count
)
807 struct dme1737_data
*data
= dev_get_drvdata(dev
);
808 struct sensor_device_attribute_2
809 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
810 int ix
= sensor_attr_2
->index
;
811 int fn
= sensor_attr_2
->nr
;
812 long val
= simple_strtol(buf
, NULL
, 10);
814 mutex_lock(&data
->update_lock
);
817 data
->in_min
[ix
] = IN_TO_REG(val
, data
->in_nominal
[ix
]);
818 dme1737_write(data
, DME1737_REG_IN_MIN(ix
),
822 data
->in_max
[ix
] = IN_TO_REG(val
, data
->in_nominal
[ix
]);
823 dme1737_write(data
, DME1737_REG_IN_MAX(ix
),
827 dev_dbg(dev
, "Unknown function %d.\n", fn
);
829 mutex_unlock(&data
->update_lock
);
834 /* ---------------------------------------------------------------------
835 * Temperature sysfs attributes
837 * --------------------------------------------------------------------- */
839 #define SYS_TEMP_INPUT 0
840 #define SYS_TEMP_MIN 1
841 #define SYS_TEMP_MAX 2
842 #define SYS_TEMP_OFFSET 3
843 #define SYS_TEMP_ALARM 4
844 #define SYS_TEMP_FAULT 5
846 static ssize_t
show_temp(struct device
*dev
, struct device_attribute
*attr
,
849 struct dme1737_data
*data
= dme1737_update_device(dev
);
850 struct sensor_device_attribute_2
851 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
852 int ix
= sensor_attr_2
->index
;
853 int fn
= sensor_attr_2
->nr
;
858 res
= TEMP_FROM_REG(data
->temp
[ix
], 16);
861 res
= TEMP_FROM_REG(data
->temp_min
[ix
], 8);
864 res
= TEMP_FROM_REG(data
->temp_max
[ix
], 8);
866 case SYS_TEMP_OFFSET
:
867 res
= TEMP_FROM_REG(data
->temp_offset
[ix
], 8);
870 res
= (data
->alarms
>> DME1737_BIT_ALARM_TEMP
[ix
]) & 0x01;
873 res
= (((u16
)data
->temp
[ix
] & 0xff00) == 0x8000);
877 dev_dbg(dev
, "Unknown function %d.\n", fn
);
880 return sprintf(buf
, "%d\n", res
);
883 static ssize_t
set_temp(struct device
*dev
, struct device_attribute
*attr
,
884 const char *buf
, size_t count
)
886 struct dme1737_data
*data
= dev_get_drvdata(dev
);
887 struct sensor_device_attribute_2
888 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
889 int ix
= sensor_attr_2
->index
;
890 int fn
= sensor_attr_2
->nr
;
891 long val
= simple_strtol(buf
, NULL
, 10);
893 mutex_lock(&data
->update_lock
);
896 data
->temp_min
[ix
] = TEMP_TO_REG(val
);
897 dme1737_write(data
, DME1737_REG_TEMP_MIN(ix
),
901 data
->temp_max
[ix
] = TEMP_TO_REG(val
);
902 dme1737_write(data
, DME1737_REG_TEMP_MAX(ix
),
905 case SYS_TEMP_OFFSET
:
906 data
->temp_offset
[ix
] = TEMP_TO_REG(val
);
907 dme1737_write(data
, DME1737_REG_TEMP_OFFSET(ix
),
908 data
->temp_offset
[ix
]);
911 dev_dbg(dev
, "Unknown function %d.\n", fn
);
913 mutex_unlock(&data
->update_lock
);
918 /* ---------------------------------------------------------------------
919 * Zone sysfs attributes
921 * --------------------------------------------------------------------- */
923 #define SYS_ZONE_AUTO_CHANNELS_TEMP 0
924 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
925 #define SYS_ZONE_AUTO_POINT1_TEMP 2
926 #define SYS_ZONE_AUTO_POINT2_TEMP 3
927 #define SYS_ZONE_AUTO_POINT3_TEMP 4
929 static ssize_t
show_zone(struct device
*dev
, struct device_attribute
*attr
,
932 struct dme1737_data
*data
= dme1737_update_device(dev
);
933 struct sensor_device_attribute_2
934 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
935 int ix
= sensor_attr_2
->index
;
936 int fn
= sensor_attr_2
->nr
;
940 case SYS_ZONE_AUTO_CHANNELS_TEMP
:
941 /* check config2 for non-standard temp-to-zone mapping */
942 if ((ix
== 1) && (data
->config2
& 0x02)) {
948 case SYS_ZONE_AUTO_POINT1_TEMP_HYST
:
949 res
= TEMP_FROM_REG(data
->zone_low
[ix
], 8) -
950 TEMP_HYST_FROM_REG(data
->zone_hyst
[ix
== 2], ix
);
952 case SYS_ZONE_AUTO_POINT1_TEMP
:
953 res
= TEMP_FROM_REG(data
->zone_low
[ix
], 8);
955 case SYS_ZONE_AUTO_POINT2_TEMP
:
956 /* pwm_freq holds the temp range bits in the upper nibble */
957 res
= TEMP_FROM_REG(data
->zone_low
[ix
], 8) +
958 TEMP_RANGE_FROM_REG(data
->pwm_freq
[ix
]);
960 case SYS_ZONE_AUTO_POINT3_TEMP
:
961 res
= TEMP_FROM_REG(data
->zone_abs
[ix
], 8);
965 dev_dbg(dev
, "Unknown function %d.\n", fn
);
968 return sprintf(buf
, "%d\n", res
);
971 static ssize_t
set_zone(struct device
*dev
, struct device_attribute
*attr
,
972 const char *buf
, size_t count
)
974 struct dme1737_data
*data
= dev_get_drvdata(dev
);
975 struct sensor_device_attribute_2
976 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
977 int ix
= sensor_attr_2
->index
;
978 int fn
= sensor_attr_2
->nr
;
979 long val
= simple_strtol(buf
, NULL
, 10);
981 mutex_lock(&data
->update_lock
);
983 case SYS_ZONE_AUTO_POINT1_TEMP_HYST
:
984 /* Refresh the cache */
985 data
->zone_low
[ix
] = dme1737_read(data
,
986 DME1737_REG_ZONE_LOW(ix
));
987 /* Modify the temp hyst value */
988 data
->zone_hyst
[ix
== 2] = TEMP_HYST_TO_REG(
989 TEMP_FROM_REG(data
->zone_low
[ix
], 8) -
990 val
, ix
, dme1737_read(data
,
991 DME1737_REG_ZONE_HYST(ix
== 2)));
992 dme1737_write(data
, DME1737_REG_ZONE_HYST(ix
== 2),
993 data
->zone_hyst
[ix
== 2]);
995 case SYS_ZONE_AUTO_POINT1_TEMP
:
996 data
->zone_low
[ix
] = TEMP_TO_REG(val
);
997 dme1737_write(data
, DME1737_REG_ZONE_LOW(ix
),
1000 case SYS_ZONE_AUTO_POINT2_TEMP
:
1001 /* Refresh the cache */
1002 data
->zone_low
[ix
] = dme1737_read(data
,
1003 DME1737_REG_ZONE_LOW(ix
));
1004 /* Modify the temp range value (which is stored in the upper
1005 * nibble of the pwm_freq register) */
1006 data
->pwm_freq
[ix
] = TEMP_RANGE_TO_REG(val
-
1007 TEMP_FROM_REG(data
->zone_low
[ix
], 8),
1009 DME1737_REG_PWM_FREQ(ix
)));
1010 dme1737_write(data
, DME1737_REG_PWM_FREQ(ix
),
1011 data
->pwm_freq
[ix
]);
1013 case SYS_ZONE_AUTO_POINT3_TEMP
:
1014 data
->zone_abs
[ix
] = TEMP_TO_REG(val
);
1015 dme1737_write(data
, DME1737_REG_ZONE_ABS(ix
),
1016 data
->zone_abs
[ix
]);
1019 dev_dbg(dev
, "Unknown function %d.\n", fn
);
1021 mutex_unlock(&data
->update_lock
);
1026 /* ---------------------------------------------------------------------
1027 * Fan sysfs attributes
1029 * --------------------------------------------------------------------- */
1031 #define SYS_FAN_INPUT 0
1032 #define SYS_FAN_MIN 1
1033 #define SYS_FAN_MAX 2
1034 #define SYS_FAN_ALARM 3
1035 #define SYS_FAN_TYPE 4
1037 static ssize_t
show_fan(struct device
*dev
, struct device_attribute
*attr
,
1040 struct dme1737_data
*data
= dme1737_update_device(dev
);
1041 struct sensor_device_attribute_2
1042 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
1043 int ix
= sensor_attr_2
->index
;
1044 int fn
= sensor_attr_2
->nr
;
1049 res
= FAN_FROM_REG(data
->fan
[ix
],
1051 FAN_TPC_FROM_REG(data
->fan_opt
[ix
]));
1054 res
= FAN_FROM_REG(data
->fan_min
[ix
],
1056 FAN_TPC_FROM_REG(data
->fan_opt
[ix
]));
1059 /* only valid for fan[5-6] */
1060 res
= FAN_MAX_FROM_REG(data
->fan_max
[ix
- 4]);
1063 res
= (data
->alarms
>> DME1737_BIT_ALARM_FAN
[ix
]) & 0x01;
1066 /* only valid for fan[1-4] */
1067 res
= FAN_TYPE_FROM_REG(data
->fan_opt
[ix
]);
1071 dev_dbg(dev
, "Unknown function %d.\n", fn
);
1074 return sprintf(buf
, "%d\n", res
);
1077 static ssize_t
set_fan(struct device
*dev
, struct device_attribute
*attr
,
1078 const char *buf
, size_t count
)
1080 struct dme1737_data
*data
= dev_get_drvdata(dev
);
1081 struct sensor_device_attribute_2
1082 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
1083 int ix
= sensor_attr_2
->index
;
1084 int fn
= sensor_attr_2
->nr
;
1085 long val
= simple_strtol(buf
, NULL
, 10);
1087 mutex_lock(&data
->update_lock
);
1091 data
->fan_min
[ix
] = FAN_TO_REG(val
, 0);
1093 /* Refresh the cache */
1094 data
->fan_opt
[ix
] = dme1737_read(data
,
1095 DME1737_REG_FAN_OPT(ix
));
1096 /* Modify the fan min value */
1097 data
->fan_min
[ix
] = FAN_TO_REG(val
,
1098 FAN_TPC_FROM_REG(data
->fan_opt
[ix
]));
1100 dme1737_write(data
, DME1737_REG_FAN_MIN(ix
),
1101 data
->fan_min
[ix
] & 0xff);
1102 dme1737_write(data
, DME1737_REG_FAN_MIN(ix
) + 1,
1103 data
->fan_min
[ix
] >> 8);
1106 /* Only valid for fan[5-6] */
1107 data
->fan_max
[ix
- 4] = FAN_MAX_TO_REG(val
);
1108 dme1737_write(data
, DME1737_REG_FAN_MAX(ix
),
1109 data
->fan_max
[ix
- 4]);
1112 /* Only valid for fan[1-4] */
1113 if (!(val
== 1 || val
== 2 || val
== 4)) {
1115 dev_warn(dev
, "Fan type value %ld not "
1116 "supported. Choose one of 1, 2, or 4.\n",
1120 data
->fan_opt
[ix
] = FAN_TYPE_TO_REG(val
, dme1737_read(data
,
1121 DME1737_REG_FAN_OPT(ix
)));
1122 dme1737_write(data
, DME1737_REG_FAN_OPT(ix
),
1126 dev_dbg(dev
, "Unknown function %d.\n", fn
);
1129 mutex_unlock(&data
->update_lock
);
1134 /* ---------------------------------------------------------------------
1135 * PWM sysfs attributes
1137 * --------------------------------------------------------------------- */
1140 #define SYS_PWM_FREQ 1
1141 #define SYS_PWM_ENABLE 2
1142 #define SYS_PWM_RAMP_RATE 3
1143 #define SYS_PWM_AUTO_CHANNELS_ZONE 4
1144 #define SYS_PWM_AUTO_PWM_MIN 5
1145 #define SYS_PWM_AUTO_POINT1_PWM 6
1146 #define SYS_PWM_AUTO_POINT2_PWM 7
1148 static ssize_t
show_pwm(struct device
*dev
, struct device_attribute
*attr
,
1151 struct dme1737_data
*data
= dme1737_update_device(dev
);
1152 struct sensor_device_attribute_2
1153 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
1154 int ix
= sensor_attr_2
->index
;
1155 int fn
= sensor_attr_2
->nr
;
1160 if (PWM_EN_FROM_REG(data
->pwm_config
[ix
]) == 0) {
1163 res
= data
->pwm
[ix
];
1167 res
= PWM_FREQ_FROM_REG(data
->pwm_freq
[ix
]);
1169 case SYS_PWM_ENABLE
:
1171 res
= 1; /* pwm[5-6] hard-wired to manual mode */
1173 res
= PWM_EN_FROM_REG(data
->pwm_config
[ix
]);
1176 case SYS_PWM_RAMP_RATE
:
1177 /* Only valid for pwm[1-3] */
1178 res
= PWM_RR_FROM_REG(data
->pwm_rr
[ix
> 0], ix
);
1180 case SYS_PWM_AUTO_CHANNELS_ZONE
:
1181 /* Only valid for pwm[1-3] */
1182 if (PWM_EN_FROM_REG(data
->pwm_config
[ix
]) == 2) {
1183 res
= PWM_ACZ_FROM_REG(data
->pwm_config
[ix
]);
1185 res
= data
->pwm_acz
[ix
];
1188 case SYS_PWM_AUTO_PWM_MIN
:
1189 /* Only valid for pwm[1-3] */
1190 if (PWM_OFF_FROM_REG(data
->pwm_rr
[0], ix
)) {
1191 res
= data
->pwm_min
[ix
];
1196 case SYS_PWM_AUTO_POINT1_PWM
:
1197 /* Only valid for pwm[1-3] */
1198 res
= data
->pwm_min
[ix
];
1200 case SYS_PWM_AUTO_POINT2_PWM
:
1201 /* Only valid for pwm[1-3] */
1202 res
= 255; /* hard-wired */
1206 dev_dbg(dev
, "Unknown function %d.\n", fn
);
1209 return sprintf(buf
, "%d\n", res
);
1212 static struct attribute
*dme1737_pwm_chmod_attr
[];
1213 static void dme1737_chmod_file(struct device
*, struct attribute
*, mode_t
);
1215 static ssize_t
set_pwm(struct device
*dev
, struct device_attribute
*attr
,
1216 const char *buf
, size_t count
)
1218 struct dme1737_data
*data
= dev_get_drvdata(dev
);
1219 struct sensor_device_attribute_2
1220 *sensor_attr_2
= to_sensor_dev_attr_2(attr
);
1221 int ix
= sensor_attr_2
->index
;
1222 int fn
= sensor_attr_2
->nr
;
1223 long val
= simple_strtol(buf
, NULL
, 10);
1225 mutex_lock(&data
->update_lock
);
1228 data
->pwm
[ix
] = SENSORS_LIMIT(val
, 0, 255);
1229 dme1737_write(data
, DME1737_REG_PWM(ix
), data
->pwm
[ix
]);
1232 data
->pwm_freq
[ix
] = PWM_FREQ_TO_REG(val
, dme1737_read(data
,
1233 DME1737_REG_PWM_FREQ(ix
)));
1234 dme1737_write(data
, DME1737_REG_PWM_FREQ(ix
),
1235 data
->pwm_freq
[ix
]);
1237 case SYS_PWM_ENABLE
:
1238 /* Only valid for pwm[1-3] */
1239 if (val
< 0 || val
> 2) {
1241 dev_warn(dev
, "PWM enable %ld not "
1242 "supported. Choose one of 0, 1, or 2.\n",
1246 /* Refresh the cache */
1247 data
->pwm_config
[ix
] = dme1737_read(data
,
1248 DME1737_REG_PWM_CONFIG(ix
));
1249 if (val
== PWM_EN_FROM_REG(data
->pwm_config
[ix
])) {
1250 /* Bail out if no change */
1253 /* Do some housekeeping if we are currently in auto mode */
1254 if (PWM_EN_FROM_REG(data
->pwm_config
[ix
]) == 2) {
1255 /* Save the current zone channel assignment */
1256 data
->pwm_acz
[ix
] = PWM_ACZ_FROM_REG(
1257 data
->pwm_config
[ix
]);
1258 /* Save the current ramp rate state and disable it */
1259 data
->pwm_rr
[ix
> 0] = dme1737_read(data
,
1260 DME1737_REG_PWM_RR(ix
> 0));
1261 data
->pwm_rr_en
&= ~(1 << ix
);
1262 if (PWM_RR_EN_FROM_REG(data
->pwm_rr
[ix
> 0], ix
)) {
1263 data
->pwm_rr_en
|= (1 << ix
);
1264 data
->pwm_rr
[ix
> 0] = PWM_RR_EN_TO_REG(0, ix
,
1265 data
->pwm_rr
[ix
> 0]);
1267 DME1737_REG_PWM_RR(ix
> 0),
1268 data
->pwm_rr
[ix
> 0]);
1271 /* Set the new PWM mode */
1274 /* Change permissions of pwm[ix] to read-only */
1275 dme1737_chmod_file(dev
, dme1737_pwm_chmod_attr
[ix
],
1277 /* Turn fan fully on */
1278 data
->pwm_config
[ix
] = PWM_EN_TO_REG(0,
1279 data
->pwm_config
[ix
]);
1280 dme1737_write(data
, DME1737_REG_PWM_CONFIG(ix
),
1281 data
->pwm_config
[ix
]);
1284 /* Turn on manual mode */
1285 data
->pwm_config
[ix
] = PWM_EN_TO_REG(1,
1286 data
->pwm_config
[ix
]);
1287 dme1737_write(data
, DME1737_REG_PWM_CONFIG(ix
),
1288 data
->pwm_config
[ix
]);
1289 /* Change permissions of pwm[ix] to read-writeable */
1290 dme1737_chmod_file(dev
, dme1737_pwm_chmod_attr
[ix
],
1294 /* Change permissions of pwm[ix] to read-only */
1295 dme1737_chmod_file(dev
, dme1737_pwm_chmod_attr
[ix
],
1297 /* Turn on auto mode using the saved zone channel
1299 data
->pwm_config
[ix
] = PWM_ACZ_TO_REG(
1301 data
->pwm_config
[ix
]);
1302 dme1737_write(data
, DME1737_REG_PWM_CONFIG(ix
),
1303 data
->pwm_config
[ix
]);
1304 /* Enable PWM ramp rate if previously enabled */
1305 if (data
->pwm_rr_en
& (1 << ix
)) {
1306 data
->pwm_rr
[ix
> 0] = PWM_RR_EN_TO_REG(1, ix
,
1308 DME1737_REG_PWM_RR(ix
> 0)));
1310 DME1737_REG_PWM_RR(ix
> 0),
1311 data
->pwm_rr
[ix
> 0]);
1316 case SYS_PWM_RAMP_RATE
:
1317 /* Only valid for pwm[1-3] */
1318 /* Refresh the cache */
1319 data
->pwm_config
[ix
] = dme1737_read(data
,
1320 DME1737_REG_PWM_CONFIG(ix
));
1321 data
->pwm_rr
[ix
> 0] = dme1737_read(data
,
1322 DME1737_REG_PWM_RR(ix
> 0));
1323 /* Set the ramp rate value */
1325 data
->pwm_rr
[ix
> 0] = PWM_RR_TO_REG(val
, ix
,
1326 data
->pwm_rr
[ix
> 0]);
1328 /* Enable/disable the feature only if the associated PWM
1329 * output is in automatic mode. */
1330 if (PWM_EN_FROM_REG(data
->pwm_config
[ix
]) == 2) {
1331 data
->pwm_rr
[ix
> 0] = PWM_RR_EN_TO_REG(val
> 0, ix
,
1332 data
->pwm_rr
[ix
> 0]);
1334 dme1737_write(data
, DME1737_REG_PWM_RR(ix
> 0),
1335 data
->pwm_rr
[ix
> 0]);
1337 case SYS_PWM_AUTO_CHANNELS_ZONE
:
1338 /* Only valid for pwm[1-3] */
1339 if (!(val
== 1 || val
== 2 || val
== 4 ||
1340 val
== 6 || val
== 7)) {
1342 dev_warn(dev
, "PWM auto channels zone %ld "
1343 "not supported. Choose one of 1, 2, 4, 6, "
1347 /* Refresh the cache */
1348 data
->pwm_config
[ix
] = dme1737_read(data
,
1349 DME1737_REG_PWM_CONFIG(ix
));
1350 if (PWM_EN_FROM_REG(data
->pwm_config
[ix
]) == 2) {
1351 /* PWM is already in auto mode so update the temp
1352 * channel assignment */
1353 data
->pwm_config
[ix
] = PWM_ACZ_TO_REG(val
,
1354 data
->pwm_config
[ix
]);
1355 dme1737_write(data
, DME1737_REG_PWM_CONFIG(ix
),
1356 data
->pwm_config
[ix
]);
1358 /* PWM is not in auto mode so we save the temp
1359 * channel assignment for later use */
1360 data
->pwm_acz
[ix
] = val
;
1363 case SYS_PWM_AUTO_PWM_MIN
:
1364 /* Only valid for pwm[1-3] */
1365 /* Refresh the cache */
1366 data
->pwm_min
[ix
] = dme1737_read(data
,
1367 DME1737_REG_PWM_MIN(ix
));
1368 /* There are only 2 values supported for the auto_pwm_min
1369 * value: 0 or auto_point1_pwm. So if the temperature drops
1370 * below the auto_point1_temp_hyst value, the fan either turns
1371 * off or runs at auto_point1_pwm duty-cycle. */
1372 if (val
> ((data
->pwm_min
[ix
] + 1) / 2)) {
1373 data
->pwm_rr
[0] = PWM_OFF_TO_REG(1, ix
,
1375 DME1737_REG_PWM_RR(0)));
1377 data
->pwm_rr
[0] = PWM_OFF_TO_REG(0, ix
,
1379 DME1737_REG_PWM_RR(0)));
1381 dme1737_write(data
, DME1737_REG_PWM_RR(0),
1384 case SYS_PWM_AUTO_POINT1_PWM
:
1385 /* Only valid for pwm[1-3] */
1386 data
->pwm_min
[ix
] = SENSORS_LIMIT(val
, 0, 255);
1387 dme1737_write(data
, DME1737_REG_PWM_MIN(ix
),
1391 dev_dbg(dev
, "Unknown function %d.\n", fn
);
1394 mutex_unlock(&data
->update_lock
);
1399 /* ---------------------------------------------------------------------
1400 * Miscellaneous sysfs attributes
1401 * --------------------------------------------------------------------- */
1403 static ssize_t
show_vrm(struct device
*dev
, struct device_attribute
*attr
,
1406 struct i2c_client
*client
= to_i2c_client(dev
);
1407 struct dme1737_data
*data
= i2c_get_clientdata(client
);
1409 return sprintf(buf
, "%d\n", data
->vrm
);
1412 static ssize_t
set_vrm(struct device
*dev
, struct device_attribute
*attr
,
1413 const char *buf
, size_t count
)
1415 struct dme1737_data
*data
= dev_get_drvdata(dev
);
1416 long val
= simple_strtol(buf
, NULL
, 10);
1422 static ssize_t
show_vid(struct device
*dev
, struct device_attribute
*attr
,
1425 struct dme1737_data
*data
= dme1737_update_device(dev
);
1427 return sprintf(buf
, "%d\n", vid_from_reg(data
->vid
, data
->vrm
));
1430 static ssize_t
show_name(struct device
*dev
, struct device_attribute
*attr
,
1433 struct dme1737_data
*data
= dev_get_drvdata(dev
);
1435 return sprintf(buf
, "%s\n", data
->name
);
1438 /* ---------------------------------------------------------------------
1439 * Sysfs device attribute defines and structs
1440 * --------------------------------------------------------------------- */
1444 #define SENSOR_DEVICE_ATTR_IN(ix) \
1445 static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
1446 show_in, NULL, SYS_IN_INPUT, ix); \
1447 static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
1448 show_in, set_in, SYS_IN_MIN, ix); \
1449 static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
1450 show_in, set_in, SYS_IN_MAX, ix); \
1451 static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
1452 show_in, NULL, SYS_IN_ALARM, ix)
1454 SENSOR_DEVICE_ATTR_IN(0);
1455 SENSOR_DEVICE_ATTR_IN(1);
1456 SENSOR_DEVICE_ATTR_IN(2);
1457 SENSOR_DEVICE_ATTR_IN(3);
1458 SENSOR_DEVICE_ATTR_IN(4);
1459 SENSOR_DEVICE_ATTR_IN(5);
1460 SENSOR_DEVICE_ATTR_IN(6);
1462 /* Temperatures 1-3 */
1464 #define SENSOR_DEVICE_ATTR_TEMP(ix) \
1465 static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
1466 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
1467 static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
1468 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
1469 static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
1470 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
1471 static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
1472 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
1473 static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
1474 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
1475 static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
1476 show_temp, NULL, SYS_TEMP_FAULT, ix-1)
1478 SENSOR_DEVICE_ATTR_TEMP(1);
1479 SENSOR_DEVICE_ATTR_TEMP(2);
1480 SENSOR_DEVICE_ATTR_TEMP(3);
1484 #define SENSOR_DEVICE_ATTR_ZONE(ix) \
1485 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
1486 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
1487 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
1488 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
1489 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
1490 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
1491 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
1492 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
1493 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
1494 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
1496 SENSOR_DEVICE_ATTR_ZONE(1);
1497 SENSOR_DEVICE_ATTR_ZONE(2);
1498 SENSOR_DEVICE_ATTR_ZONE(3);
1502 #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1503 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1504 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1505 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1506 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1507 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1508 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1509 static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
1510 show_fan, set_fan, SYS_FAN_TYPE, ix-1)
1512 SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1513 SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1514 SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1515 SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1519 #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1520 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1521 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1522 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1523 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1524 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1525 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1526 static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
1527 show_fan, set_fan, SYS_FAN_MAX, ix-1)
1529 SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1530 SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1534 #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1535 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1536 show_pwm, set_pwm, SYS_PWM, ix-1); \
1537 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1538 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1539 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1540 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
1541 static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
1542 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
1543 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
1544 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
1545 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
1546 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
1547 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
1548 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
1549 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
1550 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
1552 SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1553 SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1554 SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1558 #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
1559 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1560 show_pwm, set_pwm, SYS_PWM, ix-1); \
1561 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1562 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1563 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1564 show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
1566 SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1567 SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1571 static DEVICE_ATTR(vrm
, S_IRUGO
| S_IWUSR
, show_vrm
, set_vrm
);
1572 static DEVICE_ATTR(cpu0_vid
, S_IRUGO
, show_vid
, NULL
);
1573 static DEVICE_ATTR(name
, S_IRUGO
, show_name
, NULL
); /* for ISA devices */
1575 /* This struct holds all the attributes that are always present and need to be
1576 * created unconditionally. The attributes that need modification of their
1577 * permissions are created read-only and write permissions are added or removed
1578 * on the fly when required */
1579 static struct attribute
*dme1737_attr
[] ={
1581 &sensor_dev_attr_in0_input
.dev_attr
.attr
,
1582 &sensor_dev_attr_in0_min
.dev_attr
.attr
,
1583 &sensor_dev_attr_in0_max
.dev_attr
.attr
,
1584 &sensor_dev_attr_in0_alarm
.dev_attr
.attr
,
1585 &sensor_dev_attr_in1_input
.dev_attr
.attr
,
1586 &sensor_dev_attr_in1_min
.dev_attr
.attr
,
1587 &sensor_dev_attr_in1_max
.dev_attr
.attr
,
1588 &sensor_dev_attr_in1_alarm
.dev_attr
.attr
,
1589 &sensor_dev_attr_in2_input
.dev_attr
.attr
,
1590 &sensor_dev_attr_in2_min
.dev_attr
.attr
,
1591 &sensor_dev_attr_in2_max
.dev_attr
.attr
,
1592 &sensor_dev_attr_in2_alarm
.dev_attr
.attr
,
1593 &sensor_dev_attr_in3_input
.dev_attr
.attr
,
1594 &sensor_dev_attr_in3_min
.dev_attr
.attr
,
1595 &sensor_dev_attr_in3_max
.dev_attr
.attr
,
1596 &sensor_dev_attr_in3_alarm
.dev_attr
.attr
,
1597 &sensor_dev_attr_in4_input
.dev_attr
.attr
,
1598 &sensor_dev_attr_in4_min
.dev_attr
.attr
,
1599 &sensor_dev_attr_in4_max
.dev_attr
.attr
,
1600 &sensor_dev_attr_in4_alarm
.dev_attr
.attr
,
1601 &sensor_dev_attr_in5_input
.dev_attr
.attr
,
1602 &sensor_dev_attr_in5_min
.dev_attr
.attr
,
1603 &sensor_dev_attr_in5_max
.dev_attr
.attr
,
1604 &sensor_dev_attr_in5_alarm
.dev_attr
.attr
,
1605 &sensor_dev_attr_in6_input
.dev_attr
.attr
,
1606 &sensor_dev_attr_in6_min
.dev_attr
.attr
,
1607 &sensor_dev_attr_in6_max
.dev_attr
.attr
,
1608 &sensor_dev_attr_in6_alarm
.dev_attr
.attr
,
1610 &sensor_dev_attr_temp1_input
.dev_attr
.attr
,
1611 &sensor_dev_attr_temp1_min
.dev_attr
.attr
,
1612 &sensor_dev_attr_temp1_max
.dev_attr
.attr
,
1613 &sensor_dev_attr_temp1_alarm
.dev_attr
.attr
,
1614 &sensor_dev_attr_temp1_fault
.dev_attr
.attr
,
1615 &sensor_dev_attr_temp2_input
.dev_attr
.attr
,
1616 &sensor_dev_attr_temp2_min
.dev_attr
.attr
,
1617 &sensor_dev_attr_temp2_max
.dev_attr
.attr
,
1618 &sensor_dev_attr_temp2_alarm
.dev_attr
.attr
,
1619 &sensor_dev_attr_temp2_fault
.dev_attr
.attr
,
1620 &sensor_dev_attr_temp3_input
.dev_attr
.attr
,
1621 &sensor_dev_attr_temp3_min
.dev_attr
.attr
,
1622 &sensor_dev_attr_temp3_max
.dev_attr
.attr
,
1623 &sensor_dev_attr_temp3_alarm
.dev_attr
.attr
,
1624 &sensor_dev_attr_temp3_fault
.dev_attr
.attr
,
1626 &sensor_dev_attr_zone1_auto_point1_temp
.dev_attr
.attr
,
1627 &sensor_dev_attr_zone1_auto_point2_temp
.dev_attr
.attr
,
1628 &sensor_dev_attr_zone1_auto_point3_temp
.dev_attr
.attr
,
1629 &sensor_dev_attr_zone1_auto_channels_temp
.dev_attr
.attr
,
1630 &sensor_dev_attr_zone2_auto_point1_temp
.dev_attr
.attr
,
1631 &sensor_dev_attr_zone2_auto_point2_temp
.dev_attr
.attr
,
1632 &sensor_dev_attr_zone2_auto_point3_temp
.dev_attr
.attr
,
1633 &sensor_dev_attr_zone2_auto_channels_temp
.dev_attr
.attr
,
1637 static const struct attribute_group dme1737_group
= {
1638 .attrs
= dme1737_attr
,
1641 /* The following struct holds temp offset attributes, which are not available
1642 * in all chips. The following chips support them:
1643 * DME1737, SCH311x */
1644 static struct attribute
*dme1737_temp_offset_attr
[] = {
1645 &sensor_dev_attr_temp1_offset
.dev_attr
.attr
,
1646 &sensor_dev_attr_temp2_offset
.dev_attr
.attr
,
1647 &sensor_dev_attr_temp3_offset
.dev_attr
.attr
,
1651 static const struct attribute_group dme1737_temp_offset_group
= {
1652 .attrs
= dme1737_temp_offset_attr
,
1655 /* The following struct holds VID related attributes, which are not available
1656 * in all chips. The following chips support them:
1658 static struct attribute
*dme1737_vid_attr
[] = {
1660 &dev_attr_cpu0_vid
.attr
,
1664 static const struct attribute_group dme1737_vid_group
= {
1665 .attrs
= dme1737_vid_attr
,
1668 /* The following struct holds temp zone 3 related attributes, which are not
1669 * available in all chips. The following chips support them:
1670 * DME1737, SCH311x, SCH5027 */
1671 static struct attribute
*dme1737_zone3_attr
[] = {
1672 &sensor_dev_attr_zone3_auto_point1_temp
.dev_attr
.attr
,
1673 &sensor_dev_attr_zone3_auto_point2_temp
.dev_attr
.attr
,
1674 &sensor_dev_attr_zone3_auto_point3_temp
.dev_attr
.attr
,
1675 &sensor_dev_attr_zone3_auto_channels_temp
.dev_attr
.attr
,
1679 static const struct attribute_group dme1737_zone3_group
= {
1680 .attrs
= dme1737_zone3_attr
,
1684 /* The following struct holds temp zone hysteresis related attributes, which
1685 * are not available in all chips. The following chips support them:
1686 * DME1737, SCH311x */
1687 static struct attribute
*dme1737_zone_hyst_attr
[] = {
1688 &sensor_dev_attr_zone1_auto_point1_temp_hyst
.dev_attr
.attr
,
1689 &sensor_dev_attr_zone2_auto_point1_temp_hyst
.dev_attr
.attr
,
1690 &sensor_dev_attr_zone3_auto_point1_temp_hyst
.dev_attr
.attr
,
1694 static const struct attribute_group dme1737_zone_hyst_group
= {
1695 .attrs
= dme1737_zone_hyst_attr
,
1698 /* The following structs hold the PWM attributes, some of which are optional.
1699 * Their creation depends on the chip configuration which is determined during
1701 static struct attribute
*dme1737_pwm1_attr
[] = {
1702 &sensor_dev_attr_pwm1
.dev_attr
.attr
,
1703 &sensor_dev_attr_pwm1_freq
.dev_attr
.attr
,
1704 &sensor_dev_attr_pwm1_enable
.dev_attr
.attr
,
1705 &sensor_dev_attr_pwm1_ramp_rate
.dev_attr
.attr
,
1706 &sensor_dev_attr_pwm1_auto_channels_zone
.dev_attr
.attr
,
1707 &sensor_dev_attr_pwm1_auto_point1_pwm
.dev_attr
.attr
,
1708 &sensor_dev_attr_pwm1_auto_point2_pwm
.dev_attr
.attr
,
1711 static struct attribute
*dme1737_pwm2_attr
[] = {
1712 &sensor_dev_attr_pwm2
.dev_attr
.attr
,
1713 &sensor_dev_attr_pwm2_freq
.dev_attr
.attr
,
1714 &sensor_dev_attr_pwm2_enable
.dev_attr
.attr
,
1715 &sensor_dev_attr_pwm2_ramp_rate
.dev_attr
.attr
,
1716 &sensor_dev_attr_pwm2_auto_channels_zone
.dev_attr
.attr
,
1717 &sensor_dev_attr_pwm2_auto_point1_pwm
.dev_attr
.attr
,
1718 &sensor_dev_attr_pwm2_auto_point2_pwm
.dev_attr
.attr
,
1721 static struct attribute
*dme1737_pwm3_attr
[] = {
1722 &sensor_dev_attr_pwm3
.dev_attr
.attr
,
1723 &sensor_dev_attr_pwm3_freq
.dev_attr
.attr
,
1724 &sensor_dev_attr_pwm3_enable
.dev_attr
.attr
,
1725 &sensor_dev_attr_pwm3_ramp_rate
.dev_attr
.attr
,
1726 &sensor_dev_attr_pwm3_auto_channels_zone
.dev_attr
.attr
,
1727 &sensor_dev_attr_pwm3_auto_point1_pwm
.dev_attr
.attr
,
1728 &sensor_dev_attr_pwm3_auto_point2_pwm
.dev_attr
.attr
,
1731 static struct attribute
*dme1737_pwm5_attr
[] = {
1732 &sensor_dev_attr_pwm5
.dev_attr
.attr
,
1733 &sensor_dev_attr_pwm5_freq
.dev_attr
.attr
,
1734 &sensor_dev_attr_pwm5_enable
.dev_attr
.attr
,
1737 static struct attribute
*dme1737_pwm6_attr
[] = {
1738 &sensor_dev_attr_pwm6
.dev_attr
.attr
,
1739 &sensor_dev_attr_pwm6_freq
.dev_attr
.attr
,
1740 &sensor_dev_attr_pwm6_enable
.dev_attr
.attr
,
1744 static const struct attribute_group dme1737_pwm_group
[] = {
1745 { .attrs
= dme1737_pwm1_attr
},
1746 { .attrs
= dme1737_pwm2_attr
},
1747 { .attrs
= dme1737_pwm3_attr
},
1749 { .attrs
= dme1737_pwm5_attr
},
1750 { .attrs
= dme1737_pwm6_attr
},
1753 /* The following struct holds auto PWM min attributes, which are not available
1754 * in all chips. Their creation depends on the chip type which is determined
1755 * during module load. */
1756 static struct attribute
*dme1737_auto_pwm_min_attr
[] = {
1757 &sensor_dev_attr_pwm1_auto_pwm_min
.dev_attr
.attr
,
1758 &sensor_dev_attr_pwm2_auto_pwm_min
.dev_attr
.attr
,
1759 &sensor_dev_attr_pwm3_auto_pwm_min
.dev_attr
.attr
,
1762 /* The following structs hold the fan attributes, some of which are optional.
1763 * Their creation depends on the chip configuration which is determined during
1765 static struct attribute
*dme1737_fan1_attr
[] = {
1766 &sensor_dev_attr_fan1_input
.dev_attr
.attr
,
1767 &sensor_dev_attr_fan1_min
.dev_attr
.attr
,
1768 &sensor_dev_attr_fan1_alarm
.dev_attr
.attr
,
1769 &sensor_dev_attr_fan1_type
.dev_attr
.attr
,
1772 static struct attribute
*dme1737_fan2_attr
[] = {
1773 &sensor_dev_attr_fan2_input
.dev_attr
.attr
,
1774 &sensor_dev_attr_fan2_min
.dev_attr
.attr
,
1775 &sensor_dev_attr_fan2_alarm
.dev_attr
.attr
,
1776 &sensor_dev_attr_fan2_type
.dev_attr
.attr
,
1779 static struct attribute
*dme1737_fan3_attr
[] = {
1780 &sensor_dev_attr_fan3_input
.dev_attr
.attr
,
1781 &sensor_dev_attr_fan3_min
.dev_attr
.attr
,
1782 &sensor_dev_attr_fan3_alarm
.dev_attr
.attr
,
1783 &sensor_dev_attr_fan3_type
.dev_attr
.attr
,
1786 static struct attribute
*dme1737_fan4_attr
[] = {
1787 &sensor_dev_attr_fan4_input
.dev_attr
.attr
,
1788 &sensor_dev_attr_fan4_min
.dev_attr
.attr
,
1789 &sensor_dev_attr_fan4_alarm
.dev_attr
.attr
,
1790 &sensor_dev_attr_fan4_type
.dev_attr
.attr
,
1793 static struct attribute
*dme1737_fan5_attr
[] = {
1794 &sensor_dev_attr_fan5_input
.dev_attr
.attr
,
1795 &sensor_dev_attr_fan5_min
.dev_attr
.attr
,
1796 &sensor_dev_attr_fan5_alarm
.dev_attr
.attr
,
1797 &sensor_dev_attr_fan5_max
.dev_attr
.attr
,
1800 static struct attribute
*dme1737_fan6_attr
[] = {
1801 &sensor_dev_attr_fan6_input
.dev_attr
.attr
,
1802 &sensor_dev_attr_fan6_min
.dev_attr
.attr
,
1803 &sensor_dev_attr_fan6_alarm
.dev_attr
.attr
,
1804 &sensor_dev_attr_fan6_max
.dev_attr
.attr
,
1808 static const struct attribute_group dme1737_fan_group
[] = {
1809 { .attrs
= dme1737_fan1_attr
},
1810 { .attrs
= dme1737_fan2_attr
},
1811 { .attrs
= dme1737_fan3_attr
},
1812 { .attrs
= dme1737_fan4_attr
},
1813 { .attrs
= dme1737_fan5_attr
},
1814 { .attrs
= dme1737_fan6_attr
},
1817 /* The permissions of the following zone attributes are changed to read-
1818 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
1819 static struct attribute
*dme1737_zone_chmod_attr
[] = {
1820 &sensor_dev_attr_zone1_auto_point1_temp
.dev_attr
.attr
,
1821 &sensor_dev_attr_zone1_auto_point2_temp
.dev_attr
.attr
,
1822 &sensor_dev_attr_zone1_auto_point3_temp
.dev_attr
.attr
,
1823 &sensor_dev_attr_zone2_auto_point1_temp
.dev_attr
.attr
,
1824 &sensor_dev_attr_zone2_auto_point2_temp
.dev_attr
.attr
,
1825 &sensor_dev_attr_zone2_auto_point3_temp
.dev_attr
.attr
,
1829 static const struct attribute_group dme1737_zone_chmod_group
= {
1830 .attrs
= dme1737_zone_chmod_attr
,
1834 /* The permissions of the following zone 3 attributes are changed to read-
1835 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
1836 static struct attribute
*dme1737_zone3_chmod_attr
[] = {
1837 &sensor_dev_attr_zone3_auto_point1_temp
.dev_attr
.attr
,
1838 &sensor_dev_attr_zone3_auto_point2_temp
.dev_attr
.attr
,
1839 &sensor_dev_attr_zone3_auto_point3_temp
.dev_attr
.attr
,
1843 static const struct attribute_group dme1737_zone3_chmod_group
= {
1844 .attrs
= dme1737_zone3_chmod_attr
,
1847 /* The permissions of the following PWM attributes are changed to read-
1848 * writeable if the chip is *not* locked and the respective PWM is available.
1849 * Otherwise they stay read-only. */
1850 static struct attribute
*dme1737_pwm1_chmod_attr
[] = {
1851 &sensor_dev_attr_pwm1_freq
.dev_attr
.attr
,
1852 &sensor_dev_attr_pwm1_enable
.dev_attr
.attr
,
1853 &sensor_dev_attr_pwm1_ramp_rate
.dev_attr
.attr
,
1854 &sensor_dev_attr_pwm1_auto_channels_zone
.dev_attr
.attr
,
1855 &sensor_dev_attr_pwm1_auto_point1_pwm
.dev_attr
.attr
,
1858 static struct attribute
*dme1737_pwm2_chmod_attr
[] = {
1859 &sensor_dev_attr_pwm2_freq
.dev_attr
.attr
,
1860 &sensor_dev_attr_pwm2_enable
.dev_attr
.attr
,
1861 &sensor_dev_attr_pwm2_ramp_rate
.dev_attr
.attr
,
1862 &sensor_dev_attr_pwm2_auto_channels_zone
.dev_attr
.attr
,
1863 &sensor_dev_attr_pwm2_auto_point1_pwm
.dev_attr
.attr
,
1866 static struct attribute
*dme1737_pwm3_chmod_attr
[] = {
1867 &sensor_dev_attr_pwm3_freq
.dev_attr
.attr
,
1868 &sensor_dev_attr_pwm3_enable
.dev_attr
.attr
,
1869 &sensor_dev_attr_pwm3_ramp_rate
.dev_attr
.attr
,
1870 &sensor_dev_attr_pwm3_auto_channels_zone
.dev_attr
.attr
,
1871 &sensor_dev_attr_pwm3_auto_point1_pwm
.dev_attr
.attr
,
1874 static struct attribute
*dme1737_pwm5_chmod_attr
[] = {
1875 &sensor_dev_attr_pwm5
.dev_attr
.attr
,
1876 &sensor_dev_attr_pwm5_freq
.dev_attr
.attr
,
1879 static struct attribute
*dme1737_pwm6_chmod_attr
[] = {
1880 &sensor_dev_attr_pwm6
.dev_attr
.attr
,
1881 &sensor_dev_attr_pwm6_freq
.dev_attr
.attr
,
1885 static const struct attribute_group dme1737_pwm_chmod_group
[] = {
1886 { .attrs
= dme1737_pwm1_chmod_attr
},
1887 { .attrs
= dme1737_pwm2_chmod_attr
},
1888 { .attrs
= dme1737_pwm3_chmod_attr
},
1890 { .attrs
= dme1737_pwm5_chmod_attr
},
1891 { .attrs
= dme1737_pwm6_chmod_attr
},
1894 /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
1895 * chip is not locked. Otherwise they are read-only. */
1896 static struct attribute
*dme1737_pwm_chmod_attr
[] = {
1897 &sensor_dev_attr_pwm1
.dev_attr
.attr
,
1898 &sensor_dev_attr_pwm2
.dev_attr
.attr
,
1899 &sensor_dev_attr_pwm3
.dev_attr
.attr
,
1902 /* ---------------------------------------------------------------------
1903 * Super-IO functions
1904 * --------------------------------------------------------------------- */
1906 static inline void dme1737_sio_enter(int sio_cip
)
1908 outb(0x55, sio_cip
);
1911 static inline void dme1737_sio_exit(int sio_cip
)
1913 outb(0xaa, sio_cip
);
1916 static inline int dme1737_sio_inb(int sio_cip
, int reg
)
1919 return inb(sio_cip
+ 1);
1922 static inline void dme1737_sio_outb(int sio_cip
, int reg
, int val
)
1925 outb(val
, sio_cip
+ 1);
1928 /* ---------------------------------------------------------------------
1929 * Device initialization
1930 * --------------------------------------------------------------------- */
1932 static int dme1737_i2c_get_features(int, struct dme1737_data
*);
1934 static void dme1737_chmod_file(struct device
*dev
,
1935 struct attribute
*attr
, mode_t mode
)
1937 if (sysfs_chmod_file(&dev
->kobj
, attr
, mode
)) {
1938 dev_warn(dev
, "Failed to change permissions of %s.\n",
1943 static void dme1737_chmod_group(struct device
*dev
,
1944 const struct attribute_group
*group
,
1947 struct attribute
**attr
;
1949 for (attr
= group
->attrs
; *attr
; attr
++) {
1950 dme1737_chmod_file(dev
, *attr
, mode
);
1954 static void dme1737_remove_files(struct device
*dev
)
1956 struct dme1737_data
*data
= dev_get_drvdata(dev
);
1959 for (ix
= 0; ix
< ARRAY_SIZE(dme1737_fan_group
); ix
++) {
1960 if (data
->has_features
& HAS_FAN(ix
)) {
1961 sysfs_remove_group(&dev
->kobj
,
1962 &dme1737_fan_group
[ix
]);
1966 for (ix
= 0; ix
< ARRAY_SIZE(dme1737_pwm_group
); ix
++) {
1967 if (data
->has_features
& HAS_PWM(ix
)) {
1968 sysfs_remove_group(&dev
->kobj
,
1969 &dme1737_pwm_group
[ix
]);
1970 if ((data
->has_features
& HAS_PWM_MIN
) && ix
< 3) {
1971 sysfs_remove_file(&dev
->kobj
,
1972 dme1737_auto_pwm_min_attr
[ix
]);
1977 if (data
->has_features
& HAS_TEMP_OFFSET
) {
1978 sysfs_remove_group(&dev
->kobj
, &dme1737_temp_offset_group
);
1980 if (data
->has_features
& HAS_VID
) {
1981 sysfs_remove_group(&dev
->kobj
, &dme1737_vid_group
);
1983 if (data
->has_features
& HAS_ZONE3
) {
1984 sysfs_remove_group(&dev
->kobj
, &dme1737_zone3_group
);
1986 if (data
->has_features
& HAS_ZONE_HYST
) {
1987 sysfs_remove_group(&dev
->kobj
, &dme1737_zone_hyst_group
);
1989 sysfs_remove_group(&dev
->kobj
, &dme1737_group
);
1991 if (!data
->client
) {
1992 sysfs_remove_file(&dev
->kobj
, &dev_attr_name
.attr
);
1996 static int dme1737_create_files(struct device
*dev
)
1998 struct dme1737_data
*data
= dev_get_drvdata(dev
);
2001 /* Create a name attribute for ISA devices */
2002 if (!data
->client
&&
2003 (err
= sysfs_create_file(&dev
->kobj
, &dev_attr_name
.attr
))) {
2007 /* Create standard sysfs attributes */
2008 if ((err
= sysfs_create_group(&dev
->kobj
, &dme1737_group
))) {
2012 /* Create chip-dependent sysfs attributes */
2013 if ((data
->has_features
& HAS_TEMP_OFFSET
) &&
2014 (err
= sysfs_create_group(&dev
->kobj
,
2015 &dme1737_temp_offset_group
))) {
2018 if ((data
->has_features
& HAS_VID
) &&
2019 (err
= sysfs_create_group(&dev
->kobj
,
2020 &dme1737_vid_group
))) {
2023 if ((data
->has_features
& HAS_ZONE3
) &&
2024 (err
= sysfs_create_group(&dev
->kobj
,
2025 &dme1737_zone3_group
))) {
2028 if ((data
->has_features
& HAS_ZONE_HYST
) &&
2029 (err
= sysfs_create_group(&dev
->kobj
,
2030 &dme1737_zone_hyst_group
))) {
2034 /* Create fan sysfs attributes */
2035 for (ix
= 0; ix
< ARRAY_SIZE(dme1737_fan_group
); ix
++) {
2036 if (data
->has_features
& HAS_FAN(ix
)) {
2037 if ((err
= sysfs_create_group(&dev
->kobj
,
2038 &dme1737_fan_group
[ix
]))) {
2044 /* Create PWM sysfs attributes */
2045 for (ix
= 0; ix
< ARRAY_SIZE(dme1737_pwm_group
); ix
++) {
2046 if (data
->has_features
& HAS_PWM(ix
)) {
2047 if ((err
= sysfs_create_group(&dev
->kobj
,
2048 &dme1737_pwm_group
[ix
]))) {
2051 if ((data
->has_features
& HAS_PWM_MIN
) && ix
< 3 &&
2052 (err
= sysfs_create_file(&dev
->kobj
,
2053 dme1737_auto_pwm_min_attr
[ix
]))) {
2059 /* Inform if the device is locked. Otherwise change the permissions of
2060 * selected attributes from read-only to read-writeable. */
2061 if (data
->config
& 0x02) {
2062 dev_info(dev
, "Device is locked. Some attributes "
2063 "will be read-only.\n");
2065 /* Change permissions of zone sysfs attributes */
2066 dme1737_chmod_group(dev
, &dme1737_zone_chmod_group
,
2069 /* Change permissions of chip-dependent sysfs attributes */
2070 if (data
->has_features
& HAS_TEMP_OFFSET
) {
2071 dme1737_chmod_group(dev
, &dme1737_temp_offset_group
,
2074 if (data
->has_features
& HAS_ZONE3
) {
2075 dme1737_chmod_group(dev
, &dme1737_zone3_chmod_group
,
2078 if (data
->has_features
& HAS_ZONE_HYST
) {
2079 dme1737_chmod_group(dev
, &dme1737_zone_hyst_group
,
2083 /* Change permissions of PWM sysfs attributes */
2084 for (ix
= 0; ix
< ARRAY_SIZE(dme1737_pwm_chmod_group
); ix
++) {
2085 if (data
->has_features
& HAS_PWM(ix
)) {
2086 dme1737_chmod_group(dev
,
2087 &dme1737_pwm_chmod_group
[ix
],
2089 if ((data
->has_features
& HAS_PWM_MIN
) &&
2091 dme1737_chmod_file(dev
,
2092 dme1737_auto_pwm_min_attr
[ix
],
2098 /* Change permissions of pwm[1-3] if in manual mode */
2099 for (ix
= 0; ix
< 3; ix
++) {
2100 if ((data
->has_features
& HAS_PWM(ix
)) &&
2101 (PWM_EN_FROM_REG(data
->pwm_config
[ix
]) == 1)) {
2102 dme1737_chmod_file(dev
,
2103 dme1737_pwm_chmod_attr
[ix
],
2112 dme1737_remove_files(dev
);
2117 static int dme1737_init_device(struct device
*dev
)
2119 struct dme1737_data
*data
= dev_get_drvdata(dev
);
2120 struct i2c_client
*client
= data
->client
;
2124 /* Point to the right nominal voltages array */
2125 data
->in_nominal
= IN_NOMINAL(data
->type
);
2127 data
->config
= dme1737_read(data
, DME1737_REG_CONFIG
);
2128 /* Inform if part is not monitoring/started */
2129 if (!(data
->config
& 0x01)) {
2131 dev_err(dev
, "Device is not monitoring. "
2132 "Use the force_start load parameter to "
2137 /* Force monitoring */
2138 data
->config
|= 0x01;
2139 dme1737_write(data
, DME1737_REG_CONFIG
, data
->config
);
2141 /* Inform if part is not ready */
2142 if (!(data
->config
& 0x04)) {
2143 dev_err(dev
, "Device is not ready.\n");
2147 /* Determine which optional fan and pwm features are enabled (only
2148 * valid for I2C devices) */
2149 if (client
) { /* I2C chip */
2150 data
->config2
= dme1737_read(data
, DME1737_REG_CONFIG2
);
2151 /* Check if optional fan3 input is enabled */
2152 if (data
->config2
& 0x04) {
2153 data
->has_features
|= HAS_FAN(2);
2156 /* Fan4 and pwm3 are only available if the client's I2C address
2157 * is the default 0x2e. Otherwise the I/Os associated with
2158 * these functions are used for addr enable/select. */
2159 if (client
->addr
== 0x2e) {
2160 data
->has_features
|= HAS_FAN(3) | HAS_PWM(2);
2163 /* Determine which of the optional fan[5-6] and pwm[5-6]
2164 * features are enabled. For this, we need to query the runtime
2165 * registers through the Super-IO LPC interface. Try both
2166 * config ports 0x2e and 0x4e. */
2167 if (dme1737_i2c_get_features(0x2e, data
) &&
2168 dme1737_i2c_get_features(0x4e, data
)) {
2169 dev_warn(dev
, "Failed to query Super-IO for optional "
2174 /* Fan[1-2] and pwm[1-2] are present in all chips */
2175 data
->has_features
|= HAS_FAN(0) | HAS_FAN(1) | HAS_PWM(0) | HAS_PWM(1);
2177 /* Chip-dependent features */
2178 switch (data
->type
) {
2180 data
->has_features
|= HAS_TEMP_OFFSET
| HAS_VID
| HAS_ZONE3
|
2181 HAS_ZONE_HYST
| HAS_PWM_MIN
;
2184 data
->has_features
|= HAS_TEMP_OFFSET
| HAS_ZONE3
|
2185 HAS_ZONE_HYST
| HAS_PWM_MIN
| HAS_FAN(2) | HAS_PWM(2);
2188 data
->has_features
|= HAS_ZONE3
;
2191 data
->has_features
|= HAS_FAN(2) | HAS_PWM(2);
2197 dev_info(dev
, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, "
2198 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
2199 (data
->has_features
& HAS_PWM(2)) ? "yes" : "no",
2200 (data
->has_features
& HAS_PWM(4)) ? "yes" : "no",
2201 (data
->has_features
& HAS_PWM(5)) ? "yes" : "no",
2202 (data
->has_features
& HAS_FAN(2)) ? "yes" : "no",
2203 (data
->has_features
& HAS_FAN(3)) ? "yes" : "no",
2204 (data
->has_features
& HAS_FAN(4)) ? "yes" : "no",
2205 (data
->has_features
& HAS_FAN(5)) ? "yes" : "no");
2207 reg
= dme1737_read(data
, DME1737_REG_TACH_PWM
);
2208 /* Inform if fan-to-pwm mapping differs from the default */
2209 if (client
&& reg
!= 0xa4) { /* I2C chip */
2210 dev_warn(dev
, "Non-standard fan to pwm mapping: "
2211 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
2212 "fan4->pwm%d. Please report to the driver "
2214 (reg
& 0x03) + 1, ((reg
>> 2) & 0x03) + 1,
2215 ((reg
>> 4) & 0x03) + 1, ((reg
>> 6) & 0x03) + 1);
2216 } else if (!client
&& reg
!= 0x24) { /* ISA chip */
2217 dev_warn(dev
, "Non-standard fan to pwm mapping: "
2218 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. "
2219 "Please report to the driver maintainer.\n",
2220 (reg
& 0x03) + 1, ((reg
>> 2) & 0x03) + 1,
2221 ((reg
>> 4) & 0x03) + 1);
2224 /* Switch pwm[1-3] to manual mode if they are currently disabled and
2225 * set the duty-cycles to 0% (which is identical to the PWMs being
2227 if (!(data
->config
& 0x02)) {
2228 for (ix
= 0; ix
< 3; ix
++) {
2229 data
->pwm_config
[ix
] = dme1737_read(data
,
2230 DME1737_REG_PWM_CONFIG(ix
));
2231 if ((data
->has_features
& HAS_PWM(ix
)) &&
2232 (PWM_EN_FROM_REG(data
->pwm_config
[ix
]) == -1)) {
2233 dev_info(dev
, "Switching pwm%d to "
2234 "manual mode.\n", ix
+ 1);
2235 data
->pwm_config
[ix
] = PWM_EN_TO_REG(1,
2236 data
->pwm_config
[ix
]);
2237 dme1737_write(data
, DME1737_REG_PWM(ix
), 0);
2239 DME1737_REG_PWM_CONFIG(ix
),
2240 data
->pwm_config
[ix
]);
2245 /* Initialize the default PWM auto channels zone (acz) assignments */
2246 data
->pwm_acz
[0] = 1; /* pwm1 -> zone1 */
2247 data
->pwm_acz
[1] = 2; /* pwm2 -> zone2 */
2248 data
->pwm_acz
[2] = 4; /* pwm3 -> zone3 */
2251 if (data
->has_features
& HAS_VID
) {
2252 data
->vrm
= vid_which_vrm();
2258 /* ---------------------------------------------------------------------
2259 * I2C device detection and registration
2260 * --------------------------------------------------------------------- */
2262 static struct i2c_driver dme1737_i2c_driver
;
2264 static int dme1737_i2c_get_features(int sio_cip
, struct dme1737_data
*data
)
2269 dme1737_sio_enter(sio_cip
);
2272 * We currently know about two kinds of DME1737 and SCH5027. */
2273 reg
= force_id
? force_id
: dme1737_sio_inb(sio_cip
, 0x20);
2274 if (!(reg
== DME1737_ID_1
|| reg
== DME1737_ID_2
||
2275 reg
== SCH5027_ID
)) {
2280 /* Select logical device A (runtime registers) */
2281 dme1737_sio_outb(sio_cip
, 0x07, 0x0a);
2283 /* Get the base address of the runtime registers */
2284 if (!(addr
= (dme1737_sio_inb(sio_cip
, 0x60) << 8) |
2285 dme1737_sio_inb(sio_cip
, 0x61))) {
2290 /* Read the runtime registers to determine which optional features
2291 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
2292 * to '10' if the respective feature is enabled. */
2293 if ((inb(addr
+ 0x43) & 0x0c) == 0x08) { /* fan6 */
2294 data
->has_features
|= HAS_FAN(5);
2296 if ((inb(addr
+ 0x44) & 0x0c) == 0x08) { /* pwm6 */
2297 data
->has_features
|= HAS_PWM(5);
2299 if ((inb(addr
+ 0x45) & 0x0c) == 0x08) { /* fan5 */
2300 data
->has_features
|= HAS_FAN(4);
2302 if ((inb(addr
+ 0x46) & 0x0c) == 0x08) { /* pwm5 */
2303 data
->has_features
|= HAS_PWM(4);
2307 dme1737_sio_exit(sio_cip
);
2312 /* Return 0 if detection is successful, -ENODEV otherwise */
2313 static int dme1737_i2c_detect(struct i2c_client
*client
,
2314 struct i2c_board_info
*info
)
2316 struct i2c_adapter
*adapter
= client
->adapter
;
2317 struct device
*dev
= &adapter
->dev
;
2318 u8 company
, verstep
= 0;
2321 if (!i2c_check_functionality(adapter
, I2C_FUNC_SMBUS_BYTE_DATA
)) {
2325 company
= i2c_smbus_read_byte_data(client
, DME1737_REG_COMPANY
);
2326 verstep
= i2c_smbus_read_byte_data(client
, DME1737_REG_VERSTEP
);
2328 if (company
== DME1737_COMPANY_SMSC
&&
2329 verstep
== SCH5027_VERSTEP
) {
2331 } else if (company
== DME1737_COMPANY_SMSC
&&
2332 (verstep
& DME1737_VERSTEP_MASK
) == DME1737_VERSTEP
) {
2338 dev_info(dev
, "Found a %s chip at 0x%02x (rev 0x%02x).\n",
2339 verstep
== SCH5027_VERSTEP
? "SCH5027" : "DME1737",
2340 client
->addr
, verstep
);
2341 strlcpy(info
->type
, name
, I2C_NAME_SIZE
);
2346 static int dme1737_i2c_probe(struct i2c_client
*client
,
2347 const struct i2c_device_id
*id
)
2349 struct dme1737_data
*data
;
2350 struct device
*dev
= &client
->dev
;
2353 data
= kzalloc(sizeof(struct dme1737_data
), GFP_KERNEL
);
2359 i2c_set_clientdata(client
, data
);
2360 data
->type
= id
->driver_data
;
2361 data
->client
= client
;
2362 data
->name
= client
->name
;
2363 mutex_init(&data
->update_lock
);
2365 /* Initialize the DME1737 chip */
2366 if ((err
= dme1737_init_device(dev
))) {
2367 dev_err(dev
, "Failed to initialize device.\n");
2371 /* Create sysfs files */
2372 if ((err
= dme1737_create_files(dev
))) {
2373 dev_err(dev
, "Failed to create sysfs files.\n");
2377 /* Register device */
2378 data
->hwmon_dev
= hwmon_device_register(dev
);
2379 if (IS_ERR(data
->hwmon_dev
)) {
2380 dev_err(dev
, "Failed to register device.\n");
2381 err
= PTR_ERR(data
->hwmon_dev
);
2388 dme1737_remove_files(dev
);
2395 static int dme1737_i2c_remove(struct i2c_client
*client
)
2397 struct dme1737_data
*data
= i2c_get_clientdata(client
);
2399 hwmon_device_unregister(data
->hwmon_dev
);
2400 dme1737_remove_files(&client
->dev
);
2406 static const struct i2c_device_id dme1737_id
[] = {
2407 { "dme1737", dme1737
},
2408 { "sch5027", sch5027
},
2411 MODULE_DEVICE_TABLE(i2c
, dme1737_id
);
2413 static struct i2c_driver dme1737_i2c_driver
= {
2414 .class = I2C_CLASS_HWMON
,
2418 .probe
= dme1737_i2c_probe
,
2419 .remove
= dme1737_i2c_remove
,
2420 .id_table
= dme1737_id
,
2421 .detect
= dme1737_i2c_detect
,
2422 .address_list
= normal_i2c
,
2425 /* ---------------------------------------------------------------------
2426 * ISA device detection and registration
2427 * --------------------------------------------------------------------- */
2429 static int __init
dme1737_isa_detect(int sio_cip
, unsigned short *addr
)
2432 unsigned short base_addr
;
2434 dme1737_sio_enter(sio_cip
);
2437 * We currently know about SCH3112, SCH3114, SCH3116, and SCH5127 */
2438 reg
= force_id
? force_id
: dme1737_sio_inb(sio_cip
, 0x20);
2439 if (!(reg
== SCH3112_ID
|| reg
== SCH3114_ID
|| reg
== SCH3116_ID
||
2440 reg
== SCH5127_ID
)) {
2445 /* Select logical device A (runtime registers) */
2446 dme1737_sio_outb(sio_cip
, 0x07, 0x0a);
2448 /* Get the base address of the runtime registers */
2449 if (!(base_addr
= (dme1737_sio_inb(sio_cip
, 0x60) << 8) |
2450 dme1737_sio_inb(sio_cip
, 0x61))) {
2451 pr_err("Base address not set\n");
2456 /* Access to the hwmon registers is through an index/data register
2457 * pair located at offset 0x70/0x71. */
2458 *addr
= base_addr
+ 0x70;
2461 dme1737_sio_exit(sio_cip
);
2465 static int __init
dme1737_isa_device_add(unsigned short addr
)
2467 struct resource res
= {
2469 .end
= addr
+ DME1737_EXTENT
- 1,
2471 .flags
= IORESOURCE_IO
,
2475 err
= acpi_check_resource_conflict(&res
);
2479 if (!(pdev
= platform_device_alloc("dme1737", addr
))) {
2480 pr_err("Failed to allocate device\n");
2485 if ((err
= platform_device_add_resources(pdev
, &res
, 1))) {
2486 pr_err("Failed to add device resource (err = %d)\n", err
);
2487 goto exit_device_put
;
2490 if ((err
= platform_device_add(pdev
))) {
2491 pr_err("Failed to add device (err = %d)\n", err
);
2492 goto exit_device_put
;
2498 platform_device_put(pdev
);
2504 static int __devinit
dme1737_isa_probe(struct platform_device
*pdev
)
2507 struct resource
*res
;
2508 struct dme1737_data
*data
;
2509 struct device
*dev
= &pdev
->dev
;
2512 res
= platform_get_resource(pdev
, IORESOURCE_IO
, 0);
2513 if (!request_region(res
->start
, DME1737_EXTENT
, "dme1737")) {
2514 dev_err(dev
, "Failed to request region 0x%04x-0x%04x.\n",
2515 (unsigned short)res
->start
,
2516 (unsigned short)res
->start
+ DME1737_EXTENT
- 1);
2521 if (!(data
= kzalloc(sizeof(struct dme1737_data
), GFP_KERNEL
))) {
2523 goto exit_release_region
;
2526 data
->addr
= res
->start
;
2527 platform_set_drvdata(pdev
, data
);
2529 /* Skip chip detection if module is loaded with force_id parameter */
2534 data
->type
= sch311x
;
2537 data
->type
= sch5127
;
2540 company
= dme1737_read(data
, DME1737_REG_COMPANY
);
2541 device
= dme1737_read(data
, DME1737_REG_DEVICE
);
2543 if ((company
== DME1737_COMPANY_SMSC
) &&
2544 (device
== SCH311X_DEVICE
)) {
2545 data
->type
= sch311x
;
2546 } else if ((company
== DME1737_COMPANY_SMSC
) &&
2547 (device
== SCH5127_DEVICE
)) {
2548 data
->type
= sch5127
;
2555 if (data
->type
== sch5127
) {
2556 data
->name
= "sch5127";
2558 data
->name
= "sch311x";
2561 /* Initialize the mutex */
2562 mutex_init(&data
->update_lock
);
2564 dev_info(dev
, "Found a %s chip at 0x%04x\n",
2565 data
->type
== sch5127
? "SCH5127" : "SCH311x", data
->addr
);
2567 /* Initialize the chip */
2568 if ((err
= dme1737_init_device(dev
))) {
2569 dev_err(dev
, "Failed to initialize device.\n");
2573 /* Create sysfs files */
2574 if ((err
= dme1737_create_files(dev
))) {
2575 dev_err(dev
, "Failed to create sysfs files.\n");
2579 /* Register device */
2580 data
->hwmon_dev
= hwmon_device_register(dev
);
2581 if (IS_ERR(data
->hwmon_dev
)) {
2582 dev_err(dev
, "Failed to register device.\n");
2583 err
= PTR_ERR(data
->hwmon_dev
);
2584 goto exit_remove_files
;
2590 dme1737_remove_files(dev
);
2592 platform_set_drvdata(pdev
, NULL
);
2594 exit_release_region
:
2595 release_region(res
->start
, DME1737_EXTENT
);
2600 static int __devexit
dme1737_isa_remove(struct platform_device
*pdev
)
2602 struct dme1737_data
*data
= platform_get_drvdata(pdev
);
2604 hwmon_device_unregister(data
->hwmon_dev
);
2605 dme1737_remove_files(&pdev
->dev
);
2606 release_region(data
->addr
, DME1737_EXTENT
);
2607 platform_set_drvdata(pdev
, NULL
);
2613 static struct platform_driver dme1737_isa_driver
= {
2615 .owner
= THIS_MODULE
,
2618 .probe
= dme1737_isa_probe
,
2619 .remove
= __devexit_p(dme1737_isa_remove
),
2622 /* ---------------------------------------------------------------------
2623 * Module initialization and cleanup
2624 * --------------------------------------------------------------------- */
2626 static int __init
dme1737_init(void)
2629 unsigned short addr
;
2631 if ((err
= i2c_add_driver(&dme1737_i2c_driver
))) {
2635 if (dme1737_isa_detect(0x2e, &addr
) &&
2636 dme1737_isa_detect(0x4e, &addr
) &&
2638 (dme1737_isa_detect(0x162e, &addr
) &&
2639 dme1737_isa_detect(0x164e, &addr
)))) {
2640 /* Return 0 if we didn't find an ISA device */
2644 if ((err
= platform_driver_register(&dme1737_isa_driver
))) {
2645 goto exit_del_i2c_driver
;
2648 /* Sets global pdev as a side effect */
2649 if ((err
= dme1737_isa_device_add(addr
))) {
2650 goto exit_del_isa_driver
;
2655 exit_del_isa_driver
:
2656 platform_driver_unregister(&dme1737_isa_driver
);
2657 exit_del_i2c_driver
:
2658 i2c_del_driver(&dme1737_i2c_driver
);
2663 static void __exit
dme1737_exit(void)
2666 platform_device_unregister(pdev
);
2667 platform_driver_unregister(&dme1737_isa_driver
);
2670 i2c_del_driver(&dme1737_i2c_driver
);
2673 MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2674 MODULE_DESCRIPTION("DME1737 sensors");
2675 MODULE_LICENSE("GPL");
2677 module_init(dme1737_init
);
2678 module_exit(dme1737_exit
);