2 * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
4 * Copyright (c) 2010 Ericsson AB.
6 * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
8 * JC42.4 compliant temperature sensors are typically used on memory modules.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/i2c.h>
30 #include <linux/hwmon.h>
31 #include <linux/err.h>
32 #include <linux/mutex.h>
35 /* Addresses to scan */
36 static const unsigned short normal_i2c
[] = {
37 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END
};
39 /* JC42 registers. All registers are 16 bit. */
40 #define JC42_REG_CAP 0x00
41 #define JC42_REG_CONFIG 0x01
42 #define JC42_REG_TEMP_UPPER 0x02
43 #define JC42_REG_TEMP_LOWER 0x03
44 #define JC42_REG_TEMP_CRITICAL 0x04
45 #define JC42_REG_TEMP 0x05
46 #define JC42_REG_MANID 0x06
47 #define JC42_REG_DEVICEID 0x07
49 /* Status bits in temperature register */
50 #define JC42_ALARM_CRIT_BIT 15
51 #define JC42_ALARM_MAX_BIT 14
52 #define JC42_ALARM_MIN_BIT 13
54 /* Configuration register defines */
55 #define JC42_CFG_CRIT_ONLY (1 << 2)
56 #define JC42_CFG_TCRIT_LOCK (1 << 6)
57 #define JC42_CFG_EVENT_LOCK (1 << 7)
58 #define JC42_CFG_SHUTDOWN (1 << 8)
59 #define JC42_CFG_HYST_SHIFT 9
60 #define JC42_CFG_HYST_MASK (0x03 << 9)
63 #define JC42_CAP_RANGE (1 << 2)
65 /* Manufacturer IDs */
66 #define ADT_MANID 0x11d4 /* Analog Devices */
67 #define ATMEL_MANID 0x001f /* Atmel */
68 #define ATMEL_MANID2 0x1114 /* Atmel */
69 #define MAX_MANID 0x004d /* Maxim */
70 #define IDT_MANID 0x00b3 /* IDT */
71 #define MCP_MANID 0x0054 /* Microchip */
72 #define NXP_MANID 0x1131 /* NXP Semiconductors */
73 #define ONS_MANID 0x1b09 /* ON Semiconductor */
74 #define STM_MANID 0x104a /* ST Microelectronics */
75 #define GT_MANID 0x1c68 /* Giantec */
76 #define GT_MANID2 0x132d /* Giantec, 2nd mfg ID */
81 #define ADT7408_DEVID 0x0801
82 #define ADT7408_DEVID_MASK 0xffff
85 #define AT30TS00_DEVID 0x8201
86 #define AT30TS00_DEVID_MASK 0xffff
88 #define AT30TSE004_DEVID 0x2200
89 #define AT30TSE004_DEVID_MASK 0xffff
92 #define GT30TS00_DEVID 0x2200
93 #define GT30TS00_DEVID_MASK 0xff00
95 #define GT34TS02_DEVID 0x3300
96 #define GT34TS02_DEVID_MASK 0xff00
99 #define TSE2004_DEVID 0x2200
100 #define TSE2004_DEVID_MASK 0xff00
102 #define TS3000_DEVID 0x2900 /* Also matches TSE2002 */
103 #define TS3000_DEVID_MASK 0xff00
105 #define TS3001_DEVID 0x3000
106 #define TS3001_DEVID_MASK 0xff00
109 #define MAX6604_DEVID 0x3e00
110 #define MAX6604_DEVID_MASK 0xffff
113 #define MCP9804_DEVID 0x0200
114 #define MCP9804_DEVID_MASK 0xfffc
116 #define MCP9808_DEVID 0x0400
117 #define MCP9808_DEVID_MASK 0xfffc
119 #define MCP98242_DEVID 0x2000
120 #define MCP98242_DEVID_MASK 0xfffc
122 #define MCP98243_DEVID 0x2100
123 #define MCP98243_DEVID_MASK 0xfffc
125 #define MCP98244_DEVID 0x2200
126 #define MCP98244_DEVID_MASK 0xfffc
128 #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
129 #define MCP9843_DEVID_MASK 0xfffe
132 #define SE97_DEVID 0xa200
133 #define SE97_DEVID_MASK 0xfffc
135 #define SE98_DEVID 0xa100
136 #define SE98_DEVID_MASK 0xfffc
138 /* ON Semiconductor */
139 #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
140 #define CAT6095_DEVID_MASK 0xffe0
142 #define CAT34TS02C_DEVID 0x0a00
143 #define CAT34TS02C_DEVID_MASK 0xfff0
145 #define CAT34TS04_DEVID 0x2200
146 #define CAT34TS04_DEVID_MASK 0xfff0
148 /* ST Microelectronics */
149 #define STTS424_DEVID 0x0101
150 #define STTS424_DEVID_MASK 0xffff
152 #define STTS424E_DEVID 0x0000
153 #define STTS424E_DEVID_MASK 0xfffe
155 #define STTS2002_DEVID 0x0300
156 #define STTS2002_DEVID_MASK 0xffff
158 #define STTS2004_DEVID 0x2201
159 #define STTS2004_DEVID_MASK 0xffff
161 #define STTS3000_DEVID 0x0200
162 #define STTS3000_DEVID_MASK 0xffff
164 static u16 jc42_hysteresis
[] = { 0, 1500, 3000, 6000 };
172 static struct jc42_chips jc42_chips
[] = {
173 { ADT_MANID
, ADT7408_DEVID
, ADT7408_DEVID_MASK
},
174 { ATMEL_MANID
, AT30TS00_DEVID
, AT30TS00_DEVID_MASK
},
175 { ATMEL_MANID2
, AT30TSE004_DEVID
, AT30TSE004_DEVID_MASK
},
176 { GT_MANID
, GT30TS00_DEVID
, GT30TS00_DEVID_MASK
},
177 { GT_MANID2
, GT34TS02_DEVID
, GT34TS02_DEVID_MASK
},
178 { IDT_MANID
, TSE2004_DEVID
, TSE2004_DEVID_MASK
},
179 { IDT_MANID
, TS3000_DEVID
, TS3000_DEVID_MASK
},
180 { IDT_MANID
, TS3001_DEVID
, TS3001_DEVID_MASK
},
181 { MAX_MANID
, MAX6604_DEVID
, MAX6604_DEVID_MASK
},
182 { MCP_MANID
, MCP9804_DEVID
, MCP9804_DEVID_MASK
},
183 { MCP_MANID
, MCP9808_DEVID
, MCP9808_DEVID_MASK
},
184 { MCP_MANID
, MCP98242_DEVID
, MCP98242_DEVID_MASK
},
185 { MCP_MANID
, MCP98243_DEVID
, MCP98243_DEVID_MASK
},
186 { MCP_MANID
, MCP98244_DEVID
, MCP98244_DEVID_MASK
},
187 { MCP_MANID
, MCP9843_DEVID
, MCP9843_DEVID_MASK
},
188 { NXP_MANID
, SE97_DEVID
, SE97_DEVID_MASK
},
189 { ONS_MANID
, CAT6095_DEVID
, CAT6095_DEVID_MASK
},
190 { ONS_MANID
, CAT34TS02C_DEVID
, CAT34TS02C_DEVID_MASK
},
191 { ONS_MANID
, CAT34TS04_DEVID
, CAT34TS04_DEVID_MASK
},
192 { NXP_MANID
, SE98_DEVID
, SE98_DEVID_MASK
},
193 { STM_MANID
, STTS424_DEVID
, STTS424_DEVID_MASK
},
194 { STM_MANID
, STTS424E_DEVID
, STTS424E_DEVID_MASK
},
195 { STM_MANID
, STTS2002_DEVID
, STTS2002_DEVID_MASK
},
196 { STM_MANID
, STTS2004_DEVID
, STTS2004_DEVID_MASK
},
197 { STM_MANID
, STTS3000_DEVID
, STTS3000_DEVID_MASK
},
208 static const u8 temp_regs
[t_num_temp
] = {
209 [t_input
] = JC42_REG_TEMP
,
210 [t_crit
] = JC42_REG_TEMP_CRITICAL
,
211 [t_min
] = JC42_REG_TEMP_LOWER
,
212 [t_max
] = JC42_REG_TEMP_UPPER
,
215 /* Each client has this additional data */
217 struct i2c_client
*client
;
218 struct mutex update_lock
; /* protect register access */
219 bool extended
; /* true if extended range supported */
221 unsigned long last_updated
; /* In jiffies */
222 u16 orig_config
; /* original configuration */
223 u16 config
; /* current configuration */
224 u16 temp
[t_num_temp
];/* Temperatures */
227 #define JC42_TEMP_MIN_EXTENDED (-40000)
228 #define JC42_TEMP_MIN 0
229 #define JC42_TEMP_MAX 125000
231 static u16
jc42_temp_to_reg(long temp
, bool extended
)
233 int ntemp
= clamp_val(temp
,
234 extended
? JC42_TEMP_MIN_EXTENDED
:
235 JC42_TEMP_MIN
, JC42_TEMP_MAX
);
237 /* convert from 0.001 to 0.0625 resolution */
238 return (ntemp
* 2 / 125) & 0x1fff;
241 static int jc42_temp_from_reg(s16 reg
)
243 reg
= sign_extend32(reg
, 12);
245 /* convert from 0.0625 to 0.001 resolution */
246 return reg
* 125 / 2;
249 static struct jc42_data
*jc42_update_device(struct device
*dev
)
251 struct jc42_data
*data
= dev_get_drvdata(dev
);
252 struct i2c_client
*client
= data
->client
;
253 struct jc42_data
*ret
= data
;
256 mutex_lock(&data
->update_lock
);
258 if (time_after(jiffies
, data
->last_updated
+ HZ
) || !data
->valid
) {
259 for (i
= 0; i
< t_num_temp
; i
++) {
260 val
= i2c_smbus_read_word_swapped(client
, temp_regs
[i
]);
267 data
->last_updated
= jiffies
;
271 mutex_unlock(&data
->update_lock
);
275 static int jc42_read(struct device
*dev
, enum hwmon_sensor_types type
,
276 u32 attr
, int channel
, long *val
)
278 struct jc42_data
*data
= jc42_update_device(dev
);
282 return PTR_ERR(data
);
285 case hwmon_temp_input
:
286 *val
= jc42_temp_from_reg(data
->temp
[t_input
]);
289 *val
= jc42_temp_from_reg(data
->temp
[t_min
]);
292 *val
= jc42_temp_from_reg(data
->temp
[t_max
]);
294 case hwmon_temp_crit
:
295 *val
= jc42_temp_from_reg(data
->temp
[t_crit
]);
297 case hwmon_temp_max_hyst
:
298 temp
= jc42_temp_from_reg(data
->temp
[t_max
]);
299 hyst
= jc42_hysteresis
[(data
->config
& JC42_CFG_HYST_MASK
)
300 >> JC42_CFG_HYST_SHIFT
];
303 case hwmon_temp_crit_hyst
:
304 temp
= jc42_temp_from_reg(data
->temp
[t_crit
]);
305 hyst
= jc42_hysteresis
[(data
->config
& JC42_CFG_HYST_MASK
)
306 >> JC42_CFG_HYST_SHIFT
];
309 case hwmon_temp_min_alarm
:
310 *val
= (data
->temp
[t_input
] >> JC42_ALARM_MIN_BIT
) & 1;
312 case hwmon_temp_max_alarm
:
313 *val
= (data
->temp
[t_input
] >> JC42_ALARM_MAX_BIT
) & 1;
315 case hwmon_temp_crit_alarm
:
316 *val
= (data
->temp
[t_input
] >> JC42_ALARM_CRIT_BIT
) & 1;
323 static int jc42_write(struct device
*dev
, enum hwmon_sensor_types type
,
324 u32 attr
, int channel
, long val
)
326 struct jc42_data
*data
= dev_get_drvdata(dev
);
327 struct i2c_client
*client
= data
->client
;
331 mutex_lock(&data
->update_lock
);
335 data
->temp
[t_min
] = jc42_temp_to_reg(val
, data
->extended
);
336 ret
= i2c_smbus_write_word_swapped(client
, temp_regs
[t_min
],
340 data
->temp
[t_max
] = jc42_temp_to_reg(val
, data
->extended
);
341 ret
= i2c_smbus_write_word_swapped(client
, temp_regs
[t_max
],
344 case hwmon_temp_crit
:
345 data
->temp
[t_crit
] = jc42_temp_to_reg(val
, data
->extended
);
346 ret
= i2c_smbus_write_word_swapped(client
, temp_regs
[t_crit
],
349 case hwmon_temp_crit_hyst
:
351 * JC42.4 compliant chips only support four hysteresis values.
352 * Pick best choice and go from there.
354 val
= clamp_val(val
, (data
->extended
? JC42_TEMP_MIN_EXTENDED
355 : JC42_TEMP_MIN
) - 6000,
357 diff
= jc42_temp_from_reg(data
->temp
[t_crit
]) - val
;
361 hyst
= 1; /* 1.5 degrees C */
362 else if (diff
< 4500)
363 hyst
= 2; /* 3.0 degrees C */
365 hyst
= 3; /* 6.0 degrees C */
367 data
->config
= (data
->config
& ~JC42_CFG_HYST_MASK
) |
368 (hyst
<< JC42_CFG_HYST_SHIFT
);
369 ret
= i2c_smbus_write_word_swapped(data
->client
,
378 mutex_unlock(&data
->update_lock
);
383 static umode_t
jc42_is_visible(const void *_data
, enum hwmon_sensor_types type
,
384 u32 attr
, int channel
)
386 const struct jc42_data
*data
= _data
;
387 unsigned int config
= data
->config
;
388 umode_t mode
= S_IRUGO
;
393 if (!(config
& JC42_CFG_EVENT_LOCK
))
396 case hwmon_temp_crit
:
397 if (!(config
& JC42_CFG_TCRIT_LOCK
))
400 case hwmon_temp_crit_hyst
:
401 if (!(config
& (JC42_CFG_EVENT_LOCK
| JC42_CFG_TCRIT_LOCK
)))
404 case hwmon_temp_input
:
405 case hwmon_temp_max_hyst
:
406 case hwmon_temp_min_alarm
:
407 case hwmon_temp_max_alarm
:
408 case hwmon_temp_crit_alarm
:
417 /* Return 0 if detection is successful, -ENODEV otherwise */
418 static int jc42_detect(struct i2c_client
*client
, struct i2c_board_info
*info
)
420 struct i2c_adapter
*adapter
= client
->adapter
;
421 int i
, config
, cap
, manid
, devid
;
423 if (!i2c_check_functionality(adapter
, I2C_FUNC_SMBUS_BYTE_DATA
|
424 I2C_FUNC_SMBUS_WORD_DATA
))
427 cap
= i2c_smbus_read_word_swapped(client
, JC42_REG_CAP
);
428 config
= i2c_smbus_read_word_swapped(client
, JC42_REG_CONFIG
);
429 manid
= i2c_smbus_read_word_swapped(client
, JC42_REG_MANID
);
430 devid
= i2c_smbus_read_word_swapped(client
, JC42_REG_DEVICEID
);
432 if (cap
< 0 || config
< 0 || manid
< 0 || devid
< 0)
435 if ((cap
& 0xff00) || (config
& 0xf800))
438 for (i
= 0; i
< ARRAY_SIZE(jc42_chips
); i
++) {
439 struct jc42_chips
*chip
= &jc42_chips
[i
];
440 if (manid
== chip
->manid
&&
441 (devid
& chip
->devid_mask
) == chip
->devid
) {
442 strlcpy(info
->type
, "jc42", I2C_NAME_SIZE
);
449 static const u32 jc42_temp_config
[] = {
450 HWMON_T_INPUT
| HWMON_T_MIN
| HWMON_T_MAX
| HWMON_T_CRIT
|
451 HWMON_T_MAX_HYST
| HWMON_T_CRIT_HYST
|
452 HWMON_T_MIN_ALARM
| HWMON_T_MAX_ALARM
| HWMON_T_CRIT_ALARM
,
456 static const struct hwmon_channel_info jc42_temp
= {
458 .config
= jc42_temp_config
,
461 static const struct hwmon_channel_info
*jc42_info
[] = {
466 static const struct hwmon_ops jc42_hwmon_ops
= {
467 .is_visible
= jc42_is_visible
,
472 static const struct hwmon_chip_info jc42_chip_info
= {
473 .ops
= &jc42_hwmon_ops
,
477 static int jc42_probe(struct i2c_client
*client
, const struct i2c_device_id
*id
)
479 struct device
*dev
= &client
->dev
;
480 struct device
*hwmon_dev
;
481 struct jc42_data
*data
;
484 data
= devm_kzalloc(dev
, sizeof(struct jc42_data
), GFP_KERNEL
);
488 data
->client
= client
;
489 i2c_set_clientdata(client
, data
);
490 mutex_init(&data
->update_lock
);
492 cap
= i2c_smbus_read_word_swapped(client
, JC42_REG_CAP
);
496 data
->extended
= !!(cap
& JC42_CAP_RANGE
);
498 config
= i2c_smbus_read_word_swapped(client
, JC42_REG_CONFIG
);
502 data
->orig_config
= config
;
503 if (config
& JC42_CFG_SHUTDOWN
) {
504 config
&= ~JC42_CFG_SHUTDOWN
;
505 i2c_smbus_write_word_swapped(client
, JC42_REG_CONFIG
, config
);
507 data
->config
= config
;
509 hwmon_dev
= devm_hwmon_device_register_with_info(dev
, client
->name
,
510 data
, &jc42_chip_info
,
512 return PTR_ERR_OR_ZERO(hwmon_dev
);
515 static int jc42_remove(struct i2c_client
*client
)
517 struct jc42_data
*data
= i2c_get_clientdata(client
);
519 /* Restore original configuration except hysteresis */
520 if ((data
->config
& ~JC42_CFG_HYST_MASK
) !=
521 (data
->orig_config
& ~JC42_CFG_HYST_MASK
)) {
524 config
= (data
->orig_config
& ~JC42_CFG_HYST_MASK
)
525 | (data
->config
& JC42_CFG_HYST_MASK
);
526 i2c_smbus_write_word_swapped(client
, JC42_REG_CONFIG
, config
);
533 static int jc42_suspend(struct device
*dev
)
535 struct jc42_data
*data
= dev_get_drvdata(dev
);
537 data
->config
|= JC42_CFG_SHUTDOWN
;
538 i2c_smbus_write_word_swapped(data
->client
, JC42_REG_CONFIG
,
543 static int jc42_resume(struct device
*dev
)
545 struct jc42_data
*data
= dev_get_drvdata(dev
);
547 data
->config
&= ~JC42_CFG_SHUTDOWN
;
548 i2c_smbus_write_word_swapped(data
->client
, JC42_REG_CONFIG
,
553 static const struct dev_pm_ops jc42_dev_pm_ops
= {
554 .suspend
= jc42_suspend
,
555 .resume
= jc42_resume
,
558 #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
560 #define JC42_DEV_PM_OPS NULL
561 #endif /* CONFIG_PM */
563 static const struct i2c_device_id jc42_id
[] = {
567 MODULE_DEVICE_TABLE(i2c
, jc42_id
);
570 static const struct of_device_id jc42_of_ids
[] = {
571 { .compatible
= "jedec,jc-42.4-temp", },
574 MODULE_DEVICE_TABLE(of
, jc42_of_ids
);
577 static struct i2c_driver jc42_driver
= {
578 .class = I2C_CLASS_SPD
| I2C_CLASS_HWMON
,
581 .pm
= JC42_DEV_PM_OPS
,
582 .of_match_table
= of_match_ptr(jc42_of_ids
),
585 .remove
= jc42_remove
,
587 .detect
= jc42_detect
,
588 .address_list
= normal_i2c
,
591 module_i2c_driver(jc42_driver
);
593 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
594 MODULE_DESCRIPTION("JC42 driver");
595 MODULE_LICENSE("GPL");