drivers/hwmon/lis3lv02d.h

   1 /*
   2  *  lis3lv02d.h - ST LIS3LV02DL accelerometer driver
   3  *
   4  *  Copyright (C) 2007-2008 Yan Burman
   5  *  Copyright (C) 2008 Eric Piel
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License as published by
   9  *  the Free Software Foundation; either version 2 of the License, or
  10  *  (at your option) any later version.
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21 #include <linux/platform_device.h>
  22 #include <linux/input-polldev.h>
  23
  24 /*
  25  * The actual chip is STMicroelectronics LIS3LV02DL or LIS3LV02DQ that seems to
  26  * be connected via SPI. There exists also several similar chips (such as LIS302DL or
  27  * LIS3L02DQ) and they have slightly different registers, but we can provide a
  28  * common interface for all of them.
  29  * They can also be connected via I²C.
  30  */
  31
  32 /* 2-byte registers */
  33 #define LIS_DOUBLE_ID   0x3A /* LIS3LV02D[LQ] */
  34 /* 1-byte registers */
  35 #define LIS_SINGLE_ID   0x3B /* LIS[32]02DL and others */
  36
  37 enum lis3lv02d_reg {
  38         WHO_AM_I        = 0x0F,
  39         OFFSET_X        = 0x16,
  40         OFFSET_Y        = 0x17,
  41         OFFSET_Z        = 0x18,
  42         GAIN_X          = 0x19,
  43         GAIN_Y          = 0x1A,
  44         GAIN_Z          = 0x1B,
  45         CTRL_REG1       = 0x20,
  46         CTRL_REG2       = 0x21,
  47         CTRL_REG3       = 0x22,
  48         HP_FILTER_RESET = 0x23,
  49         STATUS_REG      = 0x27,
  50         OUTX_L          = 0x28,
  51         OUTX_H          = 0x29,
  52         OUTX            = 0x29,
  53         OUTY_L          = 0x2A,
  54         OUTY_H          = 0x2B,
  55         OUTY            = 0x2B,
  56         OUTZ_L          = 0x2C,
  57         OUTZ_H          = 0x2D,
  58         OUTZ            = 0x2D,
  59         FF_WU_CFG       = 0x30,
  60         FF_WU_SRC       = 0x31,
  61         FF_WU_ACK       = 0x32,
  62         FF_WU_THS_L     = 0x34,
  63         FF_WU_THS_H     = 0x35,
  64         FF_WU_DURATION  = 0x36,
  65         DD_CFG          = 0x38,
  66         DD_SRC          = 0x39,
  67         DD_ACK          = 0x3A,
  68         DD_THSI_L       = 0x3C,
  69         DD_THSI_H       = 0x3D,
  70         DD_THSE_L       = 0x3E,
  71         DD_THSE_H       = 0x3F,
  72 };
  73
  74 enum lis3lv02d_ctrl1 {
  75         CTRL1_Xen       = 0x01,
  76         CTRL1_Yen       = 0x02,
  77         CTRL1_Zen       = 0x04,
  78         CTRL1_ST        = 0x08,
  79         CTRL1_DF0       = 0x10,
  80         CTRL1_DF1       = 0x20,
  81         CTRL1_PD0       = 0x40,
  82         CTRL1_PD1       = 0x80,
  83 };
  84 enum lis3lv02d_ctrl2 {
  85         CTRL2_DAS       = 0x01,
  86         CTRL2_SIM       = 0x02,
  87         CTRL2_DRDY      = 0x04,
  88         CTRL2_IEN       = 0x08,
  89         CTRL2_BOOT      = 0x10,
  90         CTRL2_BLE       = 0x20,
  91         CTRL2_BDU       = 0x40, /* Block Data Update */
  92         CTRL2_FS        = 0x80, /* Full Scale selection */
  93 };
  94
  95
  96 enum lis3lv02d_ctrl3 {
  97         CTRL3_CFS0      = 0x01,
  98         CTRL3_CFS1      = 0x02,
  99         CTRL3_FDS       = 0x10,
 100         CTRL3_HPFF      = 0x20,
 101         CTRL3_HPDD      = 0x40,
 102         CTRL3_ECK       = 0x80,
 103 };
 104
 105 enum lis3lv02d_status_reg {
 106         STATUS_XDA      = 0x01,
 107         STATUS_YDA      = 0x02,
 108         STATUS_ZDA      = 0x04,
 109         STATUS_XYZDA    = 0x08,
 110         STATUS_XOR      = 0x10,
 111         STATUS_YOR      = 0x20,
 112         STATUS_ZOR      = 0x40,
 113         STATUS_XYZOR    = 0x80,
 114 };
 115
 116 enum lis3lv02d_ff_wu_cfg {
 117         FF_WU_CFG_XLIE  = 0x01,
 118         FF_WU_CFG_XHIE  = 0x02,
 119         FF_WU_CFG_YLIE  = 0x04,
 120         FF_WU_CFG_YHIE  = 0x08,
 121         FF_WU_CFG_ZLIE  = 0x10,
 122         FF_WU_CFG_ZHIE  = 0x20,
 123         FF_WU_CFG_LIR   = 0x40,
 124         FF_WU_CFG_AOI   = 0x80,
 125 };
 126
 127 enum lis3lv02d_ff_wu_src {
 128         FF_WU_SRC_XL    = 0x01,
 129         FF_WU_SRC_XH    = 0x02,
 130         FF_WU_SRC_YL    = 0x04,
 131         FF_WU_SRC_YH    = 0x08,
 132         FF_WU_SRC_ZL    = 0x10,
 133         FF_WU_SRC_ZH    = 0x20,
 134         FF_WU_SRC_IA    = 0x40,
 135 };
 136
 137 enum lis3lv02d_dd_cfg {
 138         DD_CFG_XLIE     = 0x01,
 139         DD_CFG_XHIE     = 0x02,
 140         DD_CFG_YLIE     = 0x04,
 141         DD_CFG_YHIE     = 0x08,
 142         DD_CFG_ZLIE     = 0x10,
 143         DD_CFG_ZHIE     = 0x20,
 144         DD_CFG_LIR      = 0x40,
 145         DD_CFG_IEND     = 0x80,
 146 };
 147
 148 enum lis3lv02d_dd_src {
 149         DD_SRC_XL       = 0x01,
 150         DD_SRC_XH       = 0x02,
 151         DD_SRC_YL       = 0x04,
 152         DD_SRC_YH       = 0x08,
 153         DD_SRC_ZL       = 0x10,
 154         DD_SRC_ZH       = 0x20,
 155         DD_SRC_IA       = 0x40,
 156 };
 157
 158 struct axis_conversion {
 159         s8      x;
 160         s8      y;
 161         s8      z;
 162 };
 163
 164 struct lis3lv02d {
 165         void                    *bus_priv; /* used by the bus layer only */
 166         int (*init) (struct lis3lv02d *lis3);
 167         int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
 168         int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
 169
 170         u8                      whoami;    /* 3Ah: 2-byte registries, 3Bh: 1-byte registries */
 171         s16 (*read_data) (struct lis3lv02d *lis3, int reg);
 172         int                     mdps_max_val;
 173
 174         struct input_polled_dev *idev;     /* input device */
 175         struct platform_device  *pdev;     /* platform device */
 176         atomic_t                count;     /* interrupt count after last read */
 177         int                     xcalib;    /* calibrated null value for x */
 178         int                     ycalib;    /* calibrated null value for y */
 179         int                     zcalib;    /* calibrated null value for z */
 180         struct axis_conversion  ac;        /* hw -> logical axis */
 181
 182         u32                     irq;       /* IRQ number */
 183         struct fasync_struct    *async_queue; /* queue for the misc device */
 184         wait_queue_head_t       misc_wait; /* Wait queue for the misc device */
 185         unsigned long           misc_opened; /* bit0: whether the device is open */
 186 };
 187
 188 int lis3lv02d_init_device(struct lis3lv02d *lis3);
 189 int lis3lv02d_joystick_enable(void);
 190 void lis3lv02d_joystick_disable(void);
 191 void lis3lv02d_poweroff(struct lis3lv02d *lis3);
 192 void lis3lv02d_poweron(struct lis3lv02d *lis3);
 193 int lis3lv02d_remove_fs(struct lis3lv02d *lis3);
 194
 195 extern struct lis3lv02d lis3_dev;