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hwmon: (nct6775) Add power management support
[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / nct6775.c
1 /*
2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
4 *
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
6 *
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
14 *
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 *
33 * Supports the following chips:
34 *
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
39 *
40 * #temp lists the number of monitored temperature sources (first value) plus
41 * the number of directly connectable temperature sensors (second value).
42 */
43
44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/slab.h>
49 #include <linux/jiffies.h>
50 #include <linux/platform_device.h>
51 #include <linux/hwmon.h>
52 #include <linux/hwmon-sysfs.h>
53 #include <linux/hwmon-vid.h>
54 #include <linux/err.h>
55 #include <linux/mutex.h>
56 #include <linux/acpi.h>
57 #include <linux/io.h>
58 #include "lm75.h"
59
60 #define USE_ALTERNATE
61
62 enum kinds { nct6775, nct6776, nct6779 };
63
64 /* used to set data->name = nct6775_device_names[data->sio_kind] */
65 static const char * const nct6775_device_names[] = {
66 "nct6775",
67 "nct6776",
68 "nct6779",
69 };
70
71 static unsigned short force_id;
72 module_param(force_id, ushort, 0);
73 MODULE_PARM_DESC(force_id, "Override the detected device ID");
74
75 static unsigned short fan_debounce;
76 module_param(fan_debounce, ushort, 0);
77 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
78
79 #define DRVNAME "nct6775"
80
81 /*
82 * Super-I/O constants and functions
83 */
84
85 #define NCT6775_LD_ACPI 0x0a
86 #define NCT6775_LD_HWM 0x0b
87 #define NCT6775_LD_VID 0x0d
88
89 #define SIO_REG_LDSEL 0x07 /* Logical device select */
90 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
91 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
92 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
93
94 #define SIO_NCT6775_ID 0xb470
95 #define SIO_NCT6776_ID 0xc330
96 #define SIO_NCT6779_ID 0xc560
97 #define SIO_ID_MASK 0xFFF0
98
99 static inline void
100 superio_outb(int ioreg, int reg, int val)
101 {
102 outb(reg, ioreg);
103 outb(val, ioreg + 1);
104 }
105
106 static inline int
107 superio_inb(int ioreg, int reg)
108 {
109 outb(reg, ioreg);
110 return inb(ioreg + 1);
111 }
112
113 static inline void
114 superio_select(int ioreg, int ld)
115 {
116 outb(SIO_REG_LDSEL, ioreg);
117 outb(ld, ioreg + 1);
118 }
119
120 static inline int
121 superio_enter(int ioreg)
122 {
123 /*
124 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
125 */
126 if (!request_muxed_region(ioreg, 2, DRVNAME))
127 return -EBUSY;
128
129 outb(0x87, ioreg);
130 outb(0x87, ioreg);
131
132 return 0;
133 }
134
135 static inline void
136 superio_exit(int ioreg)
137 {
138 outb(0xaa, ioreg);
139 outb(0x02, ioreg);
140 outb(0x02, ioreg + 1);
141 release_region(ioreg, 2);
142 }
143
144 /*
145 * ISA constants
146 */
147
148 #define IOREGION_ALIGNMENT (~7)
149 #define IOREGION_OFFSET 5
150 #define IOREGION_LENGTH 2
151 #define ADDR_REG_OFFSET 0
152 #define DATA_REG_OFFSET 1
153
154 #define NCT6775_REG_BANK 0x4E
155 #define NCT6775_REG_CONFIG 0x40
156
157 /*
158 * Not currently used:
159 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
160 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
161 * REG_MAN_ID is at port 0x4f
162 * REG_CHIP_ID is at port 0x58
163 */
164
165 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
166 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
167
168 #define NUM_REG_ALARM 4 /* Max number of alarm registers */
169
170 /* Common and NCT6775 specific data */
171
172 /* Voltage min/max registers for nr=7..14 are in bank 5 */
173
174 static const u16 NCT6775_REG_IN_MAX[] = {
175 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
176 0x55c, 0x55e, 0x560, 0x562 };
177 static const u16 NCT6775_REG_IN_MIN[] = {
178 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
179 0x55d, 0x55f, 0x561, 0x563 };
180 static const u16 NCT6775_REG_IN[] = {
181 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
182 };
183
184 #define NCT6775_REG_VBAT 0x5D
185 #define NCT6775_REG_DIODE 0x5E
186
187 #define NCT6775_REG_FANDIV1 0x506
188 #define NCT6775_REG_FANDIV2 0x507
189
190 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
191
192 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
193
194 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
195
196 static const s8 NCT6775_ALARM_BITS[] = {
197 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
198 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
199 -1, /* unused */
200 6, 7, 11, 10, 23, /* fan1..fan5 */
201 -1, -1, -1, /* unused */
202 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
203 12, -1 }; /* intrusion0, intrusion1 */
204
205 #define FAN_ALARM_BASE 16
206 #define TEMP_ALARM_BASE 24
207 #define INTRUSION_ALARM_BASE 30
208
209 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
210 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
211
212 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
213 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
214 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
215
216 static const u16 NCT6775_REG_TEMP[] = {
217 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
218
219 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
220 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
221 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
222 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
223 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
224 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
225
226 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
227 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
228
229 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
230
231 static const char *const nct6775_temp_label[] = {
232 "",
233 "SYSTIN",
234 "CPUTIN",
235 "AUXTIN",
236 "AMD SB-TSI",
237 "PECI Agent 0",
238 "PECI Agent 1",
239 "PECI Agent 2",
240 "PECI Agent 3",
241 "PECI Agent 4",
242 "PECI Agent 5",
243 "PECI Agent 6",
244 "PECI Agent 7",
245 "PCH_CHIP_CPU_MAX_TEMP",
246 "PCH_CHIP_TEMP",
247 "PCH_CPU_TEMP",
248 "PCH_MCH_TEMP",
249 "PCH_DIM0_TEMP",
250 "PCH_DIM1_TEMP",
251 "PCH_DIM2_TEMP",
252 "PCH_DIM3_TEMP"
253 };
254
255 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
256 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
257
258 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
259 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
260 0xa07 };
261
262 /* NCT6776 specific data */
263
264 static const s8 NCT6776_ALARM_BITS[] = {
265 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
266 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
267 -1, /* unused */
268 6, 7, 11, 10, 23, /* fan1..fan5 */
269 -1, -1, -1, /* unused */
270 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
271 12, 9 }; /* intrusion0, intrusion1 */
272
273 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
274 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
275
276 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
277 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
278
279 static const char *const nct6776_temp_label[] = {
280 "",
281 "SYSTIN",
282 "CPUTIN",
283 "AUXTIN",
284 "SMBUSMASTER 0",
285 "SMBUSMASTER 1",
286 "SMBUSMASTER 2",
287 "SMBUSMASTER 3",
288 "SMBUSMASTER 4",
289 "SMBUSMASTER 5",
290 "SMBUSMASTER 6",
291 "SMBUSMASTER 7",
292 "PECI Agent 0",
293 "PECI Agent 1",
294 "PCH_CHIP_CPU_MAX_TEMP",
295 "PCH_CHIP_TEMP",
296 "PCH_CPU_TEMP",
297 "PCH_MCH_TEMP",
298 "PCH_DIM0_TEMP",
299 "PCH_DIM1_TEMP",
300 "PCH_DIM2_TEMP",
301 "PCH_DIM3_TEMP",
302 "BYTE_TEMP"
303 };
304
305 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
306 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
307
308 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
309 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
310
311 /* NCT6779 specific data */
312
313 static const u16 NCT6779_REG_IN[] = {
314 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
315 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
316
317 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
318 0x459, 0x45A, 0x45B, 0x568 };
319
320 static const s8 NCT6779_ALARM_BITS[] = {
321 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
322 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
323 -1, /* unused */
324 6, 7, 11, 10, 23, /* fan1..fan5 */
325 -1, -1, -1, /* unused */
326 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
327 12, 9 }; /* intrusion0, intrusion1 */
328
329 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
330 static const u16 NCT6779_REG_FAN_PULSES[] = {
331 0x644, 0x645, 0x646, 0x647, 0x648 };
332
333 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
334 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
335 0x18, 0x152 };
336 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
337 0x3a, 0x153 };
338 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
339 0x39, 0x155 };
340
341 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
342 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
343
344 static const char *const nct6779_temp_label[] = {
345 "",
346 "SYSTIN",
347 "CPUTIN",
348 "AUXTIN0",
349 "AUXTIN1",
350 "AUXTIN2",
351 "AUXTIN3",
352 "",
353 "SMBUSMASTER 0",
354 "SMBUSMASTER 1",
355 "SMBUSMASTER 2",
356 "SMBUSMASTER 3",
357 "SMBUSMASTER 4",
358 "SMBUSMASTER 5",
359 "SMBUSMASTER 6",
360 "SMBUSMASTER 7",
361 "PECI Agent 0",
362 "PECI Agent 1",
363 "PCH_CHIP_CPU_MAX_TEMP",
364 "PCH_CHIP_TEMP",
365 "PCH_CPU_TEMP",
366 "PCH_MCH_TEMP",
367 "PCH_DIM0_TEMP",
368 "PCH_DIM1_TEMP",
369 "PCH_DIM2_TEMP",
370 "PCH_DIM3_TEMP",
371 "BYTE_TEMP"
372 };
373
374 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
375 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
376 0, 0, 0, 0, 0, 0, 0, 0,
377 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
378 0x408, 0 };
379
380 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
381 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
382
383 /*
384 * Conversions
385 */
386
387 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
388 {
389 if (reg == 0 || reg == 255)
390 return 0;
391 return 1350000U / (reg << divreg);
392 }
393
394 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
395 {
396 if ((reg & 0xff1f) == 0xff1f)
397 return 0;
398
399 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
400
401 if (reg == 0)
402 return 0;
403
404 return 1350000U / reg;
405 }
406
407 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
408 {
409 if (reg == 0 || reg == 0xffff)
410 return 0;
411
412 /*
413 * Even though the registers are 16 bit wide, the fan divisor
414 * still applies.
415 */
416 return 1350000U / (reg << divreg);
417 }
418
419 static inline unsigned int
420 div_from_reg(u8 reg)
421 {
422 return 1 << reg;
423 }
424
425 /*
426 * Some of the voltage inputs have internal scaling, the tables below
427 * contain 8 (the ADC LSB in mV) * scaling factor * 100
428 */
429 static const u16 scale_in[15] = {
430 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
431 800, 800
432 };
433
434 static inline long in_from_reg(u8 reg, u8 nr)
435 {
436 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
437 }
438
439 static inline u8 in_to_reg(u32 val, u8 nr)
440 {
441 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
442 }
443
444 /*
445 * Data structures and manipulation thereof
446 */
447
448 struct nct6775_data {
449 int addr; /* IO base of hw monitor block */
450 enum kinds kind;
451 const char *name;
452
453 struct device *hwmon_dev;
454 struct mutex lock;
455
456 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
457 * 3=temp_crit
458 */
459 u8 temp_src[NUM_TEMP];
460 u16 reg_temp_config[NUM_TEMP];
461 const char * const *temp_label;
462 int temp_label_num;
463
464 u16 REG_CONFIG;
465 u16 REG_VBAT;
466 u16 REG_DIODE;
467
468 const s8 *ALARM_BITS;
469
470 const u16 *REG_VIN;
471 const u16 *REG_IN_MINMAX[2];
472
473 const u16 *REG_FAN;
474 const u16 *REG_FAN_MIN;
475 const u16 *REG_FAN_PULSES;
476
477 const u16 *REG_TEMP_SOURCE; /* temp register sources */
478 const u16 *REG_TEMP_OFFSET;
479
480 const u16 *REG_ALARM;
481
482 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
483 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
484
485 struct mutex update_lock;
486 bool valid; /* true if following fields are valid */
487 unsigned long last_updated; /* In jiffies */
488
489 /* Register values */
490 u8 bank; /* current register bank */
491 u8 in_num; /* number of in inputs we have */
492 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
493 unsigned int rpm[5];
494 u16 fan_min[5];
495 u8 fan_pulses[5];
496 u8 fan_div[5];
497 u8 has_fan; /* some fan inputs can be disabled */
498 u8 has_fan_min; /* some fans don't have min register */
499 bool has_fan_div;
500
501 u8 temp_fixed_num; /* 3 or 6 */
502 u8 temp_type[NUM_TEMP_FIXED];
503 s8 temp_offset[NUM_TEMP_FIXED];
504 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
505 * 3=temp_crit */
506 u64 alarms;
507
508 u8 vid;
509 u8 vrm;
510
511 u16 have_temp;
512 u16 have_temp_fixed;
513 u16 have_in;
514 #ifdef CONFIG_PM
515 /* Remember extra register values over suspend/resume */
516 u8 vbat;
517 u8 fandiv1;
518 u8 fandiv2;
519 #endif
520 };
521
522 struct nct6775_sio_data {
523 int sioreg;
524 enum kinds kind;
525 };
526
527 static bool is_word_sized(struct nct6775_data *data, u16 reg)
528 {
529 switch (data->kind) {
530 case nct6775:
531 return (((reg & 0xff00) == 0x100 ||
532 (reg & 0xff00) == 0x200) &&
533 ((reg & 0x00ff) == 0x50 ||
534 (reg & 0x00ff) == 0x53 ||
535 (reg & 0x00ff) == 0x55)) ||
536 (reg & 0xfff0) == 0x630 ||
537 reg == 0x640 || reg == 0x642 ||
538 reg == 0x662 ||
539 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
540 reg == 0x73 || reg == 0x75 || reg == 0x77;
541 case nct6776:
542 return (((reg & 0xff00) == 0x100 ||
543 (reg & 0xff00) == 0x200) &&
544 ((reg & 0x00ff) == 0x50 ||
545 (reg & 0x00ff) == 0x53 ||
546 (reg & 0x00ff) == 0x55)) ||
547 (reg & 0xfff0) == 0x630 ||
548 reg == 0x402 ||
549 reg == 0x640 || reg == 0x642 ||
550 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
551 reg == 0x73 || reg == 0x75 || reg == 0x77;
552 case nct6779:
553 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
554 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
555 reg == 0x402 ||
556 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
557 reg == 0x640 || reg == 0x642 ||
558 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
559 reg == 0x7b;
560 }
561 return false;
562 }
563
564 /*
565 * On older chips, only registers 0x50-0x5f are banked.
566 * On more recent chips, all registers are banked.
567 * Assume that is the case and set the bank number for each access.
568 * Cache the bank number so it only needs to be set if it changes.
569 */
570 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
571 {
572 u8 bank = reg >> 8;
573 if (data->bank != bank) {
574 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
575 outb_p(bank, data->addr + DATA_REG_OFFSET);
576 data->bank = bank;
577 }
578 }
579
580 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
581 {
582 int res, word_sized = is_word_sized(data, reg);
583
584 mutex_lock(&data->lock);
585
586 nct6775_set_bank(data, reg);
587 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
588 res = inb_p(data->addr + DATA_REG_OFFSET);
589 if (word_sized) {
590 outb_p((reg & 0xff) + 1,
591 data->addr + ADDR_REG_OFFSET);
592 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
593 }
594
595 mutex_unlock(&data->lock);
596 return res;
597 }
598
599 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
600 {
601 int word_sized = is_word_sized(data, reg);
602
603 mutex_lock(&data->lock);
604
605 nct6775_set_bank(data, reg);
606 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
607 if (word_sized) {
608 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
609 outb_p((reg & 0xff) + 1,
610 data->addr + ADDR_REG_OFFSET);
611 }
612 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
613
614 mutex_unlock(&data->lock);
615 return 0;
616 }
617
618 /* We left-align 8-bit temperature values to make the code simpler */
619 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
620 {
621 u16 res;
622
623 res = nct6775_read_value(data, reg);
624 if (!is_word_sized(data, reg))
625 res <<= 8;
626
627 return res;
628 }
629
630 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
631 {
632 if (!is_word_sized(data, reg))
633 value >>= 8;
634 return nct6775_write_value(data, reg, value);
635 }
636
637 /* This function assumes that the caller holds data->update_lock */
638 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
639 {
640 u8 reg;
641
642 switch (nr) {
643 case 0:
644 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
645 | (data->fan_div[0] & 0x7);
646 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
647 break;
648 case 1:
649 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
650 | ((data->fan_div[1] << 4) & 0x70);
651 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
652 break;
653 case 2:
654 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
655 | (data->fan_div[2] & 0x7);
656 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
657 break;
658 case 3:
659 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
660 | ((data->fan_div[3] << 4) & 0x70);
661 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
662 break;
663 }
664 }
665
666 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
667 {
668 if (data->kind == nct6775)
669 nct6775_write_fan_div(data, nr);
670 }
671
672 static void nct6775_update_fan_div(struct nct6775_data *data)
673 {
674 u8 i;
675
676 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
677 data->fan_div[0] = i & 0x7;
678 data->fan_div[1] = (i & 0x70) >> 4;
679 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
680 data->fan_div[2] = i & 0x7;
681 if (data->has_fan & (1<<3))
682 data->fan_div[3] = (i & 0x70) >> 4;
683 }
684
685 static void nct6775_update_fan_div_common(struct nct6775_data *data)
686 {
687 if (data->kind == nct6775)
688 nct6775_update_fan_div(data);
689 }
690
691 static void nct6775_init_fan_div(struct nct6775_data *data)
692 {
693 int i;
694
695 nct6775_update_fan_div_common(data);
696 /*
697 * For all fans, start with highest divider value if the divider
698 * register is not initialized. This ensures that we get a
699 * reading from the fan count register, even if it is not optimal.
700 * We'll compute a better divider later on.
701 */
702 for (i = 0; i < 3; i++) {
703 if (!(data->has_fan & (1 << i)))
704 continue;
705 if (data->fan_div[i] == 0) {
706 data->fan_div[i] = 7;
707 nct6775_write_fan_div_common(data, i);
708 }
709 }
710 }
711
712 static void nct6775_init_fan_common(struct device *dev,
713 struct nct6775_data *data)
714 {
715 int i;
716 u8 reg;
717
718 if (data->has_fan_div)
719 nct6775_init_fan_div(data);
720
721 /*
722 * If fan_min is not set (0), set it to 0xff to disable it. This
723 * prevents the unnecessary warning when fanX_min is reported as 0.
724 */
725 for (i = 0; i < 5; i++) {
726 if (data->has_fan_min & (1 << i)) {
727 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
728 if (!reg)
729 nct6775_write_value(data, data->REG_FAN_MIN[i],
730 data->has_fan_div ? 0xff
731 : 0xff1f);
732 }
733 }
734 }
735
736 static void nct6775_select_fan_div(struct device *dev,
737 struct nct6775_data *data, int nr, u16 reg)
738 {
739 u8 fan_div = data->fan_div[nr];
740 u16 fan_min;
741
742 if (!data->has_fan_div)
743 return;
744
745 /*
746 * If we failed to measure the fan speed, or the reported value is not
747 * in the optimal range, and the clock divider can be modified,
748 * let's try that for next time.
749 */
750 if (reg == 0x00 && fan_div < 0x07)
751 fan_div++;
752 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
753 fan_div--;
754
755 if (fan_div != data->fan_div[nr]) {
756 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
757 nr + 1, div_from_reg(data->fan_div[nr]),
758 div_from_reg(fan_div));
759
760 /* Preserve min limit if possible */
761 if (data->has_fan_min & (1 << nr)) {
762 fan_min = data->fan_min[nr];
763 if (fan_div > data->fan_div[nr]) {
764 if (fan_min != 255 && fan_min > 1)
765 fan_min >>= 1;
766 } else {
767 if (fan_min != 255) {
768 fan_min <<= 1;
769 if (fan_min > 254)
770 fan_min = 254;
771 }
772 }
773 if (fan_min != data->fan_min[nr]) {
774 data->fan_min[nr] = fan_min;
775 nct6775_write_value(data, data->REG_FAN_MIN[nr],
776 fan_min);
777 }
778 }
779 data->fan_div[nr] = fan_div;
780 nct6775_write_fan_div_common(data, nr);
781 }
782 }
783
784 static struct nct6775_data *nct6775_update_device(struct device *dev)
785 {
786 struct nct6775_data *data = dev_get_drvdata(dev);
787 int i, j;
788
789 mutex_lock(&data->update_lock);
790
791 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
792 || !data->valid) {
793 /* Fan clock dividers */
794 nct6775_update_fan_div_common(data);
795
796 /* Measured voltages and limits */
797 for (i = 0; i < data->in_num; i++) {
798 if (!(data->have_in & (1 << i)))
799 continue;
800
801 data->in[i][0] = nct6775_read_value(data,
802 data->REG_VIN[i]);
803 data->in[i][1] = nct6775_read_value(data,
804 data->REG_IN_MINMAX[0][i]);
805 data->in[i][2] = nct6775_read_value(data,
806 data->REG_IN_MINMAX[1][i]);
807 }
808
809 /* Measured fan speeds and limits */
810 for (i = 0; i < 5; i++) {
811 u16 reg;
812
813 if (!(data->has_fan & (1 << i)))
814 continue;
815
816 reg = nct6775_read_value(data, data->REG_FAN[i]);
817 data->rpm[i] = data->fan_from_reg(reg,
818 data->fan_div[i]);
819
820 if (data->has_fan_min & (1 << i))
821 data->fan_min[i] = nct6775_read_value(data,
822 data->REG_FAN_MIN[i]);
823 data->fan_pulses[i] =
824 nct6775_read_value(data, data->REG_FAN_PULSES[i]);
825
826 nct6775_select_fan_div(dev, data, i, reg);
827 }
828
829 /* Measured temperatures and limits */
830 for (i = 0; i < NUM_TEMP; i++) {
831 if (!(data->have_temp & (1 << i)))
832 continue;
833 for (j = 0; j < 4; j++) {
834 if (data->reg_temp[j][i])
835 data->temp[j][i]
836 = nct6775_read_temp(data,
837 data->reg_temp[j][i]);
838 }
839 if (!(data->have_temp_fixed & (1 << i)))
840 continue;
841 data->temp_offset[i]
842 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
843 }
844
845 data->alarms = 0;
846 for (i = 0; i < NUM_REG_ALARM; i++) {
847 u8 alarm;
848 if (!data->REG_ALARM[i])
849 continue;
850 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
851 data->alarms |= ((u64)alarm) << (i << 3);
852 }
853
854 data->last_updated = jiffies;
855 data->valid = true;
856 }
857
858 mutex_unlock(&data->update_lock);
859 return data;
860 }
861
862 /*
863 * Sysfs callback functions
864 */
865 static ssize_t
866 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
867 {
868 struct nct6775_data *data = nct6775_update_device(dev);
869 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
870 int nr = sattr->nr;
871 int index = sattr->index;
872 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
873 }
874
875 static ssize_t
876 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
877 size_t count)
878 {
879 struct nct6775_data *data = dev_get_drvdata(dev);
880 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
881 int nr = sattr->nr;
882 int index = sattr->index;
883 unsigned long val;
884 int err = kstrtoul(buf, 10, &val);
885 if (err < 0)
886 return err;
887 mutex_lock(&data->update_lock);
888 data->in[nr][index] = in_to_reg(val, nr);
889 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
890 data->in[nr][index]);
891 mutex_unlock(&data->update_lock);
892 return count;
893 }
894
895 static ssize_t
896 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
897 {
898 struct nct6775_data *data = nct6775_update_device(dev);
899 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
900 int nr = data->ALARM_BITS[sattr->index];
901 return sprintf(buf, "%u\n",
902 (unsigned int)((data->alarms >> nr) & 0x01));
903 }
904
905 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
906 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
907 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
908 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
909 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
910 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
911 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
912 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
913 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
914 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
915 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
916 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
917 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
918 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
919 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
920
921 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
922 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
923 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
924 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
925 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
926 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
927 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
928 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
929 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
930 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
931 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
932 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
933 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
934 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
935 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
936
937 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
938 store_in_reg, 0, 1);
939 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
940 store_in_reg, 1, 1);
941 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
942 store_in_reg, 2, 1);
943 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
944 store_in_reg, 3, 1);
945 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
946 store_in_reg, 4, 1);
947 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
948 store_in_reg, 5, 1);
949 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
950 store_in_reg, 6, 1);
951 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
952 store_in_reg, 7, 1);
953 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
954 store_in_reg, 8, 1);
955 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
956 store_in_reg, 9, 1);
957 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
958 store_in_reg, 10, 1);
959 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
960 store_in_reg, 11, 1);
961 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
962 store_in_reg, 12, 1);
963 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
964 store_in_reg, 13, 1);
965 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
966 store_in_reg, 14, 1);
967
968 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
969 store_in_reg, 0, 2);
970 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
971 store_in_reg, 1, 2);
972 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
973 store_in_reg, 2, 2);
974 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
975 store_in_reg, 3, 2);
976 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
977 store_in_reg, 4, 2);
978 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
979 store_in_reg, 5, 2);
980 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
981 store_in_reg, 6, 2);
982 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
983 store_in_reg, 7, 2);
984 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
985 store_in_reg, 8, 2);
986 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
987 store_in_reg, 9, 2);
988 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
989 store_in_reg, 10, 2);
990 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
991 store_in_reg, 11, 2);
992 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
993 store_in_reg, 12, 2);
994 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
995 store_in_reg, 13, 2);
996 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
997 store_in_reg, 14, 2);
998
999 static struct attribute *nct6775_attributes_in[15][5] = {
1000 {
1001 &sensor_dev_attr_in0_input.dev_attr.attr,
1002 &sensor_dev_attr_in0_min.dev_attr.attr,
1003 &sensor_dev_attr_in0_max.dev_attr.attr,
1004 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1005 NULL
1006 },
1007 {
1008 &sensor_dev_attr_in1_input.dev_attr.attr,
1009 &sensor_dev_attr_in1_min.dev_attr.attr,
1010 &sensor_dev_attr_in1_max.dev_attr.attr,
1011 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1012 NULL
1013 },
1014 {
1015 &sensor_dev_attr_in2_input.dev_attr.attr,
1016 &sensor_dev_attr_in2_min.dev_attr.attr,
1017 &sensor_dev_attr_in2_max.dev_attr.attr,
1018 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1019 NULL
1020 },
1021 {
1022 &sensor_dev_attr_in3_input.dev_attr.attr,
1023 &sensor_dev_attr_in3_min.dev_attr.attr,
1024 &sensor_dev_attr_in3_max.dev_attr.attr,
1025 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1026 NULL
1027 },
1028 {
1029 &sensor_dev_attr_in4_input.dev_attr.attr,
1030 &sensor_dev_attr_in4_min.dev_attr.attr,
1031 &sensor_dev_attr_in4_max.dev_attr.attr,
1032 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1033 NULL
1034 },
1035 {
1036 &sensor_dev_attr_in5_input.dev_attr.attr,
1037 &sensor_dev_attr_in5_min.dev_attr.attr,
1038 &sensor_dev_attr_in5_max.dev_attr.attr,
1039 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1040 NULL
1041 },
1042 {
1043 &sensor_dev_attr_in6_input.dev_attr.attr,
1044 &sensor_dev_attr_in6_min.dev_attr.attr,
1045 &sensor_dev_attr_in6_max.dev_attr.attr,
1046 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1047 NULL
1048 },
1049 {
1050 &sensor_dev_attr_in7_input.dev_attr.attr,
1051 &sensor_dev_attr_in7_min.dev_attr.attr,
1052 &sensor_dev_attr_in7_max.dev_attr.attr,
1053 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1054 NULL
1055 },
1056 {
1057 &sensor_dev_attr_in8_input.dev_attr.attr,
1058 &sensor_dev_attr_in8_min.dev_attr.attr,
1059 &sensor_dev_attr_in8_max.dev_attr.attr,
1060 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1061 NULL
1062 },
1063 {
1064 &sensor_dev_attr_in9_input.dev_attr.attr,
1065 &sensor_dev_attr_in9_min.dev_attr.attr,
1066 &sensor_dev_attr_in9_max.dev_attr.attr,
1067 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1068 NULL
1069 },
1070 {
1071 &sensor_dev_attr_in10_input.dev_attr.attr,
1072 &sensor_dev_attr_in10_min.dev_attr.attr,
1073 &sensor_dev_attr_in10_max.dev_attr.attr,
1074 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1075 NULL
1076 },
1077 {
1078 &sensor_dev_attr_in11_input.dev_attr.attr,
1079 &sensor_dev_attr_in11_min.dev_attr.attr,
1080 &sensor_dev_attr_in11_max.dev_attr.attr,
1081 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1082 NULL
1083 },
1084 {
1085 &sensor_dev_attr_in12_input.dev_attr.attr,
1086 &sensor_dev_attr_in12_min.dev_attr.attr,
1087 &sensor_dev_attr_in12_max.dev_attr.attr,
1088 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1089 NULL
1090 },
1091 {
1092 &sensor_dev_attr_in13_input.dev_attr.attr,
1093 &sensor_dev_attr_in13_min.dev_attr.attr,
1094 &sensor_dev_attr_in13_max.dev_attr.attr,
1095 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1096 NULL
1097 },
1098 {
1099 &sensor_dev_attr_in14_input.dev_attr.attr,
1100 &sensor_dev_attr_in14_min.dev_attr.attr,
1101 &sensor_dev_attr_in14_max.dev_attr.attr,
1102 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1103 NULL
1104 },
1105 };
1106
1107 static const struct attribute_group nct6775_group_in[15] = {
1108 { .attrs = nct6775_attributes_in[0] },
1109 { .attrs = nct6775_attributes_in[1] },
1110 { .attrs = nct6775_attributes_in[2] },
1111 { .attrs = nct6775_attributes_in[3] },
1112 { .attrs = nct6775_attributes_in[4] },
1113 { .attrs = nct6775_attributes_in[5] },
1114 { .attrs = nct6775_attributes_in[6] },
1115 { .attrs = nct6775_attributes_in[7] },
1116 { .attrs = nct6775_attributes_in[8] },
1117 { .attrs = nct6775_attributes_in[9] },
1118 { .attrs = nct6775_attributes_in[10] },
1119 { .attrs = nct6775_attributes_in[11] },
1120 { .attrs = nct6775_attributes_in[12] },
1121 { .attrs = nct6775_attributes_in[13] },
1122 { .attrs = nct6775_attributes_in[14] },
1123 };
1124
1125 static ssize_t
1126 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1127 {
1128 struct nct6775_data *data = nct6775_update_device(dev);
1129 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1130 int nr = sattr->index;
1131 return sprintf(buf, "%d\n", data->rpm[nr]);
1132 }
1133
1134 static ssize_t
1135 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1136 {
1137 struct nct6775_data *data = nct6775_update_device(dev);
1138 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1139 int nr = sattr->index;
1140 return sprintf(buf, "%d\n",
1141 data->fan_from_reg_min(data->fan_min[nr],
1142 data->fan_div[nr]));
1143 }
1144
1145 static ssize_t
1146 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1147 {
1148 struct nct6775_data *data = nct6775_update_device(dev);
1149 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1150 int nr = sattr->index;
1151 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1152 }
1153
1154 static ssize_t
1155 store_fan_min(struct device *dev, struct device_attribute *attr,
1156 const char *buf, size_t count)
1157 {
1158 struct nct6775_data *data = dev_get_drvdata(dev);
1159 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1160 int nr = sattr->index;
1161 unsigned long val;
1162 int err;
1163 unsigned int reg;
1164 u8 new_div;
1165
1166 err = kstrtoul(buf, 10, &val);
1167 if (err < 0)
1168 return err;
1169
1170 mutex_lock(&data->update_lock);
1171 if (!data->has_fan_div) {
1172 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1173 if (!val) {
1174 val = 0xff1f;
1175 } else {
1176 if (val > 1350000U)
1177 val = 135000U;
1178 val = 1350000U / val;
1179 val = (val & 0x1f) | ((val << 3) & 0xff00);
1180 }
1181 data->fan_min[nr] = val;
1182 goto write_min; /* Leave fan divider alone */
1183 }
1184 if (!val) {
1185 /* No min limit, alarm disabled */
1186 data->fan_min[nr] = 255;
1187 new_div = data->fan_div[nr]; /* No change */
1188 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1189 goto write_div;
1190 }
1191 reg = 1350000U / val;
1192 if (reg >= 128 * 255) {
1193 /*
1194 * Speed below this value cannot possibly be represented,
1195 * even with the highest divider (128)
1196 */
1197 data->fan_min[nr] = 254;
1198 new_div = 7; /* 128 == (1 << 7) */
1199 dev_warn(dev,
1200 "fan%u low limit %lu below minimum %u, set to minimum\n",
1201 nr + 1, val, data->fan_from_reg_min(254, 7));
1202 } else if (!reg) {
1203 /*
1204 * Speed above this value cannot possibly be represented,
1205 * even with the lowest divider (1)
1206 */
1207 data->fan_min[nr] = 1;
1208 new_div = 0; /* 1 == (1 << 0) */
1209 dev_warn(dev,
1210 "fan%u low limit %lu above maximum %u, set to maximum\n",
1211 nr + 1, val, data->fan_from_reg_min(1, 0));
1212 } else {
1213 /*
1214 * Automatically pick the best divider, i.e. the one such
1215 * that the min limit will correspond to a register value
1216 * in the 96..192 range
1217 */
1218 new_div = 0;
1219 while (reg > 192 && new_div < 7) {
1220 reg >>= 1;
1221 new_div++;
1222 }
1223 data->fan_min[nr] = reg;
1224 }
1225
1226 write_div:
1227 /*
1228 * Write both the fan clock divider (if it changed) and the new
1229 * fan min (unconditionally)
1230 */
1231 if (new_div != data->fan_div[nr]) {
1232 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1233 nr + 1, div_from_reg(data->fan_div[nr]),
1234 div_from_reg(new_div));
1235 data->fan_div[nr] = new_div;
1236 nct6775_write_fan_div_common(data, nr);
1237 /* Give the chip time to sample a new speed value */
1238 data->last_updated = jiffies;
1239 }
1240
1241 write_min:
1242 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1243 mutex_unlock(&data->update_lock);
1244
1245 return count;
1246 }
1247
1248 static ssize_t
1249 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1250 {
1251 struct nct6775_data *data = nct6775_update_device(dev);
1252 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1253 int p = data->fan_pulses[sattr->index];
1254
1255 return sprintf(buf, "%d\n", p ? : 4);
1256 }
1257
1258 static ssize_t
1259 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1260 const char *buf, size_t count)
1261 {
1262 struct nct6775_data *data = dev_get_drvdata(dev);
1263 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1264 int nr = sattr->index;
1265 unsigned long val;
1266 int err;
1267
1268 err = kstrtoul(buf, 10, &val);
1269 if (err < 0)
1270 return err;
1271
1272 if (val > 4)
1273 return -EINVAL;
1274
1275 mutex_lock(&data->update_lock);
1276 data->fan_pulses[nr] = val & 3;
1277 nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1278 mutex_unlock(&data->update_lock);
1279
1280 return count;
1281 }
1282
1283 static struct sensor_device_attribute sda_fan_input[] = {
1284 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1285 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1286 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1287 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1288 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1289 };
1290
1291 static struct sensor_device_attribute sda_fan_alarm[] = {
1292 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1293 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1294 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1295 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1296 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1297 };
1298
1299 static struct sensor_device_attribute sda_fan_min[] = {
1300 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1301 store_fan_min, 0),
1302 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1303 store_fan_min, 1),
1304 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1305 store_fan_min, 2),
1306 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1307 store_fan_min, 3),
1308 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1309 store_fan_min, 4),
1310 };
1311
1312 static struct sensor_device_attribute sda_fan_pulses[] = {
1313 SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1314 store_fan_pulses, 0),
1315 SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1316 store_fan_pulses, 1),
1317 SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1318 store_fan_pulses, 2),
1319 SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1320 store_fan_pulses, 3),
1321 SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1322 store_fan_pulses, 4),
1323 };
1324
1325 static struct sensor_device_attribute sda_fan_div[] = {
1326 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1327 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1328 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1329 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1330 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1331 };
1332
1333 static ssize_t
1334 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1335 {
1336 struct nct6775_data *data = nct6775_update_device(dev);
1337 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1338 int nr = sattr->index;
1339 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1340 }
1341
1342 static ssize_t
1343 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1344 {
1345 struct nct6775_data *data = nct6775_update_device(dev);
1346 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1347 int nr = sattr->nr;
1348 int index = sattr->index;
1349
1350 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1351 }
1352
1353 static ssize_t
1354 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1355 size_t count)
1356 {
1357 struct nct6775_data *data = dev_get_drvdata(dev);
1358 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1359 int nr = sattr->nr;
1360 int index = sattr->index;
1361 int err;
1362 long val;
1363
1364 err = kstrtol(buf, 10, &val);
1365 if (err < 0)
1366 return err;
1367
1368 mutex_lock(&data->update_lock);
1369 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1370 nct6775_write_temp(data, data->reg_temp[index][nr],
1371 data->temp[index][nr]);
1372 mutex_unlock(&data->update_lock);
1373 return count;
1374 }
1375
1376 static ssize_t
1377 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1378 {
1379 struct nct6775_data *data = nct6775_update_device(dev);
1380 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1381
1382 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1383 }
1384
1385 static ssize_t
1386 store_temp_offset(struct device *dev, struct device_attribute *attr,
1387 const char *buf, size_t count)
1388 {
1389 struct nct6775_data *data = dev_get_drvdata(dev);
1390 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1391 int nr = sattr->index;
1392 long val;
1393 int err;
1394
1395 err = kstrtol(buf, 10, &val);
1396 if (err < 0)
1397 return err;
1398
1399 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1400
1401 mutex_lock(&data->update_lock);
1402 data->temp_offset[nr] = val;
1403 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1404 mutex_unlock(&data->update_lock);
1405
1406 return count;
1407 }
1408
1409 static ssize_t
1410 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1411 {
1412 struct nct6775_data *data = nct6775_update_device(dev);
1413 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1414 int nr = sattr->index;
1415 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1416 }
1417
1418 static ssize_t
1419 store_temp_type(struct device *dev, struct device_attribute *attr,
1420 const char *buf, size_t count)
1421 {
1422 struct nct6775_data *data = nct6775_update_device(dev);
1423 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1424 int nr = sattr->index;
1425 unsigned long val;
1426 int err;
1427 u8 vbat, diode, bit;
1428
1429 err = kstrtoul(buf, 10, &val);
1430 if (err < 0)
1431 return err;
1432
1433 if (val != 1 && val != 3 && val != 4)
1434 return -EINVAL;
1435
1436 mutex_lock(&data->update_lock);
1437
1438 data->temp_type[nr] = val;
1439 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1440 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1441 bit = 0x02 << nr;
1442 switch (val) {
1443 case 1: /* CPU diode (diode, current mode) */
1444 vbat |= bit;
1445 diode |= bit;
1446 break;
1447 case 3: /* diode, voltage mode */
1448 vbat |= bit;
1449 break;
1450 case 4: /* thermistor */
1451 break;
1452 }
1453 nct6775_write_value(data, data->REG_VBAT, vbat);
1454 nct6775_write_value(data, data->REG_DIODE, diode);
1455
1456 mutex_unlock(&data->update_lock);
1457 return count;
1458 }
1459
1460 static struct sensor_device_attribute_2 sda_temp_input[] = {
1461 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1462 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1463 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1464 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1465 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1466 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1467 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1468 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1469 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1470 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1471 };
1472
1473 static struct sensor_device_attribute sda_temp_label[] = {
1474 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1475 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1476 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1477 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1478 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1479 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1480 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1481 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1482 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1483 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1484 };
1485
1486 static struct sensor_device_attribute_2 sda_temp_max[] = {
1487 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1488 0, 1),
1489 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1490 1, 1),
1491 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1492 2, 1),
1493 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1494 3, 1),
1495 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1496 4, 1),
1497 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1498 5, 1),
1499 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1500 6, 1),
1501 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1502 7, 1),
1503 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1504 8, 1),
1505 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1506 9, 1),
1507 };
1508
1509 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1510 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1511 0, 2),
1512 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1513 1, 2),
1514 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1515 2, 2),
1516 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1517 3, 2),
1518 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1519 4, 2),
1520 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1521 5, 2),
1522 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1523 6, 2),
1524 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1525 7, 2),
1526 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1527 8, 2),
1528 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1529 9, 2),
1530 };
1531
1532 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1533 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1534 0, 3),
1535 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1536 1, 3),
1537 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1538 2, 3),
1539 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1540 3, 3),
1541 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1542 4, 3),
1543 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1544 5, 3),
1545 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1546 6, 3),
1547 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1548 7, 3),
1549 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1550 8, 3),
1551 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1552 9, 3),
1553 };
1554
1555 static struct sensor_device_attribute sda_temp_offset[] = {
1556 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1557 store_temp_offset, 0),
1558 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1559 store_temp_offset, 1),
1560 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1561 store_temp_offset, 2),
1562 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1563 store_temp_offset, 3),
1564 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1565 store_temp_offset, 4),
1566 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1567 store_temp_offset, 5),
1568 };
1569
1570 static struct sensor_device_attribute sda_temp_type[] = {
1571 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1572 store_temp_type, 0),
1573 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1574 store_temp_type, 1),
1575 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1576 store_temp_type, 2),
1577 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1578 store_temp_type, 3),
1579 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1580 store_temp_type, 4),
1581 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1582 store_temp_type, 5),
1583 };
1584
1585 static struct sensor_device_attribute sda_temp_alarm[] = {
1586 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1587 TEMP_ALARM_BASE),
1588 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1589 TEMP_ALARM_BASE + 1),
1590 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1591 TEMP_ALARM_BASE + 2),
1592 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1593 TEMP_ALARM_BASE + 3),
1594 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1595 TEMP_ALARM_BASE + 4),
1596 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1597 TEMP_ALARM_BASE + 5),
1598 };
1599
1600 #define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1601
1602 static ssize_t
1603 show_name(struct device *dev, struct device_attribute *attr, char *buf)
1604 {
1605 struct nct6775_data *data = dev_get_drvdata(dev);
1606
1607 return sprintf(buf, "%s\n", data->name);
1608 }
1609
1610 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1611
1612 static ssize_t
1613 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1614 {
1615 struct nct6775_data *data = dev_get_drvdata(dev);
1616 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1617 }
1618
1619 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1620
1621 /* Case open detection */
1622
1623 static ssize_t
1624 clear_caseopen(struct device *dev, struct device_attribute *attr,
1625 const char *buf, size_t count)
1626 {
1627 struct nct6775_data *data = dev_get_drvdata(dev);
1628 struct nct6775_sio_data *sio_data = dev->platform_data;
1629 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
1630 unsigned long val;
1631 u8 reg;
1632 int ret;
1633
1634 if (kstrtoul(buf, 10, &val) || val != 0)
1635 return -EINVAL;
1636
1637 mutex_lock(&data->update_lock);
1638
1639 /*
1640 * Use CR registers to clear caseopen status.
1641 * The CR registers are the same for all chips, and not all chips
1642 * support clearing the caseopen status through "regular" registers.
1643 */
1644 ret = superio_enter(sio_data->sioreg);
1645 if (ret) {
1646 count = ret;
1647 goto error;
1648 }
1649
1650 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
1651 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
1652 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1653 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1654 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1655 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1656 superio_exit(sio_data->sioreg);
1657
1658 data->valid = false; /* Force cache refresh */
1659 error:
1660 mutex_unlock(&data->update_lock);
1661 return count;
1662 }
1663
1664 static struct sensor_device_attribute sda_caseopen[] = {
1665 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
1666 clear_caseopen, INTRUSION_ALARM_BASE),
1667 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
1668 clear_caseopen, INTRUSION_ALARM_BASE + 1),
1669 };
1670
1671 /*
1672 * Driver and device management
1673 */
1674
1675 static void nct6775_device_remove_files(struct device *dev)
1676 {
1677 /*
1678 * some entries in the following arrays may not have been used in
1679 * device_create_file(), but device_remove_file() will ignore them
1680 */
1681 int i;
1682 struct nct6775_data *data = dev_get_drvdata(dev);
1683
1684 for (i = 0; i < data->in_num; i++)
1685 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
1686
1687 for (i = 0; i < 5; i++) {
1688 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1689 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1690 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1691 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1692 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
1693 }
1694 for (i = 0; i < NUM_TEMP; i++) {
1695 if (!(data->have_temp & (1 << i)))
1696 continue;
1697 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1698 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1699 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1700 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1701 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
1702 if (!(data->have_temp_fixed & (1 << i)))
1703 continue;
1704 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1705 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1706 if (i >= NUM_TEMP_ALARM)
1707 continue;
1708 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1709 }
1710
1711 device_remove_file(dev, &sda_caseopen[0].dev_attr);
1712 device_remove_file(dev, &sda_caseopen[1].dev_attr);
1713
1714 device_remove_file(dev, &dev_attr_name);
1715 device_remove_file(dev, &dev_attr_cpu0_vid);
1716 }
1717
1718 /* Get the monitoring functions started */
1719 static inline void nct6775_init_device(struct nct6775_data *data)
1720 {
1721 int i;
1722 u8 tmp, diode;
1723
1724 /* Start monitoring if needed */
1725 if (data->REG_CONFIG) {
1726 tmp = nct6775_read_value(data, data->REG_CONFIG);
1727 if (!(tmp & 0x01))
1728 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
1729 }
1730
1731 /* Enable temperature sensors if needed */
1732 for (i = 0; i < NUM_TEMP; i++) {
1733 if (!(data->have_temp & (1 << i)))
1734 continue;
1735 if (!data->reg_temp_config[i])
1736 continue;
1737 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
1738 if (tmp & 0x01)
1739 nct6775_write_value(data, data->reg_temp_config[i],
1740 tmp & 0xfe);
1741 }
1742
1743 /* Enable VBAT monitoring if needed */
1744 tmp = nct6775_read_value(data, data->REG_VBAT);
1745 if (!(tmp & 0x01))
1746 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
1747
1748 diode = nct6775_read_value(data, data->REG_DIODE);
1749
1750 for (i = 0; i < data->temp_fixed_num; i++) {
1751 if (!(data->have_temp_fixed & (1 << i)))
1752 continue;
1753 if ((tmp & (0x02 << i))) /* diode */
1754 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
1755 else /* thermistor */
1756 data->temp_type[i] = 4;
1757 }
1758 }
1759
1760 static int
1761 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
1762 struct nct6775_data *data)
1763 {
1764 int regval;
1765 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
1766 int ret;
1767
1768 ret = superio_enter(sio_data->sioreg);
1769 if (ret)
1770 return ret;
1771
1772 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1773 if (data->kind == nct6775) {
1774 regval = superio_inb(sio_data->sioreg, 0x2c);
1775
1776 fan3pin = regval & (1 << 6);
1777 fan3min = fan3pin;
1778
1779 /* On NCT6775, fan4 shares pins with the fdc interface */
1780 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1781 fan4min = 0;
1782 fan5pin = 0;
1783 } else if (data->kind == nct6776) {
1784 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
1785
1786 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
1787 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
1788
1789 if (regval & 0x80)
1790 fan3pin = gpok;
1791 else
1792 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1793
1794 if (regval & 0x40)
1795 fan4pin = gpok;
1796 else
1797 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
1798
1799 if (regval & 0x20)
1800 fan5pin = gpok;
1801 else
1802 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
1803
1804 fan4min = fan4pin;
1805 fan3min = fan3pin;
1806 } else { /* NCT6779D */
1807 regval = superio_inb(sio_data->sioreg, 0x1c);
1808
1809 fan3pin = !(regval & (1 << 5));
1810 fan4pin = !(regval & (1 << 6));
1811 fan5pin = !(regval & (1 << 7));
1812
1813 fan3min = fan3pin;
1814 fan4min = fan4pin;
1815 }
1816
1817 superio_exit(sio_data->sioreg);
1818
1819 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1820 data->has_fan |= fan3pin << 2;
1821 data->has_fan_min |= fan3min << 2;
1822
1823 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
1824 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
1825
1826 return 0;
1827 }
1828
1829 static int nct6775_probe(struct platform_device *pdev)
1830 {
1831 struct device *dev = &pdev->dev;
1832 struct nct6775_sio_data *sio_data = dev->platform_data;
1833 struct nct6775_data *data;
1834 struct resource *res;
1835 int i, s, err = 0;
1836 int src, mask, available;
1837 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
1838 const u16 *reg_temp_alternate, *reg_temp_crit;
1839 int num_reg_temp;
1840
1841 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1842 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
1843 DRVNAME))
1844 return -EBUSY;
1845
1846 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
1847 GFP_KERNEL);
1848 if (!data)
1849 return -ENOMEM;
1850
1851 data->kind = sio_data->kind;
1852 data->addr = res->start;
1853 mutex_init(&data->lock);
1854 mutex_init(&data->update_lock);
1855 data->name = nct6775_device_names[data->kind];
1856 data->bank = 0xff; /* Force initial bank selection */
1857 platform_set_drvdata(pdev, data);
1858
1859 switch (data->kind) {
1860 case nct6775:
1861 data->in_num = 9;
1862 data->has_fan_div = true;
1863 data->temp_fixed_num = 3;
1864
1865 data->ALARM_BITS = NCT6775_ALARM_BITS;
1866
1867 data->fan_from_reg = fan_from_reg16;
1868 data->fan_from_reg_min = fan_from_reg8;
1869
1870 data->temp_label = nct6775_temp_label;
1871 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
1872
1873 data->REG_CONFIG = NCT6775_REG_CONFIG;
1874 data->REG_VBAT = NCT6775_REG_VBAT;
1875 data->REG_DIODE = NCT6775_REG_DIODE;
1876 data->REG_VIN = NCT6775_REG_IN;
1877 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1878 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1879 data->REG_FAN = NCT6775_REG_FAN;
1880 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
1881 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
1882 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1883 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
1884 data->REG_ALARM = NCT6775_REG_ALARM;
1885
1886 reg_temp = NCT6775_REG_TEMP;
1887 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1888 reg_temp_over = NCT6775_REG_TEMP_OVER;
1889 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1890 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
1891 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
1892 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
1893
1894 break;
1895 case nct6776:
1896 data->in_num = 9;
1897 data->has_fan_div = false;
1898 data->temp_fixed_num = 3;
1899
1900 data->ALARM_BITS = NCT6776_ALARM_BITS;
1901
1902 data->fan_from_reg = fan_from_reg13;
1903 data->fan_from_reg_min = fan_from_reg13;
1904
1905 data->temp_label = nct6776_temp_label;
1906 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
1907
1908 data->REG_CONFIG = NCT6775_REG_CONFIG;
1909 data->REG_VBAT = NCT6775_REG_VBAT;
1910 data->REG_DIODE = NCT6775_REG_DIODE;
1911 data->REG_VIN = NCT6775_REG_IN;
1912 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1913 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1914 data->REG_FAN = NCT6775_REG_FAN;
1915 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
1916 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
1917 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1918 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
1919 data->REG_ALARM = NCT6775_REG_ALARM;
1920
1921 reg_temp = NCT6775_REG_TEMP;
1922 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1923 reg_temp_over = NCT6775_REG_TEMP_OVER;
1924 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1925 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
1926 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
1927 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
1928
1929 break;
1930 case nct6779:
1931 data->in_num = 15;
1932 data->has_fan_div = false;
1933 data->temp_fixed_num = 6;
1934
1935 data->ALARM_BITS = NCT6779_ALARM_BITS;
1936
1937 data->fan_from_reg = fan_from_reg13;
1938 data->fan_from_reg_min = fan_from_reg13;
1939
1940 data->temp_label = nct6779_temp_label;
1941 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
1942
1943 data->REG_CONFIG = NCT6775_REG_CONFIG;
1944 data->REG_VBAT = NCT6775_REG_VBAT;
1945 data->REG_DIODE = NCT6775_REG_DIODE;
1946 data->REG_VIN = NCT6779_REG_IN;
1947 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1948 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1949 data->REG_FAN = NCT6779_REG_FAN;
1950 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
1951 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
1952 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
1953 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
1954 data->REG_ALARM = NCT6779_REG_ALARM;
1955
1956 reg_temp = NCT6779_REG_TEMP;
1957 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
1958 reg_temp_over = NCT6779_REG_TEMP_OVER;
1959 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
1960 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
1961 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
1962 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
1963
1964 break;
1965 default:
1966 return -ENODEV;
1967 }
1968 data->have_in = (1 << data->in_num) - 1;
1969 data->have_temp = 0;
1970
1971 /*
1972 * On some boards, not all available temperature sources are monitored,
1973 * even though some of the monitoring registers are unused.
1974 * Get list of unused monitoring registers, then detect if any fan
1975 * controls are configured to use unmonitored temperature sources.
1976 * If so, assign the unmonitored temperature sources to available
1977 * monitoring registers.
1978 */
1979 mask = 0;
1980 available = 0;
1981 for (i = 0; i < num_reg_temp; i++) {
1982 if (reg_temp[i] == 0)
1983 continue;
1984
1985 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1986 if (!src || (mask & (1 << src)))
1987 available |= 1 << i;
1988
1989 mask |= 1 << src;
1990 }
1991
1992 mask = 0;
1993 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
1994 for (i = 0; i < num_reg_temp; i++) {
1995 if (reg_temp[i] == 0)
1996 continue;
1997
1998 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1999 if (!src || (mask & (1 << src)))
2000 continue;
2001
2002 if (src >= data->temp_label_num ||
2003 !strlen(data->temp_label[src])) {
2004 dev_info(dev,
2005 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
2006 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
2007 continue;
2008 }
2009
2010 mask |= 1 << src;
2011
2012 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
2013 if (src <= data->temp_fixed_num) {
2014 data->have_temp |= 1 << (src - 1);
2015 data->have_temp_fixed |= 1 << (src - 1);
2016 data->reg_temp[0][src - 1] = reg_temp[i];
2017 data->reg_temp[1][src - 1] = reg_temp_over[i];
2018 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
2019 data->reg_temp_config[src - 1] = reg_temp_config[i];
2020 data->temp_src[src - 1] = src;
2021 continue;
2022 }
2023
2024 if (s >= NUM_TEMP)
2025 continue;
2026
2027 /* Use dynamic index for other sources */
2028 data->have_temp |= 1 << s;
2029 data->reg_temp[0][s] = reg_temp[i];
2030 data->reg_temp[1][s] = reg_temp_over[i];
2031 data->reg_temp[2][s] = reg_temp_hyst[i];
2032 data->reg_temp_config[s] = reg_temp_config[i];
2033 if (reg_temp_crit[src - 1])
2034 data->reg_temp[3][s] = reg_temp_crit[src - 1];
2035
2036 data->temp_src[s] = src;
2037 s++;
2038 }
2039
2040 #ifdef USE_ALTERNATE
2041 /*
2042 * Go through the list of alternate temp registers and enable
2043 * if possible.
2044 * The temperature is already monitored if the respective bit in <mask>
2045 * is set.
2046 */
2047 for (i = 0; i < data->temp_label_num - 1; i++) {
2048 if (!reg_temp_alternate[i])
2049 continue;
2050 if (mask & (1 << (i + 1)))
2051 continue;
2052 if (i < data->temp_fixed_num) {
2053 if (data->have_temp & (1 << i))
2054 continue;
2055 data->have_temp |= 1 << i;
2056 data->have_temp_fixed |= 1 << i;
2057 data->reg_temp[0][i] = reg_temp_alternate[i];
2058 data->reg_temp[1][i] = reg_temp_over[i];
2059 data->reg_temp[2][i] = reg_temp_hyst[i];
2060 data->temp_src[i] = i + 1;
2061 continue;
2062 }
2063
2064 if (s >= NUM_TEMP) /* Abort if no more space */
2065 break;
2066
2067 data->have_temp |= 1 << s;
2068 data->reg_temp[0][s] = reg_temp_alternate[i];
2069 data->temp_src[s] = i + 1;
2070 s++;
2071 }
2072 #endif /* USE_ALTERNATE */
2073
2074 switch (data->kind) {
2075 case nct6775:
2076 break;
2077 case nct6776:
2078 /*
2079 * On NCT6776, AUXTIN and VIN3 pins are shared.
2080 * Only way to detect it is to check if AUXTIN is used
2081 * as a temperature source, and if that source is
2082 * enabled.
2083 *
2084 * If that is the case, disable in6, which reports VIN3.
2085 * Otherwise disable temp3.
2086 */
2087 if (data->have_temp & (1 << 2)) {
2088 u8 reg = nct6775_read_value(data,
2089 data->reg_temp_config[2]);
2090 if (reg & 0x01)
2091 data->have_temp &= ~(1 << 2);
2092 else
2093 data->have_in &= ~(1 << 6);
2094 }
2095 break;
2096 case nct6779:
2097 /*
2098 * Shared pins:
2099 * VIN4 / AUXTIN0
2100 * VIN5 / AUXTIN1
2101 * VIN6 / AUXTIN2
2102 * VIN7 / AUXTIN3
2103 *
2104 * There does not seem to be a clean way to detect if VINx or
2105 * AUXTINx is active, so for keep both sensor types enabled
2106 * for now.
2107 */
2108 break;
2109 }
2110
2111 /* Initialize the chip */
2112 nct6775_init_device(data);
2113
2114 data->vrm = vid_which_vrm();
2115 err = superio_enter(sio_data->sioreg);
2116 if (err)
2117 return err;
2118
2119 /*
2120 * Read VID value
2121 * We can get the VID input values directly at logical device D 0xe3.
2122 */
2123 superio_select(sio_data->sioreg, NCT6775_LD_VID);
2124 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2125
2126 if (fan_debounce) {
2127 u8 tmp;
2128
2129 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2130 tmp = superio_inb(sio_data->sioreg,
2131 NCT6775_REG_CR_FAN_DEBOUNCE);
2132 switch (data->kind) {
2133 case nct6775:
2134 tmp |= 0x1e;
2135 break;
2136 case nct6776:
2137 case nct6779:
2138 tmp |= 0x3e;
2139 break;
2140 }
2141 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
2142 tmp);
2143 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
2144 data->name);
2145 }
2146
2147 superio_exit(sio_data->sioreg);
2148
2149 err = device_create_file(dev, &dev_attr_cpu0_vid);
2150 if (err)
2151 return err;
2152
2153 err = nct6775_check_fan_inputs(sio_data, data);
2154 if (err)
2155 goto exit_remove;
2156
2157 /* Read fan clock dividers immediately */
2158 nct6775_init_fan_common(dev, data);
2159
2160 for (i = 0; i < data->in_num; i++) {
2161 if (!(data->have_in & (1 << i)))
2162 continue;
2163 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
2164 if (err)
2165 goto exit_remove;
2166 }
2167
2168 for (i = 0; i < 5; i++) {
2169 if (data->has_fan & (1 << i)) {
2170 err = device_create_file(dev,
2171 &sda_fan_input[i].dev_attr);
2172 if (err)
2173 goto exit_remove;
2174 err = device_create_file(dev,
2175 &sda_fan_alarm[i].dev_attr);
2176 if (err)
2177 goto exit_remove;
2178 if (data->kind != nct6776 &&
2179 data->kind != nct6779) {
2180 err = device_create_file(dev,
2181 &sda_fan_div[i].dev_attr);
2182 if (err)
2183 goto exit_remove;
2184 }
2185 if (data->has_fan_min & (1 << i)) {
2186 err = device_create_file(dev,
2187 &sda_fan_min[i].dev_attr);
2188 if (err)
2189 goto exit_remove;
2190 }
2191 err = device_create_file(dev,
2192 &sda_fan_pulses[i].dev_attr);
2193 if (err)
2194 goto exit_remove;
2195 }
2196 }
2197
2198 for (i = 0; i < NUM_TEMP; i++) {
2199 if (!(data->have_temp & (1 << i)))
2200 continue;
2201 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2202 if (err)
2203 goto exit_remove;
2204 if (data->temp_label) {
2205 err = device_create_file(dev,
2206 &sda_temp_label[i].dev_attr);
2207 if (err)
2208 goto exit_remove;
2209 }
2210 if (data->reg_temp[1][i]) {
2211 err = device_create_file(dev,
2212 &sda_temp_max[i].dev_attr);
2213 if (err)
2214 goto exit_remove;
2215 }
2216 if (data->reg_temp[2][i]) {
2217 err = device_create_file(dev,
2218 &sda_temp_max_hyst[i].dev_attr);
2219 if (err)
2220 goto exit_remove;
2221 }
2222 if (data->reg_temp[3][i]) {
2223 err = device_create_file(dev,
2224 &sda_temp_crit[i].dev_attr);
2225 if (err)
2226 goto exit_remove;
2227 }
2228 if (!(data->have_temp_fixed & (1 << i)))
2229 continue;
2230 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
2231 if (err)
2232 goto exit_remove;
2233 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
2234 if (err)
2235 goto exit_remove;
2236 if (i >= NUM_TEMP_ALARM ||
2237 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
2238 continue;
2239 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
2240 if (err)
2241 goto exit_remove;
2242 }
2243
2244 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
2245 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
2246 continue;
2247 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
2248 if (err)
2249 goto exit_remove;
2250 }
2251
2252 err = device_create_file(dev, &dev_attr_name);
2253 if (err)
2254 goto exit_remove;
2255
2256 data->hwmon_dev = hwmon_device_register(dev);
2257 if (IS_ERR(data->hwmon_dev)) {
2258 err = PTR_ERR(data->hwmon_dev);
2259 goto exit_remove;
2260 }
2261
2262 return 0;
2263
2264 exit_remove:
2265 nct6775_device_remove_files(dev);
2266 return err;
2267 }
2268
2269 static int nct6775_remove(struct platform_device *pdev)
2270 {
2271 struct nct6775_data *data = platform_get_drvdata(pdev);
2272
2273 hwmon_device_unregister(data->hwmon_dev);
2274 nct6775_device_remove_files(&pdev->dev);
2275
2276 return 0;
2277 }
2278
2279 #ifdef CONFIG_PM
2280 static int nct6775_suspend(struct device *dev)
2281 {
2282 struct nct6775_data *data = nct6775_update_device(dev);
2283 struct nct6775_sio_data *sio_data = dev->platform_data;
2284
2285 mutex_lock(&data->update_lock);
2286 data->vbat = nct6775_read_value(data, data->REG_VBAT);
2287 if (sio_data->kind == nct6775) {
2288 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
2289 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
2290 }
2291 mutex_unlock(&data->update_lock);
2292
2293 return 0;
2294 }
2295
2296 static int nct6775_resume(struct device *dev)
2297 {
2298 struct nct6775_data *data = dev_get_drvdata(dev);
2299 struct nct6775_sio_data *sio_data = dev->platform_data;
2300 int i, j;
2301
2302 mutex_lock(&data->update_lock);
2303 data->bank = 0xff; /* Force initial bank selection */
2304
2305 /* Restore limits */
2306 for (i = 0; i < data->in_num; i++) {
2307 if (!(data->have_in & (1 << i)))
2308 continue;
2309
2310 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
2311 data->in[i][1]);
2312 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
2313 data->in[i][2]);
2314 }
2315
2316 for (i = 0; i < 5; i++) {
2317 if (!(data->has_fan_min & (1 << i)))
2318 continue;
2319
2320 nct6775_write_value(data, data->REG_FAN_MIN[i],
2321 data->fan_min[i]);
2322 }
2323
2324 for (i = 0; i < NUM_TEMP; i++) {
2325 if (!(data->have_temp & (1 << i)))
2326 continue;
2327
2328 for (j = 1; j < 4; j++)
2329 if (data->reg_temp[j][i])
2330 nct6775_write_temp(data, data->reg_temp[j][i],
2331 data->temp[j][i]);
2332 }
2333
2334 /* Restore other settings */
2335 nct6775_write_value(data, data->REG_VBAT, data->vbat);
2336 if (sio_data->kind == nct6775) {
2337 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
2338 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
2339 }
2340
2341 /* Force re-reading all values */
2342 data->valid = false;
2343 mutex_unlock(&data->update_lock);
2344
2345 return 0;
2346 }
2347
2348 static const struct dev_pm_ops nct6775_dev_pm_ops = {
2349 .suspend = nct6775_suspend,
2350 .resume = nct6775_resume,
2351 };
2352
2353 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
2354 #else
2355 #define NCT6775_DEV_PM_OPS NULL
2356 #endif /* CONFIG_PM */
2357
2358 static struct platform_driver nct6775_driver = {
2359 .driver = {
2360 .owner = THIS_MODULE,
2361 .name = DRVNAME,
2362 .pm = NCT6775_DEV_PM_OPS,
2363 },
2364 .probe = nct6775_probe,
2365 .remove = nct6775_remove,
2366 };
2367
2368 /* nct6775_find() looks for a '627 in the Super-I/O config space */
2369 static int __init nct6775_find(int sioaddr, unsigned short *addr,
2370 struct nct6775_sio_data *sio_data)
2371 {
2372 static const char sio_name_NCT6775[] __initconst = "NCT6775F";
2373 static const char sio_name_NCT6776[] __initconst = "NCT6776F";
2374 static const char sio_name_NCT6779[] __initconst = "NCT6779D";
2375
2376 u16 val;
2377 const char *sio_name;
2378 int err;
2379
2380 err = superio_enter(sioaddr);
2381 if (err)
2382 return err;
2383
2384 if (force_id)
2385 val = force_id;
2386 else
2387 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2388 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2389 switch (val & SIO_ID_MASK) {
2390 case SIO_NCT6775_ID:
2391 sio_data->kind = nct6775;
2392 sio_name = sio_name_NCT6775;
2393 break;
2394 case SIO_NCT6776_ID:
2395 sio_data->kind = nct6776;
2396 sio_name = sio_name_NCT6776;
2397 break;
2398 case SIO_NCT6779_ID:
2399 sio_data->kind = nct6779;
2400 sio_name = sio_name_NCT6779;
2401 break;
2402 default:
2403 if (val != 0xffff)
2404 pr_debug("unsupported chip ID: 0x%04x\n", val);
2405 superio_exit(sioaddr);
2406 return -ENODEV;
2407 }
2408
2409 /* We have a known chip, find the HWM I/O address */
2410 superio_select(sioaddr, NCT6775_LD_HWM);
2411 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2412 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2413 *addr = val & IOREGION_ALIGNMENT;
2414 if (*addr == 0) {
2415 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2416 superio_exit(sioaddr);
2417 return -ENODEV;
2418 }
2419
2420 /* Activate logical device if needed */
2421 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2422 if (!(val & 0x01)) {
2423 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
2424 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2425 }
2426
2427 superio_exit(sioaddr);
2428 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2429 sio_data->sioreg = sioaddr;
2430
2431 return 0;
2432 }
2433
2434 /*
2435 * when Super-I/O functions move to a separate file, the Super-I/O
2436 * bus will manage the lifetime of the device and this module will only keep
2437 * track of the nct6775 driver. But since we platform_device_alloc(), we
2438 * must keep track of the device
2439 */
2440 static struct platform_device *pdev;
2441
2442 static int __init sensors_nct6775_init(void)
2443 {
2444 int err;
2445 unsigned short address;
2446 struct resource res;
2447 struct nct6775_sio_data sio_data;
2448
2449 /*
2450 * initialize sio_data->kind and sio_data->sioreg.
2451 *
2452 * when Super-I/O functions move to a separate file, the Super-I/O
2453 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2454 * nct6775 hardware monitor, and call probe()
2455 */
2456 if (nct6775_find(0x2e, &address, &sio_data) &&
2457 nct6775_find(0x4e, &address, &sio_data))
2458 return -ENODEV;
2459
2460 err = platform_driver_register(&nct6775_driver);
2461 if (err)
2462 goto exit;
2463
2464 pdev = platform_device_alloc(DRVNAME, address);
2465 if (!pdev) {
2466 err = -ENOMEM;
2467 pr_err("Device allocation failed\n");
2468 goto exit_unregister;
2469 }
2470
2471 err = platform_device_add_data(pdev, &sio_data,
2472 sizeof(struct nct6775_sio_data));
2473 if (err) {
2474 pr_err("Platform data allocation failed\n");
2475 goto exit_device_put;
2476 }
2477
2478 memset(&res, 0, sizeof(res));
2479 res.name = DRVNAME;
2480 res.start = address + IOREGION_OFFSET;
2481 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2482 res.flags = IORESOURCE_IO;
2483
2484 err = acpi_check_resource_conflict(&res);
2485 if (err)
2486 goto exit_device_put;
2487
2488 err = platform_device_add_resources(pdev, &res, 1);
2489 if (err) {
2490 pr_err("Device resource addition failed (%d)\n", err);
2491 goto exit_device_put;
2492 }
2493
2494 /* platform_device_add calls probe() */
2495 err = platform_device_add(pdev);
2496 if (err) {
2497 pr_err("Device addition failed (%d)\n", err);
2498 goto exit_device_put;
2499 }
2500
2501 return 0;
2502
2503 exit_device_put:
2504 platform_device_put(pdev);
2505 exit_unregister:
2506 platform_driver_unregister(&nct6775_driver);
2507 exit:
2508 return err;
2509 }
2510
2511 static void __exit sensors_nct6775_exit(void)
2512 {
2513 platform_device_unregister(pdev);
2514 platform_driver_unregister(&nct6775_driver);
2515 }
2516
2517 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
2518 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
2519 MODULE_LICENSE("GPL");
2520
2521 module_init(sensors_nct6775_init);
2522 module_exit(sensors_nct6775_exit);
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