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[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / w83781d.c
1 /*
2 * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 * Philip Edelbrock <phil@netroedge.com>,
6 * and Mark Studebaker <mdsxyz123@yahoo.com>
7 * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25 * Supports following chips:
26 *
27 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 * as99127f 7 3 0 3 0x31 0x12c3 yes no
29 * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
33 *
34 */
35
36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
37
38 #include <linux/module.h>
39 #include <linux/init.h>
40 #include <linux/slab.h>
41 #include <linux/jiffies.h>
42 #include <linux/i2c.h>
43 #include <linux/hwmon.h>
44 #include <linux/hwmon-vid.h>
45 #include <linux/hwmon-sysfs.h>
46 #include <linux/sysfs.h>
47 #include <linux/err.h>
48 #include <linux/mutex.h>
49
50 #ifdef CONFIG_ISA
51 #include <linux/platform_device.h>
52 #include <linux/ioport.h>
53 #include <linux/io.h>
54 #endif
55
56 #include "lm75.h"
57
58 /* Addresses to scan */
59 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
60 0x2e, 0x2f, I2C_CLIENT_END };
61
62 enum chips { w83781d, w83782d, w83783s, as99127f };
63
64 /* Insmod parameters */
65 static unsigned short force_subclients[4];
66 module_param_array(force_subclients, short, NULL, 0);
67 MODULE_PARM_DESC(force_subclients,
68 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
69
70 static bool reset;
71 module_param(reset, bool, 0);
72 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
73
74 static bool init = 1;
75 module_param(init, bool, 0);
76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78 /* Constants specified below */
79
80 /* Length of ISA address segment */
81 #define W83781D_EXTENT 8
82
83 /* Where are the ISA address/data registers relative to the base address */
84 #define W83781D_ADDR_REG_OFFSET 5
85 #define W83781D_DATA_REG_OFFSET 6
86
87 /* The device registers */
88 /* in nr from 0 to 8 */
89 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
90 (0x554 + (((nr) - 7) * 2)))
91 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
92 (0x555 + (((nr) - 7) * 2)))
93 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
94 (0x550 + (nr) - 7))
95
96 /* fan nr from 0 to 2 */
97 #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
98 #define W83781D_REG_FAN(nr) (0x28 + (nr))
99
100 #define W83781D_REG_BANK 0x4E
101 #define W83781D_REG_TEMP2_CONFIG 0x152
102 #define W83781D_REG_TEMP3_CONFIG 0x252
103 /* temp nr from 1 to 3 */
104 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
105 ((nr == 2) ? (0x0150) : \
106 (0x27)))
107 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
108 ((nr == 2) ? (0x153) : \
109 (0x3A)))
110 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
111 ((nr == 2) ? (0x155) : \
112 (0x39)))
113
114 #define W83781D_REG_CONFIG 0x40
115
116 /* Interrupt status (W83781D, AS99127F) */
117 #define W83781D_REG_ALARM1 0x41
118 #define W83781D_REG_ALARM2 0x42
119
120 /* Real-time status (W83782D, W83783S) */
121 #define W83782D_REG_ALARM1 0x459
122 #define W83782D_REG_ALARM2 0x45A
123 #define W83782D_REG_ALARM3 0x45B
124
125 #define W83781D_REG_BEEP_CONFIG 0x4D
126 #define W83781D_REG_BEEP_INTS1 0x56
127 #define W83781D_REG_BEEP_INTS2 0x57
128 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
129
130 #define W83781D_REG_VID_FANDIV 0x47
131
132 #define W83781D_REG_CHIPID 0x49
133 #define W83781D_REG_WCHIPID 0x58
134 #define W83781D_REG_CHIPMAN 0x4F
135 #define W83781D_REG_PIN 0x4B
136
137 /* 782D/783S only */
138 #define W83781D_REG_VBAT 0x5D
139
140 /* PWM 782D (1-4) and 783S (1-2) only */
141 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
142 #define W83781D_REG_PWMCLK12 0x5C
143 #define W83781D_REG_PWMCLK34 0x45C
144
145 #define W83781D_REG_I2C_ADDR 0x48
146 #define W83781D_REG_I2C_SUBADDR 0x4A
147
148 /*
149 * The following are undocumented in the data sheets however we
150 * received the information in an email from Winbond tech support
151 */
152 /* Sensor selection - not on 781d */
153 #define W83781D_REG_SCFG1 0x5D
154 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
155
156 #define W83781D_REG_SCFG2 0x59
157 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
158
159 #define W83781D_DEFAULT_BETA 3435
160
161 /* Conversions */
162 #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
163 #define IN_FROM_REG(val) ((val) * 16)
164
165 static inline u8
166 FAN_TO_REG(long rpm, int div)
167 {
168 if (rpm == 0)
169 return 255;
170 rpm = clamp_val(rpm, 1, 1000000);
171 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
172 }
173
174 static inline long
175 FAN_FROM_REG(u8 val, int div)
176 {
177 if (val == 0)
178 return -1;
179 if (val == 255)
180 return 0;
181 return 1350000 / (val * div);
182 }
183
184 #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
185 #define TEMP_FROM_REG(val) ((val) * 1000)
186
187 #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
188 (~(val)) & 0x7fff : (val) & 0xff7fff)
189 #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
190 (~(val)) & 0x7fff : (val) & 0xff7fff)
191
192 #define DIV_FROM_REG(val) (1 << (val))
193
194 static inline u8
195 DIV_TO_REG(long val, enum chips type)
196 {
197 int i;
198 val = clamp_val(val, 1,
199 ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
200 for (i = 0; i < 7; i++) {
201 if (val == 0)
202 break;
203 val >>= 1;
204 }
205 return i;
206 }
207
208 struct w83781d_data {
209 struct i2c_client *client;
210 struct device *hwmon_dev;
211 struct mutex lock;
212 enum chips type;
213
214 /* For ISA device only */
215 const char *name;
216 int isa_addr;
217
218 struct mutex update_lock;
219 char valid; /* !=0 if following fields are valid */
220 unsigned long last_updated; /* In jiffies */
221
222 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
223 /* array of 2 pointers to subclients */
224
225 u8 in[9]; /* Register value - 8 & 9 for 782D only */
226 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
227 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
228 u8 fan[3]; /* Register value */
229 u8 fan_min[3]; /* Register value */
230 s8 temp; /* Register value */
231 s8 temp_max; /* Register value */
232 s8 temp_max_hyst; /* Register value */
233 u16 temp_add[2]; /* Register value */
234 u16 temp_max_add[2]; /* Register value */
235 u16 temp_max_hyst_add[2]; /* Register value */
236 u8 fan_div[3]; /* Register encoding, shifted right */
237 u8 vid; /* Register encoding, combined */
238 u32 alarms; /* Register encoding, combined */
239 u32 beep_mask; /* Register encoding, combined */
240 u8 pwm[4]; /* Register value */
241 u8 pwm2_enable; /* Boolean */
242 u16 sens[3]; /*
243 * 782D/783S only.
244 * 1 = pentium diode; 2 = 3904 diode;
245 * 4 = thermistor
246 */
247 u8 vrm;
248 };
249
250 static struct w83781d_data *w83781d_data_if_isa(void);
251 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
252
253 static int w83781d_read_value(struct w83781d_data *data, u16 reg);
254 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
255 static struct w83781d_data *w83781d_update_device(struct device *dev);
256 static void w83781d_init_device(struct device *dev);
257
258 /* following are the sysfs callback functions */
259 #define show_in_reg(reg) \
260 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
261 char *buf) \
262 { \
263 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
264 struct w83781d_data *data = w83781d_update_device(dev); \
265 return sprintf(buf, "%ld\n", \
266 (long)IN_FROM_REG(data->reg[attr->index])); \
267 }
268 show_in_reg(in);
269 show_in_reg(in_min);
270 show_in_reg(in_max);
271
272 #define store_in_reg(REG, reg) \
273 static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
274 *da, const char *buf, size_t count) \
275 { \
276 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
277 struct w83781d_data *data = dev_get_drvdata(dev); \
278 int nr = attr->index; \
279 unsigned long val; \
280 int err = kstrtoul(buf, 10, &val); \
281 if (err) \
282 return err; \
283 mutex_lock(&data->update_lock); \
284 data->in_##reg[nr] = IN_TO_REG(val); \
285 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
286 data->in_##reg[nr]); \
287 \
288 mutex_unlock(&data->update_lock); \
289 return count; \
290 }
291 store_in_reg(MIN, min);
292 store_in_reg(MAX, max);
293
294 #define sysfs_in_offsets(offset) \
295 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
296 show_in, NULL, offset); \
297 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
298 show_in_min, store_in_min, offset); \
299 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
300 show_in_max, store_in_max, offset)
301
302 sysfs_in_offsets(0);
303 sysfs_in_offsets(1);
304 sysfs_in_offsets(2);
305 sysfs_in_offsets(3);
306 sysfs_in_offsets(4);
307 sysfs_in_offsets(5);
308 sysfs_in_offsets(6);
309 sysfs_in_offsets(7);
310 sysfs_in_offsets(8);
311
312 #define show_fan_reg(reg) \
313 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
314 char *buf) \
315 { \
316 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
317 struct w83781d_data *data = w83781d_update_device(dev); \
318 return sprintf(buf, "%ld\n", \
319 FAN_FROM_REG(data->reg[attr->index], \
320 DIV_FROM_REG(data->fan_div[attr->index]))); \
321 }
322 show_fan_reg(fan);
323 show_fan_reg(fan_min);
324
325 static ssize_t
326 store_fan_min(struct device *dev, struct device_attribute *da,
327 const char *buf, size_t count)
328 {
329 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
330 struct w83781d_data *data = dev_get_drvdata(dev);
331 int nr = attr->index;
332 unsigned long val;
333 int err;
334
335 err = kstrtoul(buf, 10, &val);
336 if (err)
337 return err;
338
339 mutex_lock(&data->update_lock);
340 data->fan_min[nr] =
341 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
342 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
343 data->fan_min[nr]);
344
345 mutex_unlock(&data->update_lock);
346 return count;
347 }
348
349 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
350 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
351 show_fan_min, store_fan_min, 0);
352 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
353 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
354 show_fan_min, store_fan_min, 1);
355 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
356 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
357 show_fan_min, store_fan_min, 2);
358
359 #define show_temp_reg(reg) \
360 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
361 char *buf) \
362 { \
363 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
364 struct w83781d_data *data = w83781d_update_device(dev); \
365 int nr = attr->index; \
366 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
367 return sprintf(buf, "%d\n", \
368 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
369 } else { /* TEMP1 */ \
370 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
371 } \
372 }
373 show_temp_reg(temp);
374 show_temp_reg(temp_max);
375 show_temp_reg(temp_max_hyst);
376
377 #define store_temp_reg(REG, reg) \
378 static ssize_t store_temp_##reg(struct device *dev, \
379 struct device_attribute *da, const char *buf, size_t count) \
380 { \
381 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
382 struct w83781d_data *data = dev_get_drvdata(dev); \
383 int nr = attr->index; \
384 long val; \
385 int err = kstrtol(buf, 10, &val); \
386 if (err) \
387 return err; \
388 mutex_lock(&data->update_lock); \
389 \
390 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
391 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
392 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
393 data->temp_##reg##_add[nr-2]); \
394 } else { /* TEMP1 */ \
395 data->temp_##reg = TEMP_TO_REG(val); \
396 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
397 data->temp_##reg); \
398 } \
399 \
400 mutex_unlock(&data->update_lock); \
401 return count; \
402 }
403 store_temp_reg(OVER, max);
404 store_temp_reg(HYST, max_hyst);
405
406 #define sysfs_temp_offsets(offset) \
407 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
408 show_temp, NULL, offset); \
409 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
410 show_temp_max, store_temp_max, offset); \
411 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
412 show_temp_max_hyst, store_temp_max_hyst, offset);
413
414 sysfs_temp_offsets(1);
415 sysfs_temp_offsets(2);
416 sysfs_temp_offsets(3);
417
418 static ssize_t
419 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
420 {
421 struct w83781d_data *data = w83781d_update_device(dev);
422 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
423 }
424
425 static DEVICE_ATTR_RO(cpu0_vid);
426
427 static ssize_t
428 vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
429 {
430 struct w83781d_data *data = dev_get_drvdata(dev);
431 return sprintf(buf, "%ld\n", (long) data->vrm);
432 }
433
434 static ssize_t
435 vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
436 size_t count)
437 {
438 struct w83781d_data *data = dev_get_drvdata(dev);
439 unsigned long val;
440 int err;
441
442 err = kstrtoul(buf, 10, &val);
443 if (err)
444 return err;
445 data->vrm = clamp_val(val, 0, 255);
446
447 return count;
448 }
449
450 static DEVICE_ATTR_RW(vrm);
451
452 static ssize_t
453 alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
454 {
455 struct w83781d_data *data = w83781d_update_device(dev);
456 return sprintf(buf, "%u\n", data->alarms);
457 }
458
459 static DEVICE_ATTR_RO(alarms);
460
461 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
462 char *buf)
463 {
464 struct w83781d_data *data = w83781d_update_device(dev);
465 int bitnr = to_sensor_dev_attr(attr)->index;
466 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
467 }
468
469 /* The W83781D has a single alarm bit for temp2 and temp3 */
470 static ssize_t show_temp3_alarm(struct device *dev,
471 struct device_attribute *attr, char *buf)
472 {
473 struct w83781d_data *data = w83781d_update_device(dev);
474 int bitnr = (data->type == w83781d) ? 5 : 13;
475 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
476 }
477
478 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
479 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
480 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
481 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
482 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
483 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
484 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
485 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
486 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
487 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
488 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
489 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
490 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
491 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
492 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
493
494 static ssize_t beep_mask_show(struct device *dev,
495 struct device_attribute *attr, char *buf)
496 {
497 struct w83781d_data *data = w83781d_update_device(dev);
498 return sprintf(buf, "%ld\n",
499 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
500 }
501
502 static ssize_t
503 beep_mask_store(struct device *dev, struct device_attribute *attr,
504 const char *buf, size_t count)
505 {
506 struct w83781d_data *data = dev_get_drvdata(dev);
507 unsigned long val;
508 int err;
509
510 err = kstrtoul(buf, 10, &val);
511 if (err)
512 return err;
513
514 mutex_lock(&data->update_lock);
515 data->beep_mask &= 0x8000; /* preserve beep enable */
516 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
517 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
518 data->beep_mask & 0xff);
519 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
520 (data->beep_mask >> 8) & 0xff);
521 if (data->type != w83781d && data->type != as99127f) {
522 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
523 ((data->beep_mask) >> 16) & 0xff);
524 }
525 mutex_unlock(&data->update_lock);
526
527 return count;
528 }
529
530 static DEVICE_ATTR_RW(beep_mask);
531
532 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
533 char *buf)
534 {
535 struct w83781d_data *data = w83781d_update_device(dev);
536 int bitnr = to_sensor_dev_attr(attr)->index;
537 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
538 }
539
540 static ssize_t
541 store_beep(struct device *dev, struct device_attribute *attr,
542 const char *buf, size_t count)
543 {
544 struct w83781d_data *data = dev_get_drvdata(dev);
545 int bitnr = to_sensor_dev_attr(attr)->index;
546 u8 reg;
547 unsigned long bit;
548 int err;
549
550 err = kstrtoul(buf, 10, &bit);
551 if (err)
552 return err;
553
554 if (bit & ~1)
555 return -EINVAL;
556
557 mutex_lock(&data->update_lock);
558 if (bit)
559 data->beep_mask |= (1 << bitnr);
560 else
561 data->beep_mask &= ~(1 << bitnr);
562
563 if (bitnr < 8) {
564 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
565 if (bit)
566 reg |= (1 << bitnr);
567 else
568 reg &= ~(1 << bitnr);
569 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
570 } else if (bitnr < 16) {
571 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
572 if (bit)
573 reg |= (1 << (bitnr - 8));
574 else
575 reg &= ~(1 << (bitnr - 8));
576 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
577 } else {
578 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
579 if (bit)
580 reg |= (1 << (bitnr - 16));
581 else
582 reg &= ~(1 << (bitnr - 16));
583 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
584 }
585 mutex_unlock(&data->update_lock);
586
587 return count;
588 }
589
590 /* The W83781D has a single beep bit for temp2 and temp3 */
591 static ssize_t show_temp3_beep(struct device *dev,
592 struct device_attribute *attr, char *buf)
593 {
594 struct w83781d_data *data = w83781d_update_device(dev);
595 int bitnr = (data->type == w83781d) ? 5 : 13;
596 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
597 }
598
599 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
600 show_beep, store_beep, 0);
601 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
602 show_beep, store_beep, 1);
603 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
604 show_beep, store_beep, 2);
605 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
606 show_beep, store_beep, 3);
607 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
608 show_beep, store_beep, 8);
609 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
610 show_beep, store_beep, 9);
611 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
612 show_beep, store_beep, 10);
613 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
614 show_beep, store_beep, 16);
615 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
616 show_beep, store_beep, 17);
617 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
618 show_beep, store_beep, 6);
619 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
620 show_beep, store_beep, 7);
621 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
622 show_beep, store_beep, 11);
623 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
624 show_beep, store_beep, 4);
625 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
626 show_beep, store_beep, 5);
627 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
628 show_temp3_beep, store_beep, 13);
629 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
630 show_beep, store_beep, 15);
631
632 static ssize_t
633 show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
634 {
635 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
636 struct w83781d_data *data = w83781d_update_device(dev);
637 return sprintf(buf, "%ld\n",
638 (long) DIV_FROM_REG(data->fan_div[attr->index]));
639 }
640
641 /*
642 * Note: we save and restore the fan minimum here, because its value is
643 * determined in part by the fan divisor. This follows the principle of
644 * least surprise; the user doesn't expect the fan minimum to change just
645 * because the divisor changed.
646 */
647 static ssize_t
648 store_fan_div(struct device *dev, struct device_attribute *da,
649 const char *buf, size_t count)
650 {
651 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
652 struct w83781d_data *data = dev_get_drvdata(dev);
653 unsigned long min;
654 int nr = attr->index;
655 u8 reg;
656 unsigned long val;
657 int err;
658
659 err = kstrtoul(buf, 10, &val);
660 if (err)
661 return err;
662
663 mutex_lock(&data->update_lock);
664
665 /* Save fan_min */
666 min = FAN_FROM_REG(data->fan_min[nr],
667 DIV_FROM_REG(data->fan_div[nr]));
668
669 data->fan_div[nr] = DIV_TO_REG(val, data->type);
670
671 reg = (w83781d_read_value(data, nr == 2 ?
672 W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
673 & (nr == 0 ? 0xcf : 0x3f))
674 | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
675 w83781d_write_value(data, nr == 2 ?
676 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
677
678 /* w83781d and as99127f don't have extended divisor bits */
679 if (data->type != w83781d && data->type != as99127f) {
680 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
681 & ~(1 << (5 + nr)))
682 | ((data->fan_div[nr] & 0x04) << (3 + nr));
683 w83781d_write_value(data, W83781D_REG_VBAT, reg);
684 }
685
686 /* Restore fan_min */
687 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
688 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
689
690 mutex_unlock(&data->update_lock);
691 return count;
692 }
693
694 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
695 show_fan_div, store_fan_div, 0);
696 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
697 show_fan_div, store_fan_div, 1);
698 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
699 show_fan_div, store_fan_div, 2);
700
701 static ssize_t
702 show_pwm(struct device *dev, struct device_attribute *da, char *buf)
703 {
704 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
705 struct w83781d_data *data = w83781d_update_device(dev);
706 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
707 }
708
709 static ssize_t
710 pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)
711 {
712 struct w83781d_data *data = w83781d_update_device(dev);
713 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
714 }
715
716 static ssize_t
717 store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
718 size_t count)
719 {
720 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
721 struct w83781d_data *data = dev_get_drvdata(dev);
722 int nr = attr->index;
723 unsigned long val;
724 int err;
725
726 err = kstrtoul(buf, 10, &val);
727 if (err)
728 return err;
729
730 mutex_lock(&data->update_lock);
731 data->pwm[nr] = clamp_val(val, 0, 255);
732 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
733 mutex_unlock(&data->update_lock);
734 return count;
735 }
736
737 static ssize_t
738 pwm2_enable_store(struct device *dev, struct device_attribute *da,
739 const char *buf, size_t count)
740 {
741 struct w83781d_data *data = dev_get_drvdata(dev);
742 unsigned long val;
743 u32 reg;
744 int err;
745
746 err = kstrtoul(buf, 10, &val);
747 if (err)
748 return err;
749
750 mutex_lock(&data->update_lock);
751
752 switch (val) {
753 case 0:
754 case 1:
755 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
756 w83781d_write_value(data, W83781D_REG_PWMCLK12,
757 (reg & 0xf7) | (val << 3));
758
759 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
760 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
761 (reg & 0xef) | (!val << 4));
762
763 data->pwm2_enable = val;
764 break;
765
766 default:
767 mutex_unlock(&data->update_lock);
768 return -EINVAL;
769 }
770
771 mutex_unlock(&data->update_lock);
772 return count;
773 }
774
775 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
776 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
777 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
778 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
779 /* only PWM2 can be enabled/disabled */
780 static DEVICE_ATTR_RW(pwm2_enable);
781
782 static ssize_t
783 show_sensor(struct device *dev, struct device_attribute *da, char *buf)
784 {
785 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
786 struct w83781d_data *data = w83781d_update_device(dev);
787 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
788 }
789
790 static ssize_t
791 store_sensor(struct device *dev, struct device_attribute *da,
792 const char *buf, size_t count)
793 {
794 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
795 struct w83781d_data *data = dev_get_drvdata(dev);
796 int nr = attr->index;
797 unsigned long val;
798 u32 tmp;
799 int err;
800
801 err = kstrtoul(buf, 10, &val);
802 if (err)
803 return err;
804
805 mutex_lock(&data->update_lock);
806
807 switch (val) {
808 case 1: /* PII/Celeron diode */
809 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
810 w83781d_write_value(data, W83781D_REG_SCFG1,
811 tmp | BIT_SCFG1[nr]);
812 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
813 w83781d_write_value(data, W83781D_REG_SCFG2,
814 tmp | BIT_SCFG2[nr]);
815 data->sens[nr] = val;
816 break;
817 case 2: /* 3904 */
818 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
819 w83781d_write_value(data, W83781D_REG_SCFG1,
820 tmp | BIT_SCFG1[nr]);
821 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
822 w83781d_write_value(data, W83781D_REG_SCFG2,
823 tmp & ~BIT_SCFG2[nr]);
824 data->sens[nr] = val;
825 break;
826 case W83781D_DEFAULT_BETA:
827 dev_warn(dev,
828 "Sensor type %d is deprecated, please use 4 instead\n",
829 W83781D_DEFAULT_BETA);
830 /* fall through */
831 case 4: /* thermistor */
832 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
833 w83781d_write_value(data, W83781D_REG_SCFG1,
834 tmp & ~BIT_SCFG1[nr]);
835 data->sens[nr] = val;
836 break;
837 default:
838 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
839 (long) val);
840 break;
841 }
842
843 mutex_unlock(&data->update_lock);
844 return count;
845 }
846
847 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
848 show_sensor, store_sensor, 0);
849 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
850 show_sensor, store_sensor, 1);
851 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
852 show_sensor, store_sensor, 2);
853
854 /*
855 * Assumes that adapter is of I2C, not ISA variety.
856 * OTHERWISE DON'T CALL THIS
857 */
858 static int
859 w83781d_detect_subclients(struct i2c_client *new_client)
860 {
861 int i, val1 = 0, id;
862 int err;
863 int address = new_client->addr;
864 unsigned short sc_addr[2];
865 struct i2c_adapter *adapter = new_client->adapter;
866 struct w83781d_data *data = i2c_get_clientdata(new_client);
867 enum chips kind = data->type;
868 int num_sc = 1;
869
870 id = i2c_adapter_id(adapter);
871
872 if (force_subclients[0] == id && force_subclients[1] == address) {
873 for (i = 2; i <= 3; i++) {
874 if (force_subclients[i] < 0x48 ||
875 force_subclients[i] > 0x4f) {
876 dev_err(&new_client->dev,
877 "Invalid subclient address %d; must be 0x48-0x4f\n",
878 force_subclients[i]);
879 err = -EINVAL;
880 goto ERROR_SC_1;
881 }
882 }
883 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
884 (force_subclients[2] & 0x07) |
885 ((force_subclients[3] & 0x07) << 4));
886 sc_addr[0] = force_subclients[2];
887 } else {
888 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
889 sc_addr[0] = 0x48 + (val1 & 0x07);
890 }
891
892 if (kind != w83783s) {
893 num_sc = 2;
894 if (force_subclients[0] == id &&
895 force_subclients[1] == address) {
896 sc_addr[1] = force_subclients[3];
897 } else {
898 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
899 }
900 if (sc_addr[0] == sc_addr[1]) {
901 dev_err(&new_client->dev,
902 "Duplicate addresses 0x%x for subclients.\n",
903 sc_addr[0]);
904 err = -EBUSY;
905 goto ERROR_SC_2;
906 }
907 }
908
909 for (i = 0; i < num_sc; i++) {
910 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
911 if (!data->lm75[i]) {
912 dev_err(&new_client->dev,
913 "Subclient %d registration at address 0x%x failed.\n",
914 i, sc_addr[i]);
915 err = -ENOMEM;
916 if (i == 1)
917 goto ERROR_SC_3;
918 goto ERROR_SC_2;
919 }
920 }
921
922 return 0;
923
924 /* Undo inits in case of errors */
925 ERROR_SC_3:
926 i2c_unregister_device(data->lm75[0]);
927 ERROR_SC_2:
928 ERROR_SC_1:
929 return err;
930 }
931
932 #define IN_UNIT_ATTRS(X) \
933 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
934 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
935 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
936 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
937 &sensor_dev_attr_in##X##_beep.dev_attr.attr
938
939 #define FAN_UNIT_ATTRS(X) \
940 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
941 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
942 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
943 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
944 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
945
946 #define TEMP_UNIT_ATTRS(X) \
947 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
948 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
949 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
950 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
951 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
952
953 static struct attribute *w83781d_attributes[] = {
954 IN_UNIT_ATTRS(0),
955 IN_UNIT_ATTRS(2),
956 IN_UNIT_ATTRS(3),
957 IN_UNIT_ATTRS(4),
958 IN_UNIT_ATTRS(5),
959 IN_UNIT_ATTRS(6),
960 FAN_UNIT_ATTRS(1),
961 FAN_UNIT_ATTRS(2),
962 FAN_UNIT_ATTRS(3),
963 TEMP_UNIT_ATTRS(1),
964 TEMP_UNIT_ATTRS(2),
965 &dev_attr_cpu0_vid.attr,
966 &dev_attr_vrm.attr,
967 &dev_attr_alarms.attr,
968 &dev_attr_beep_mask.attr,
969 &sensor_dev_attr_beep_enable.dev_attr.attr,
970 NULL
971 };
972 static const struct attribute_group w83781d_group = {
973 .attrs = w83781d_attributes,
974 };
975
976 static struct attribute *w83781d_attributes_in1[] = {
977 IN_UNIT_ATTRS(1),
978 NULL
979 };
980 static const struct attribute_group w83781d_group_in1 = {
981 .attrs = w83781d_attributes_in1,
982 };
983
984 static struct attribute *w83781d_attributes_in78[] = {
985 IN_UNIT_ATTRS(7),
986 IN_UNIT_ATTRS(8),
987 NULL
988 };
989 static const struct attribute_group w83781d_group_in78 = {
990 .attrs = w83781d_attributes_in78,
991 };
992
993 static struct attribute *w83781d_attributes_temp3[] = {
994 TEMP_UNIT_ATTRS(3),
995 NULL
996 };
997 static const struct attribute_group w83781d_group_temp3 = {
998 .attrs = w83781d_attributes_temp3,
999 };
1000
1001 static struct attribute *w83781d_attributes_pwm12[] = {
1002 &sensor_dev_attr_pwm1.dev_attr.attr,
1003 &sensor_dev_attr_pwm2.dev_attr.attr,
1004 &dev_attr_pwm2_enable.attr,
1005 NULL
1006 };
1007 static const struct attribute_group w83781d_group_pwm12 = {
1008 .attrs = w83781d_attributes_pwm12,
1009 };
1010
1011 static struct attribute *w83781d_attributes_pwm34[] = {
1012 &sensor_dev_attr_pwm3.dev_attr.attr,
1013 &sensor_dev_attr_pwm4.dev_attr.attr,
1014 NULL
1015 };
1016 static const struct attribute_group w83781d_group_pwm34 = {
1017 .attrs = w83781d_attributes_pwm34,
1018 };
1019
1020 static struct attribute *w83781d_attributes_other[] = {
1021 &sensor_dev_attr_temp1_type.dev_attr.attr,
1022 &sensor_dev_attr_temp2_type.dev_attr.attr,
1023 &sensor_dev_attr_temp3_type.dev_attr.attr,
1024 NULL
1025 };
1026 static const struct attribute_group w83781d_group_other = {
1027 .attrs = w83781d_attributes_other,
1028 };
1029
1030 /* No clean up is done on error, it's up to the caller */
1031 static int
1032 w83781d_create_files(struct device *dev, int kind, int is_isa)
1033 {
1034 int err;
1035
1036 err = sysfs_create_group(&dev->kobj, &w83781d_group);
1037 if (err)
1038 return err;
1039
1040 if (kind != w83783s) {
1041 err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
1042 if (err)
1043 return err;
1044 }
1045 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1046 err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
1047 if (err)
1048 return err;
1049 }
1050 if (kind != w83783s) {
1051 err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
1052 if (err)
1053 return err;
1054
1055 if (kind != w83781d) {
1056 err = sysfs_chmod_file(&dev->kobj,
1057 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1058 S_IRUGO | S_IWUSR);
1059 if (err)
1060 return err;
1061 }
1062 }
1063
1064 if (kind != w83781d && kind != as99127f) {
1065 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
1066 if (err)
1067 return err;
1068 }
1069 if (kind == w83782d && !is_isa) {
1070 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
1071 if (err)
1072 return err;
1073 }
1074
1075 if (kind != as99127f && kind != w83781d) {
1076 err = device_create_file(dev,
1077 &sensor_dev_attr_temp1_type.dev_attr);
1078 if (err)
1079 return err;
1080 err = device_create_file(dev,
1081 &sensor_dev_attr_temp2_type.dev_attr);
1082 if (err)
1083 return err;
1084 if (kind != w83783s) {
1085 err = device_create_file(dev,
1086 &sensor_dev_attr_temp3_type.dev_attr);
1087 if (err)
1088 return err;
1089 }
1090 }
1091
1092 return 0;
1093 }
1094
1095 /* Return 0 if detection is successful, -ENODEV otherwise */
1096 static int
1097 w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
1098 {
1099 int val1, val2;
1100 struct w83781d_data *isa = w83781d_data_if_isa();
1101 struct i2c_adapter *adapter = client->adapter;
1102 int address = client->addr;
1103 const char *client_name;
1104 enum vendor { winbond, asus } vendid;
1105
1106 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1107 return -ENODEV;
1108
1109 /*
1110 * We block updates of the ISA device to minimize the risk of
1111 * concurrent access to the same W83781D chip through different
1112 * interfaces.
1113 */
1114 if (isa)
1115 mutex_lock(&isa->update_lock);
1116
1117 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1118 dev_dbg(&adapter->dev,
1119 "Detection of w83781d chip failed at step 3\n");
1120 goto err_nodev;
1121 }
1122
1123 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1124 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1125 /* Check for Winbond or Asus ID if in bank 0 */
1126 if (!(val1 & 0x07) &&
1127 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1128 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1129 dev_dbg(&adapter->dev,
1130 "Detection of w83781d chip failed at step 4\n");
1131 goto err_nodev;
1132 }
1133 /*
1134 * If Winbond SMBus, check address at 0x48.
1135 * Asus doesn't support, except for as99127f rev.2
1136 */
1137 if ((!(val1 & 0x80) && val2 == 0xa3) ||
1138 ((val1 & 0x80) && val2 == 0x5c)) {
1139 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1140 != address) {
1141 dev_dbg(&adapter->dev,
1142 "Detection of w83781d chip failed at step 5\n");
1143 goto err_nodev;
1144 }
1145 }
1146
1147 /* Put it now into bank 0 and Vendor ID High Byte */
1148 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1149 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1150 & 0x78) | 0x80);
1151
1152 /* Get the vendor ID */
1153 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1154 if (val2 == 0x5c)
1155 vendid = winbond;
1156 else if (val2 == 0x12)
1157 vendid = asus;
1158 else {
1159 dev_dbg(&adapter->dev,
1160 "w83781d chip vendor is neither Winbond nor Asus\n");
1161 goto err_nodev;
1162 }
1163
1164 /* Determine the chip type. */
1165 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1166 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1167 client_name = "w83781d";
1168 else if (val1 == 0x30 && vendid == winbond)
1169 client_name = "w83782d";
1170 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1171 client_name = "w83783s";
1172 else if (val1 == 0x31)
1173 client_name = "as99127f";
1174 else
1175 goto err_nodev;
1176
1177 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1178 dev_dbg(&adapter->dev,
1179 "Device at 0x%02x appears to be the same as ISA device\n",
1180 address);
1181 goto err_nodev;
1182 }
1183
1184 if (isa)
1185 mutex_unlock(&isa->update_lock);
1186
1187 strlcpy(info->type, client_name, I2C_NAME_SIZE);
1188
1189 return 0;
1190
1191 err_nodev:
1192 if (isa)
1193 mutex_unlock(&isa->update_lock);
1194 return -ENODEV;
1195 }
1196
1197 static void w83781d_remove_files(struct device *dev)
1198 {
1199 sysfs_remove_group(&dev->kobj, &w83781d_group);
1200 sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
1201 sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
1202 sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
1203 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
1204 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
1205 sysfs_remove_group(&dev->kobj, &w83781d_group_other);
1206 }
1207
1208 static int
1209 w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1210 {
1211 struct device *dev = &client->dev;
1212 struct w83781d_data *data;
1213 int err;
1214
1215 data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
1216 if (!data)
1217 return -ENOMEM;
1218
1219 i2c_set_clientdata(client, data);
1220 mutex_init(&data->lock);
1221 mutex_init(&data->update_lock);
1222
1223 data->type = id->driver_data;
1224 data->client = client;
1225
1226 /* attach secondary i2c lm75-like clients */
1227 err = w83781d_detect_subclients(client);
1228 if (err)
1229 return err;
1230
1231 /* Initialize the chip */
1232 w83781d_init_device(dev);
1233
1234 /* Register sysfs hooks */
1235 err = w83781d_create_files(dev, data->type, 0);
1236 if (err)
1237 goto exit_remove_files;
1238
1239 data->hwmon_dev = hwmon_device_register(dev);
1240 if (IS_ERR(data->hwmon_dev)) {
1241 err = PTR_ERR(data->hwmon_dev);
1242 goto exit_remove_files;
1243 }
1244
1245 return 0;
1246
1247 exit_remove_files:
1248 w83781d_remove_files(dev);
1249 if (data->lm75[0])
1250 i2c_unregister_device(data->lm75[0]);
1251 if (data->lm75[1])
1252 i2c_unregister_device(data->lm75[1]);
1253 return err;
1254 }
1255
1256 static int
1257 w83781d_remove(struct i2c_client *client)
1258 {
1259 struct w83781d_data *data = i2c_get_clientdata(client);
1260 struct device *dev = &client->dev;
1261
1262 hwmon_device_unregister(data->hwmon_dev);
1263 w83781d_remove_files(dev);
1264
1265 if (data->lm75[0])
1266 i2c_unregister_device(data->lm75[0]);
1267 if (data->lm75[1])
1268 i2c_unregister_device(data->lm75[1]);
1269
1270 return 0;
1271 }
1272
1273 static int
1274 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1275 {
1276 struct i2c_client *client = data->client;
1277 int res, bank;
1278 struct i2c_client *cl;
1279
1280 bank = (reg >> 8) & 0x0f;
1281 if (bank > 2)
1282 /* switch banks */
1283 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1284 bank);
1285 if (bank == 0 || bank > 2) {
1286 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1287 } else {
1288 /* switch to subclient */
1289 cl = data->lm75[bank - 1];
1290 /* convert from ISA to LM75 I2C addresses */
1291 switch (reg & 0xff) {
1292 case 0x50: /* TEMP */
1293 res = i2c_smbus_read_word_swapped(cl, 0);
1294 break;
1295 case 0x52: /* CONFIG */
1296 res = i2c_smbus_read_byte_data(cl, 1);
1297 break;
1298 case 0x53: /* HYST */
1299 res = i2c_smbus_read_word_swapped(cl, 2);
1300 break;
1301 case 0x55: /* OVER */
1302 default:
1303 res = i2c_smbus_read_word_swapped(cl, 3);
1304 break;
1305 }
1306 }
1307 if (bank > 2)
1308 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1309
1310 return res;
1311 }
1312
1313 static int
1314 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1315 {
1316 struct i2c_client *client = data->client;
1317 int bank;
1318 struct i2c_client *cl;
1319
1320 bank = (reg >> 8) & 0x0f;
1321 if (bank > 2)
1322 /* switch banks */
1323 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1324 bank);
1325 if (bank == 0 || bank > 2) {
1326 i2c_smbus_write_byte_data(client, reg & 0xff,
1327 value & 0xff);
1328 } else {
1329 /* switch to subclient */
1330 cl = data->lm75[bank - 1];
1331 /* convert from ISA to LM75 I2C addresses */
1332 switch (reg & 0xff) {
1333 case 0x52: /* CONFIG */
1334 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1335 break;
1336 case 0x53: /* HYST */
1337 i2c_smbus_write_word_swapped(cl, 2, value);
1338 break;
1339 case 0x55: /* OVER */
1340 i2c_smbus_write_word_swapped(cl, 3, value);
1341 break;
1342 }
1343 }
1344 if (bank > 2)
1345 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1346
1347 return 0;
1348 }
1349
1350 static void
1351 w83781d_init_device(struct device *dev)
1352 {
1353 struct w83781d_data *data = dev_get_drvdata(dev);
1354 int i, p;
1355 int type = data->type;
1356 u8 tmp;
1357
1358 if (reset && type != as99127f) { /*
1359 * this resets registers we don't have
1360 * documentation for on the as99127f
1361 */
1362 /*
1363 * Resetting the chip has been the default for a long time,
1364 * but it causes the BIOS initializations (fan clock dividers,
1365 * thermal sensor types...) to be lost, so it is now optional.
1366 * It might even go away if nobody reports it as being useful,
1367 * as I see very little reason why this would be needed at
1368 * all.
1369 */
1370 dev_info(dev,
1371 "If reset=1 solved a problem you were having, please report!\n");
1372
1373 /* save these registers */
1374 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1375 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1376 /*
1377 * Reset all except Watchdog values and last conversion values
1378 * This sets fan-divs to 2, among others
1379 */
1380 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1381 /*
1382 * Restore the registers and disable power-on abnormal beep.
1383 * This saves FAN 1/2/3 input/output values set by BIOS.
1384 */
1385 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1386 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1387 /*
1388 * Disable master beep-enable (reset turns it on).
1389 * Individual beep_mask should be reset to off but for some
1390 * reason disabling this bit helps some people not get beeped
1391 */
1392 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1393 }
1394
1395 /*
1396 * Disable power-on abnormal beep, as advised by the datasheet.
1397 * Already done if reset=1.
1398 */
1399 if (init && !reset && type != as99127f) {
1400 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1401 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1402 }
1403
1404 data->vrm = vid_which_vrm();
1405
1406 if ((type != w83781d) && (type != as99127f)) {
1407 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1408 for (i = 1; i <= 3; i++) {
1409 if (!(tmp & BIT_SCFG1[i - 1])) {
1410 data->sens[i - 1] = 4;
1411 } else {
1412 if (w83781d_read_value
1413 (data,
1414 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1415 data->sens[i - 1] = 1;
1416 else
1417 data->sens[i - 1] = 2;
1418 }
1419 if (type == w83783s && i == 2)
1420 break;
1421 }
1422 }
1423
1424 if (init && type != as99127f) {
1425 /* Enable temp2 */
1426 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1427 if (tmp & 0x01) {
1428 dev_warn(dev,
1429 "Enabling temp2, readings might not make sense\n");
1430 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1431 tmp & 0xfe);
1432 }
1433
1434 /* Enable temp3 */
1435 if (type != w83783s) {
1436 tmp = w83781d_read_value(data,
1437 W83781D_REG_TEMP3_CONFIG);
1438 if (tmp & 0x01) {
1439 dev_warn(dev,
1440 "Enabling temp3, readings might not make sense\n");
1441 w83781d_write_value(data,
1442 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1443 }
1444 }
1445 }
1446
1447 /* Start monitoring */
1448 w83781d_write_value(data, W83781D_REG_CONFIG,
1449 (w83781d_read_value(data,
1450 W83781D_REG_CONFIG) & 0xf7)
1451 | 0x01);
1452
1453 /* A few vars need to be filled upon startup */
1454 for (i = 0; i < 3; i++) {
1455 data->fan_min[i] = w83781d_read_value(data,
1456 W83781D_REG_FAN_MIN(i));
1457 }
1458
1459 mutex_init(&data->update_lock);
1460 }
1461
1462 static struct w83781d_data *w83781d_update_device(struct device *dev)
1463 {
1464 struct w83781d_data *data = dev_get_drvdata(dev);
1465 struct i2c_client *client = data->client;
1466 int i;
1467
1468 mutex_lock(&data->update_lock);
1469
1470 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1471 || !data->valid) {
1472 dev_dbg(dev, "Starting device update\n");
1473
1474 for (i = 0; i <= 8; i++) {
1475 if (data->type == w83783s && i == 1)
1476 continue; /* 783S has no in1 */
1477 data->in[i] =
1478 w83781d_read_value(data, W83781D_REG_IN(i));
1479 data->in_min[i] =
1480 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1481 data->in_max[i] =
1482 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1483 if ((data->type != w83782d) && (i == 6))
1484 break;
1485 }
1486 for (i = 0; i < 3; i++) {
1487 data->fan[i] =
1488 w83781d_read_value(data, W83781D_REG_FAN(i));
1489 data->fan_min[i] =
1490 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1491 }
1492 if (data->type != w83781d && data->type != as99127f) {
1493 for (i = 0; i < 4; i++) {
1494 data->pwm[i] =
1495 w83781d_read_value(data,
1496 W83781D_REG_PWM[i]);
1497 /* Only W83782D on SMBus has PWM3 and PWM4 */
1498 if ((data->type != w83782d || !client)
1499 && i == 1)
1500 break;
1501 }
1502 /* Only PWM2 can be disabled */
1503 data->pwm2_enable = (w83781d_read_value(data,
1504 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1505 }
1506
1507 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1508 data->temp_max =
1509 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1510 data->temp_max_hyst =
1511 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1512 data->temp_add[0] =
1513 w83781d_read_value(data, W83781D_REG_TEMP(2));
1514 data->temp_max_add[0] =
1515 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1516 data->temp_max_hyst_add[0] =
1517 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1518 if (data->type != w83783s) {
1519 data->temp_add[1] =
1520 w83781d_read_value(data, W83781D_REG_TEMP(3));
1521 data->temp_max_add[1] =
1522 w83781d_read_value(data,
1523 W83781D_REG_TEMP_OVER(3));
1524 data->temp_max_hyst_add[1] =
1525 w83781d_read_value(data,
1526 W83781D_REG_TEMP_HYST(3));
1527 }
1528 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1529 data->vid = i & 0x0f;
1530 data->vid |= (w83781d_read_value(data,
1531 W83781D_REG_CHIPID) & 0x01) << 4;
1532 data->fan_div[0] = (i >> 4) & 0x03;
1533 data->fan_div[1] = (i >> 6) & 0x03;
1534 data->fan_div[2] = (w83781d_read_value(data,
1535 W83781D_REG_PIN) >> 6) & 0x03;
1536 if ((data->type != w83781d) && (data->type != as99127f)) {
1537 i = w83781d_read_value(data, W83781D_REG_VBAT);
1538 data->fan_div[0] |= (i >> 3) & 0x04;
1539 data->fan_div[1] |= (i >> 4) & 0x04;
1540 data->fan_div[2] |= (i >> 5) & 0x04;
1541 }
1542 if (data->type == w83782d) {
1543 data->alarms = w83781d_read_value(data,
1544 W83782D_REG_ALARM1)
1545 | (w83781d_read_value(data,
1546 W83782D_REG_ALARM2) << 8)
1547 | (w83781d_read_value(data,
1548 W83782D_REG_ALARM3) << 16);
1549 } else if (data->type == w83783s) {
1550 data->alarms = w83781d_read_value(data,
1551 W83782D_REG_ALARM1)
1552 | (w83781d_read_value(data,
1553 W83782D_REG_ALARM2) << 8);
1554 } else {
1555 /*
1556 * No real-time status registers, fall back to
1557 * interrupt status registers
1558 */
1559 data->alarms = w83781d_read_value(data,
1560 W83781D_REG_ALARM1)
1561 | (w83781d_read_value(data,
1562 W83781D_REG_ALARM2) << 8);
1563 }
1564 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1565 data->beep_mask = (i << 8) +
1566 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1567 if ((data->type != w83781d) && (data->type != as99127f)) {
1568 data->beep_mask |=
1569 w83781d_read_value(data,
1570 W83781D_REG_BEEP_INTS3) << 16;
1571 }
1572 data->last_updated = jiffies;
1573 data->valid = 1;
1574 }
1575
1576 mutex_unlock(&data->update_lock);
1577
1578 return data;
1579 }
1580
1581 static const struct i2c_device_id w83781d_ids[] = {
1582 { "w83781d", w83781d, },
1583 { "w83782d", w83782d, },
1584 { "w83783s", w83783s, },
1585 { "as99127f", as99127f },
1586 { /* LIST END */ }
1587 };
1588 MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1589
1590 static struct i2c_driver w83781d_driver = {
1591 .class = I2C_CLASS_HWMON,
1592 .driver = {
1593 .name = "w83781d",
1594 },
1595 .probe = w83781d_probe,
1596 .remove = w83781d_remove,
1597 .id_table = w83781d_ids,
1598 .detect = w83781d_detect,
1599 .address_list = normal_i2c,
1600 };
1601
1602 /*
1603 * ISA related code
1604 */
1605 #ifdef CONFIG_ISA
1606
1607 /* ISA device, if found */
1608 static struct platform_device *pdev;
1609
1610 static unsigned short isa_address = 0x290;
1611
1612 /*
1613 * I2C devices get this name attribute automatically, but for ISA devices
1614 * we must create it by ourselves.
1615 */
1616 static ssize_t
1617 name_show(struct device *dev, struct device_attribute *devattr, char *buf)
1618 {
1619 struct w83781d_data *data = dev_get_drvdata(dev);
1620 return sprintf(buf, "%s\n", data->name);
1621 }
1622 static DEVICE_ATTR_RO(name);
1623
1624 static struct w83781d_data *w83781d_data_if_isa(void)
1625 {
1626 return pdev ? platform_get_drvdata(pdev) : NULL;
1627 }
1628
1629 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1630 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1631 {
1632 struct w83781d_data *isa;
1633 int i;
1634
1635 if (!pdev) /* No ISA chip */
1636 return 0;
1637
1638 isa = platform_get_drvdata(pdev);
1639
1640 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1641 return 0; /* Address doesn't match */
1642 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1643 return 0; /* Chip type doesn't match */
1644
1645 /*
1646 * We compare all the limit registers, the config register and the
1647 * interrupt mask registers
1648 */
1649 for (i = 0x2b; i <= 0x3d; i++) {
1650 if (w83781d_read_value(isa, i) !=
1651 i2c_smbus_read_byte_data(client, i))
1652 return 0;
1653 }
1654 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
1655 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
1656 return 0;
1657 for (i = 0x43; i <= 0x46; i++) {
1658 if (w83781d_read_value(isa, i) !=
1659 i2c_smbus_read_byte_data(client, i))
1660 return 0;
1661 }
1662
1663 return 1;
1664 }
1665
1666 static int
1667 w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1668 {
1669 int word_sized, res;
1670
1671 word_sized = (((reg & 0xff00) == 0x100)
1672 || ((reg & 0xff00) == 0x200))
1673 && (((reg & 0x00ff) == 0x50)
1674 || ((reg & 0x00ff) == 0x53)
1675 || ((reg & 0x00ff) == 0x55));
1676 if (reg & 0xff00) {
1677 outb_p(W83781D_REG_BANK,
1678 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1679 outb_p(reg >> 8,
1680 data->isa_addr + W83781D_DATA_REG_OFFSET);
1681 }
1682 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1683 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
1684 if (word_sized) {
1685 outb_p((reg & 0xff) + 1,
1686 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1687 res =
1688 (res << 8) + inb_p(data->isa_addr +
1689 W83781D_DATA_REG_OFFSET);
1690 }
1691 if (reg & 0xff00) {
1692 outb_p(W83781D_REG_BANK,
1693 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1694 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1695 }
1696 return res;
1697 }
1698
1699 static void
1700 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1701 {
1702 int word_sized;
1703
1704 word_sized = (((reg & 0xff00) == 0x100)
1705 || ((reg & 0xff00) == 0x200))
1706 && (((reg & 0x00ff) == 0x53)
1707 || ((reg & 0x00ff) == 0x55));
1708 if (reg & 0xff00) {
1709 outb_p(W83781D_REG_BANK,
1710 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1711 outb_p(reg >> 8,
1712 data->isa_addr + W83781D_DATA_REG_OFFSET);
1713 }
1714 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1715 if (word_sized) {
1716 outb_p(value >> 8,
1717 data->isa_addr + W83781D_DATA_REG_OFFSET);
1718 outb_p((reg & 0xff) + 1,
1719 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1720 }
1721 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
1722 if (reg & 0xff00) {
1723 outb_p(W83781D_REG_BANK,
1724 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1725 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1726 }
1727 }
1728
1729 /*
1730 * The SMBus locks itself, usually, but nothing may access the Winbond between
1731 * bank switches. ISA access must always be locked explicitly!
1732 * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1733 * would slow down the W83781D access and should not be necessary.
1734 * There are some ugly typecasts here, but the good news is - they should
1735 * nowhere else be necessary!
1736 */
1737 static int
1738 w83781d_read_value(struct w83781d_data *data, u16 reg)
1739 {
1740 struct i2c_client *client = data->client;
1741 int res;
1742
1743 mutex_lock(&data->lock);
1744 if (client)
1745 res = w83781d_read_value_i2c(data, reg);
1746 else
1747 res = w83781d_read_value_isa(data, reg);
1748 mutex_unlock(&data->lock);
1749 return res;
1750 }
1751
1752 static int
1753 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1754 {
1755 struct i2c_client *client = data->client;
1756
1757 mutex_lock(&data->lock);
1758 if (client)
1759 w83781d_write_value_i2c(data, reg, value);
1760 else
1761 w83781d_write_value_isa(data, reg, value);
1762 mutex_unlock(&data->lock);
1763 return 0;
1764 }
1765
1766 static int
1767 w83781d_isa_probe(struct platform_device *pdev)
1768 {
1769 int err, reg;
1770 struct w83781d_data *data;
1771 struct resource *res;
1772
1773 /* Reserve the ISA region */
1774 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1775 if (!devm_request_region(&pdev->dev,
1776 res->start + W83781D_ADDR_REG_OFFSET, 2,
1777 "w83781d"))
1778 return -EBUSY;
1779
1780 data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
1781 GFP_KERNEL);
1782 if (!data)
1783 return -ENOMEM;
1784
1785 mutex_init(&data->lock);
1786 data->isa_addr = res->start;
1787 platform_set_drvdata(pdev, data);
1788
1789 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1790 switch (reg) {
1791 case 0x30:
1792 data->type = w83782d;
1793 data->name = "w83782d";
1794 break;
1795 default:
1796 data->type = w83781d;
1797 data->name = "w83781d";
1798 }
1799
1800 /* Initialize the W83781D chip */
1801 w83781d_init_device(&pdev->dev);
1802
1803 /* Register sysfs hooks */
1804 err = w83781d_create_files(&pdev->dev, data->type, 1);
1805 if (err)
1806 goto exit_remove_files;
1807
1808 err = device_create_file(&pdev->dev, &dev_attr_name);
1809 if (err)
1810 goto exit_remove_files;
1811
1812 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1813 if (IS_ERR(data->hwmon_dev)) {
1814 err = PTR_ERR(data->hwmon_dev);
1815 goto exit_remove_files;
1816 }
1817
1818 return 0;
1819
1820 exit_remove_files:
1821 w83781d_remove_files(&pdev->dev);
1822 device_remove_file(&pdev->dev, &dev_attr_name);
1823 return err;
1824 }
1825
1826 static int
1827 w83781d_isa_remove(struct platform_device *pdev)
1828 {
1829 struct w83781d_data *data = platform_get_drvdata(pdev);
1830
1831 hwmon_device_unregister(data->hwmon_dev);
1832 w83781d_remove_files(&pdev->dev);
1833 device_remove_file(&pdev->dev, &dev_attr_name);
1834
1835 return 0;
1836 }
1837
1838 static struct platform_driver w83781d_isa_driver = {
1839 .driver = {
1840 .name = "w83781d",
1841 },
1842 .probe = w83781d_isa_probe,
1843 .remove = w83781d_isa_remove,
1844 };
1845
1846 /* return 1 if a supported chip is found, 0 otherwise */
1847 static int __init
1848 w83781d_isa_found(unsigned short address)
1849 {
1850 int val, save, found = 0;
1851 int port;
1852
1853 /*
1854 * Some boards declare base+0 to base+7 as a PNP device, some base+4
1855 * to base+7 and some base+5 to base+6. So we better request each port
1856 * individually for the probing phase.
1857 */
1858 for (port = address; port < address + W83781D_EXTENT; port++) {
1859 if (!request_region(port, 1, "w83781d")) {
1860 pr_debug("Failed to request port 0x%x\n", port);
1861 goto release;
1862 }
1863 }
1864
1865 #define REALLY_SLOW_IO
1866 /*
1867 * We need the timeouts for at least some W83781D-like
1868 * chips. But only if we read 'undefined' registers.
1869 */
1870 val = inb_p(address + 1);
1871 if (inb_p(address + 2) != val
1872 || inb_p(address + 3) != val
1873 || inb_p(address + 7) != val) {
1874 pr_debug("Detection failed at step %d\n", 1);
1875 goto release;
1876 }
1877 #undef REALLY_SLOW_IO
1878
1879 /*
1880 * We should be able to change the 7 LSB of the address port. The
1881 * MSB (busy flag) should be clear initially, set after the write.
1882 */
1883 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1884 if (save & 0x80) {
1885 pr_debug("Detection failed at step %d\n", 2);
1886 goto release;
1887 }
1888 val = ~save & 0x7f;
1889 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1890 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1891 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1892 pr_debug("Detection failed at step %d\n", 3);
1893 goto release;
1894 }
1895
1896 /* We found a device, now see if it could be a W83781D */
1897 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1898 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1899 if (val & 0x80) {
1900 pr_debug("Detection failed at step %d\n", 4);
1901 goto release;
1902 }
1903 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1904 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1905 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1906 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1907 if ((!(save & 0x80) && (val != 0xa3))
1908 || ((save & 0x80) && (val != 0x5c))) {
1909 pr_debug("Detection failed at step %d\n", 5);
1910 goto release;
1911 }
1912 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1913 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1914 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1915 pr_debug("Detection failed at step %d\n", 6);
1916 goto release;
1917 }
1918
1919 /* The busy flag should be clear again */
1920 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1921 pr_debug("Detection failed at step %d\n", 7);
1922 goto release;
1923 }
1924
1925 /* Determine the chip type */
1926 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1927 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1928 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1929 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1930 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1931 if ((val & 0xfe) == 0x10 /* W83781D */
1932 || val == 0x30) /* W83782D */
1933 found = 1;
1934
1935 if (found)
1936 pr_info("Found a %s chip at %#x\n",
1937 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1938
1939 release:
1940 for (port--; port >= address; port--)
1941 release_region(port, 1);
1942 return found;
1943 }
1944
1945 static int __init
1946 w83781d_isa_device_add(unsigned short address)
1947 {
1948 struct resource res = {
1949 .start = address,
1950 .end = address + W83781D_EXTENT - 1,
1951 .name = "w83781d",
1952 .flags = IORESOURCE_IO,
1953 };
1954 int err;
1955
1956 pdev = platform_device_alloc("w83781d", address);
1957 if (!pdev) {
1958 err = -ENOMEM;
1959 pr_err("Device allocation failed\n");
1960 goto exit;
1961 }
1962
1963 err = platform_device_add_resources(pdev, &res, 1);
1964 if (err) {
1965 pr_err("Device resource addition failed (%d)\n", err);
1966 goto exit_device_put;
1967 }
1968
1969 err = platform_device_add(pdev);
1970 if (err) {
1971 pr_err("Device addition failed (%d)\n", err);
1972 goto exit_device_put;
1973 }
1974
1975 return 0;
1976
1977 exit_device_put:
1978 platform_device_put(pdev);
1979 exit:
1980 pdev = NULL;
1981 return err;
1982 }
1983
1984 static int __init
1985 w83781d_isa_register(void)
1986 {
1987 int res;
1988
1989 if (w83781d_isa_found(isa_address)) {
1990 res = platform_driver_register(&w83781d_isa_driver);
1991 if (res)
1992 goto exit;
1993
1994 /* Sets global pdev as a side effect */
1995 res = w83781d_isa_device_add(isa_address);
1996 if (res)
1997 goto exit_unreg_isa_driver;
1998 }
1999
2000 return 0;
2001
2002 exit_unreg_isa_driver:
2003 platform_driver_unregister(&w83781d_isa_driver);
2004 exit:
2005 return res;
2006 }
2007
2008 static void
2009 w83781d_isa_unregister(void)
2010 {
2011 if (pdev) {
2012 platform_device_unregister(pdev);
2013 platform_driver_unregister(&w83781d_isa_driver);
2014 }
2015 }
2016 #else /* !CONFIG_ISA */
2017
2018 static struct w83781d_data *w83781d_data_if_isa(void)
2019 {
2020 return NULL;
2021 }
2022
2023 static int
2024 w83781d_alias_detect(struct i2c_client *client, u8 chipid)
2025 {
2026 return 0;
2027 }
2028
2029 static int
2030 w83781d_read_value(struct w83781d_data *data, u16 reg)
2031 {
2032 int res;
2033
2034 mutex_lock(&data->lock);
2035 res = w83781d_read_value_i2c(data, reg);
2036 mutex_unlock(&data->lock);
2037
2038 return res;
2039 }
2040
2041 static int
2042 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2043 {
2044 mutex_lock(&data->lock);
2045 w83781d_write_value_i2c(data, reg, value);
2046 mutex_unlock(&data->lock);
2047
2048 return 0;
2049 }
2050
2051 static int __init
2052 w83781d_isa_register(void)
2053 {
2054 return 0;
2055 }
2056
2057 static void
2058 w83781d_isa_unregister(void)
2059 {
2060 }
2061 #endif /* CONFIG_ISA */
2062
2063 static int __init
2064 sensors_w83781d_init(void)
2065 {
2066 int res;
2067
2068 /*
2069 * We register the ISA device first, so that we can skip the
2070 * registration of an I2C interface to the same device.
2071 */
2072 res = w83781d_isa_register();
2073 if (res)
2074 goto exit;
2075
2076 res = i2c_add_driver(&w83781d_driver);
2077 if (res)
2078 goto exit_unreg_isa;
2079
2080 return 0;
2081
2082 exit_unreg_isa:
2083 w83781d_isa_unregister();
2084 exit:
2085 return res;
2086 }
2087
2088 static void __exit
2089 sensors_w83781d_exit(void)
2090 {
2091 w83781d_isa_unregister();
2092 i2c_del_driver(&w83781d_driver);
2093 }
2094
2095 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2096 "Philip Edelbrock <phil@netroedge.com>, "
2097 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2098 MODULE_DESCRIPTION("W83781D driver");
2099 MODULE_LICENSE("GPL");
2100
2101 module_init(sensors_w83781d_init);
2102 module_exit(sensors_w83781d_exit);
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