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1 /*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 /*
24 Supports following chips:
25
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
33
34 */
35
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c-isa.h>
42 #include <linux/i2c-sensor.h>
43 #include <linux/i2c-vid.h>
44 #include <linux/hwmon.h>
45 #include <linux/err.h>
46 #include <asm/io.h>
47 #include "lm75.h"
48
49 /* Addresses to scan */
50 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
51 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
52 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
53 static unsigned short isa_address = 0x290;
54
55 /* Insmod parameters */
56 SENSORS_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
57 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
58 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
59
60 static int init = 1;
61 module_param(init, bool, 0);
62 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
63
64 /* Constants specified below */
65
66 /* Length of ISA address segment */
67 #define W83781D_EXTENT 8
68
69 /* Where are the ISA address/data registers relative to the base address */
70 #define W83781D_ADDR_REG_OFFSET 5
71 #define W83781D_DATA_REG_OFFSET 6
72
73 /* The W83781D registers */
74 /* The W83782D registers for nr=7,8 are in bank 5 */
75 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
76 (0x554 + (((nr) - 7) * 2)))
77 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
78 (0x555 + (((nr) - 7) * 2)))
79 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
80 (0x550 + (nr) - 7))
81
82 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
83 #define W83781D_REG_FAN(nr) (0x27 + (nr))
84
85 #define W83781D_REG_BANK 0x4E
86 #define W83781D_REG_TEMP2_CONFIG 0x152
87 #define W83781D_REG_TEMP3_CONFIG 0x252
88 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
89 ((nr == 2) ? (0x0150) : \
90 (0x27)))
91 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
92 ((nr == 2) ? (0x153) : \
93 (0x3A)))
94 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
95 ((nr == 2) ? (0x155) : \
96 (0x39)))
97
98 #define W83781D_REG_CONFIG 0x40
99 #define W83781D_REG_ALARM1 0x41
100 #define W83781D_REG_ALARM2 0x42
101 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */
102
103 #define W83781D_REG_IRQ 0x4C
104 #define W83781D_REG_BEEP_CONFIG 0x4D
105 #define W83781D_REG_BEEP_INTS1 0x56
106 #define W83781D_REG_BEEP_INTS2 0x57
107 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
108
109 #define W83781D_REG_VID_FANDIV 0x47
110
111 #define W83781D_REG_CHIPID 0x49
112 #define W83781D_REG_WCHIPID 0x58
113 #define W83781D_REG_CHIPMAN 0x4F
114 #define W83781D_REG_PIN 0x4B
115
116 /* 782D/783S only */
117 #define W83781D_REG_VBAT 0x5D
118
119 /* PWM 782D (1-4) and 783S (1-2) only */
120 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
121 /* on which is which; */
122 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
123 /* However 782d is probably wrong. */
124 #define W83781D_REG_PWM3 0x5E
125 #define W83781D_REG_PWM4 0x5F
126 #define W83781D_REG_PWMCLK12 0x5C
127 #define W83781D_REG_PWMCLK34 0x45C
128 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
129 W83781D_REG_PWM3, W83781D_REG_PWM4
130 };
131
132 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
133
134 #define W83781D_REG_I2C_ADDR 0x48
135 #define W83781D_REG_I2C_SUBADDR 0x4A
136
137 /* The following are undocumented in the data sheets however we
138 received the information in an email from Winbond tech support */
139 /* Sensor selection - not on 781d */
140 #define W83781D_REG_SCFG1 0x5D
141 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
142
143 #define W83781D_REG_SCFG2 0x59
144 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
145
146 #define W83781D_DEFAULT_BETA 3435
147
148 /* RT Table registers */
149 #define W83781D_REG_RT_IDX 0x50
150 #define W83781D_REG_RT_VAL 0x51
151
152 /* Conversions. Rounding and limit checking is only done on the TO_REG
153 variants. Note that you should be a bit careful with which arguments
154 these macros are called: arguments may be evaluated more than once.
155 Fixing this is just not worth it. */
156 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
157 #define IN_FROM_REG(val) (((val) * 16) / 10)
158
159 static inline u8
160 FAN_TO_REG(long rpm, int div)
161 {
162 if (rpm == 0)
163 return 255;
164 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
165 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
166 }
167
168 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
169 ((val) == 255 ? 0 : \
170 1350000 / ((val) * (div))))
171
172 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
173 : (val)) / 1000, 0, 0xff))
174 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
175
176 #define PWM_FROM_REG(val) (val)
177 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
178 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
179 (val) ^ 0x7fff : (val))
180 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
181 (~(val)) & 0x7fff : (val) & 0xffffff)
182
183 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
184 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
185
186 #define DIV_FROM_REG(val) (1 << (val))
187
188 static inline u8
189 DIV_TO_REG(long val, enum chips type)
190 {
191 int i;
192 val = SENSORS_LIMIT(val, 1,
193 ((type == w83781d
194 || type == as99127f) ? 8 : 128)) >> 1;
195 for (i = 0; i < 7; i++) {
196 if (val == 0)
197 break;
198 val >>= 1;
199 }
200 return ((u8) i);
201 }
202
203 /* There are some complications in a module like this. First off, W83781D chips
204 may be both present on the SMBus and the ISA bus, and we have to handle
205 those cases separately at some places. Second, there might be several
206 W83781D chips available (well, actually, that is probably never done; but
207 it is a clean illustration of how to handle a case like that). Finally,
208 a specific chip may be attached to *both* ISA and SMBus, and we would
209 not like to detect it double. Fortunately, in the case of the W83781D at
210 least, a register tells us what SMBus address we are on, so that helps
211 a bit - except if there could be more than one SMBus. Groan. No solution
212 for this yet. */
213
214 /* This module may seem overly long and complicated. In fact, it is not so
215 bad. Quite a lot of bookkeeping is done. A real driver can often cut
216 some corners. */
217
218 /* For each registered W83781D, we need to keep some data in memory. That
219 data is pointed to by w83781d_list[NR]->data. The structure itself is
220 dynamically allocated, at the same time when a new w83781d client is
221 allocated. */
222 struct w83781d_data {
223 struct i2c_client client;
224 struct class_device *class_dev;
225 struct semaphore lock;
226 enum chips type;
227
228 struct semaphore update_lock;
229 char valid; /* !=0 if following fields are valid */
230 unsigned long last_updated; /* In jiffies */
231
232 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
233 /* array of 2 pointers to subclients */
234
235 u8 in[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
237 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
238 u8 fan[3]; /* Register value */
239 u8 fan_min[3]; /* Register value */
240 u8 temp;
241 u8 temp_max; /* Register value */
242 u8 temp_max_hyst; /* Register value */
243 u16 temp_add[2]; /* Register value */
244 u16 temp_max_add[2]; /* Register value */
245 u16 temp_max_hyst_add[2]; /* Register value */
246 u8 fan_div[3]; /* Register encoding, shifted right */
247 u8 vid; /* Register encoding, combined */
248 u32 alarms; /* Register encoding, combined */
249 u32 beep_mask; /* Register encoding, combined */
250 u8 beep_enable; /* Boolean */
251 u8 pwm[4]; /* Register value */
252 u8 pwmenable[4]; /* Boolean */
253 u16 sens[3]; /* 782D/783S only.
254 1 = pentium diode; 2 = 3904 diode;
255 3000-5000 = thermistor beta.
256 Default = 3435.
257 Other Betas unimplemented */
258 u8 vrm;
259 };
260
261 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
262 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
263 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
264 static int w83781d_detach_client(struct i2c_client *client);
265
266 static int w83781d_read_value(struct i2c_client *client, u16 register);
267 static int w83781d_write_value(struct i2c_client *client, u16 register,
268 u16 value);
269 static struct w83781d_data *w83781d_update_device(struct device *dev);
270 static void w83781d_init_client(struct i2c_client *client);
271
272 static struct i2c_driver w83781d_driver = {
273 .owner = THIS_MODULE,
274 .name = "w83781d",
275 .id = I2C_DRIVERID_W83781D,
276 .flags = I2C_DF_NOTIFY,
277 .attach_adapter = w83781d_attach_adapter,
278 .detach_client = w83781d_detach_client,
279 };
280
281 static struct i2c_driver w83781d_isa_driver = {
282 .owner = THIS_MODULE,
283 .name = "w83781d-isa",
284 .attach_adapter = w83781d_isa_attach_adapter,
285 .detach_client = w83781d_detach_client,
286 };
287
288
289 /* following are the sysfs callback functions */
290 #define show_in_reg(reg) \
291 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
292 { \
293 struct w83781d_data *data = w83781d_update_device(dev); \
294 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
295 }
296 show_in_reg(in);
297 show_in_reg(in_min);
298 show_in_reg(in_max);
299
300 #define store_in_reg(REG, reg) \
301 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
302 { \
303 struct i2c_client *client = to_i2c_client(dev); \
304 struct w83781d_data *data = i2c_get_clientdata(client); \
305 u32 val; \
306 \
307 val = simple_strtoul(buf, NULL, 10) / 10; \
308 \
309 down(&data->update_lock); \
310 data->in_##reg[nr] = IN_TO_REG(val); \
311 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
312 \
313 up(&data->update_lock); \
314 return count; \
315 }
316 store_in_reg(MIN, min);
317 store_in_reg(MAX, max);
318
319 #define sysfs_in_offset(offset) \
320 static ssize_t \
321 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
322 { \
323 return show_in(dev, buf, offset); \
324 } \
325 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
326
327 #define sysfs_in_reg_offset(reg, offset) \
328 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
329 { \
330 return show_in_##reg (dev, buf, offset); \
331 } \
332 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
333 { \
334 return store_in_##reg (dev, buf, count, offset); \
335 } \
336 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
337
338 #define sysfs_in_offsets(offset) \
339 sysfs_in_offset(offset); \
340 sysfs_in_reg_offset(min, offset); \
341 sysfs_in_reg_offset(max, offset);
342
343 sysfs_in_offsets(0);
344 sysfs_in_offsets(1);
345 sysfs_in_offsets(2);
346 sysfs_in_offsets(3);
347 sysfs_in_offsets(4);
348 sysfs_in_offsets(5);
349 sysfs_in_offsets(6);
350 sysfs_in_offsets(7);
351 sysfs_in_offsets(8);
352
353 #define device_create_file_in(client, offset) \
354 do { \
355 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
356 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
357 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
358 } while (0)
359
360 #define show_fan_reg(reg) \
361 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
362 { \
363 struct w83781d_data *data = w83781d_update_device(dev); \
364 return sprintf(buf,"%ld\n", \
365 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
366 }
367 show_fan_reg(fan);
368 show_fan_reg(fan_min);
369
370 static ssize_t
371 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
372 {
373 struct i2c_client *client = to_i2c_client(dev);
374 struct w83781d_data *data = i2c_get_clientdata(client);
375 u32 val;
376
377 val = simple_strtoul(buf, NULL, 10);
378
379 down(&data->update_lock);
380 data->fan_min[nr - 1] =
381 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
382 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
383 data->fan_min[nr - 1]);
384
385 up(&data->update_lock);
386 return count;
387 }
388
389 #define sysfs_fan_offset(offset) \
390 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
391 { \
392 return show_fan(dev, buf, offset); \
393 } \
394 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
395
396 #define sysfs_fan_min_offset(offset) \
397 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
398 { \
399 return show_fan_min(dev, buf, offset); \
400 } \
401 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
402 { \
403 return store_fan_min(dev, buf, count, offset); \
404 } \
405 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
406
407 sysfs_fan_offset(1);
408 sysfs_fan_min_offset(1);
409 sysfs_fan_offset(2);
410 sysfs_fan_min_offset(2);
411 sysfs_fan_offset(3);
412 sysfs_fan_min_offset(3);
413
414 #define device_create_file_fan(client, offset) \
415 do { \
416 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
417 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
418 } while (0)
419
420 #define show_temp_reg(reg) \
421 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
422 { \
423 struct w83781d_data *data = w83781d_update_device(dev); \
424 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
425 return sprintf(buf,"%d\n", \
426 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
427 } else { /* TEMP1 */ \
428 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
429 } \
430 }
431 show_temp_reg(temp);
432 show_temp_reg(temp_max);
433 show_temp_reg(temp_max_hyst);
434
435 #define store_temp_reg(REG, reg) \
436 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
437 { \
438 struct i2c_client *client = to_i2c_client(dev); \
439 struct w83781d_data *data = i2c_get_clientdata(client); \
440 s32 val; \
441 \
442 val = simple_strtol(buf, NULL, 10); \
443 \
444 down(&data->update_lock); \
445 \
446 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
447 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
448 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
449 data->temp_##reg##_add[nr-2]); \
450 } else { /* TEMP1 */ \
451 data->temp_##reg = TEMP_TO_REG(val); \
452 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
453 data->temp_##reg); \
454 } \
455 \
456 up(&data->update_lock); \
457 return count; \
458 }
459 store_temp_reg(OVER, max);
460 store_temp_reg(HYST, max_hyst);
461
462 #define sysfs_temp_offset(offset) \
463 static ssize_t \
464 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
465 { \
466 return show_temp(dev, buf, offset); \
467 } \
468 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
469
470 #define sysfs_temp_reg_offset(reg, offset) \
471 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
472 { \
473 return show_temp_##reg (dev, buf, offset); \
474 } \
475 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
476 { \
477 return store_temp_##reg (dev, buf, count, offset); \
478 } \
479 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
480
481 #define sysfs_temp_offsets(offset) \
482 sysfs_temp_offset(offset); \
483 sysfs_temp_reg_offset(max, offset); \
484 sysfs_temp_reg_offset(max_hyst, offset);
485
486 sysfs_temp_offsets(1);
487 sysfs_temp_offsets(2);
488 sysfs_temp_offsets(3);
489
490 #define device_create_file_temp(client, offset) \
491 do { \
492 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
493 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
494 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
495 } while (0)
496
497 static ssize_t
498 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
499 {
500 struct w83781d_data *data = w83781d_update_device(dev);
501 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
502 }
503
504 static
505 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
506 #define device_create_file_vid(client) \
507 device_create_file(&client->dev, &dev_attr_cpu0_vid);
508 static ssize_t
509 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
510 {
511 struct w83781d_data *data = w83781d_update_device(dev);
512 return sprintf(buf, "%ld\n", (long) data->vrm);
513 }
514
515 static ssize_t
516 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
517 {
518 struct i2c_client *client = to_i2c_client(dev);
519 struct w83781d_data *data = i2c_get_clientdata(client);
520 u32 val;
521
522 val = simple_strtoul(buf, NULL, 10);
523 data->vrm = val;
524
525 return count;
526 }
527
528 static
529 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
530 #define device_create_file_vrm(client) \
531 device_create_file(&client->dev, &dev_attr_vrm);
532 static ssize_t
533 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
534 {
535 struct w83781d_data *data = w83781d_update_device(dev);
536 return sprintf(buf, "%u\n", data->alarms);
537 }
538
539 static
540 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
541 #define device_create_file_alarms(client) \
542 device_create_file(&client->dev, &dev_attr_alarms);
543 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
544 {
545 struct w83781d_data *data = w83781d_update_device(dev);
546 return sprintf(buf, "%ld\n",
547 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
548 }
549 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
550 {
551 struct w83781d_data *data = w83781d_update_device(dev);
552 return sprintf(buf, "%ld\n",
553 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
554 }
555
556 #define BEEP_ENABLE 0 /* Store beep_enable */
557 #define BEEP_MASK 1 /* Store beep_mask */
558
559 static ssize_t
560 store_beep_reg(struct device *dev, const char *buf, size_t count,
561 int update_mask)
562 {
563 struct i2c_client *client = to_i2c_client(dev);
564 struct w83781d_data *data = i2c_get_clientdata(client);
565 u32 val, val2;
566
567 val = simple_strtoul(buf, NULL, 10);
568
569 down(&data->update_lock);
570
571 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
572 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
573 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
574 data->beep_mask & 0xff);
575
576 if ((data->type != w83781d) && (data->type != as99127f)) {
577 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
578 ((data->beep_mask) >> 16) & 0xff);
579 }
580
581 val2 = (data->beep_mask >> 8) & 0x7f;
582 } else { /* We are storing beep_enable */
583 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
584 data->beep_enable = BEEP_ENABLE_TO_REG(val);
585 }
586
587 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
588 val2 | data->beep_enable << 7);
589
590 up(&data->update_lock);
591 return count;
592 }
593
594 #define sysfs_beep(REG, reg) \
595 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
596 { \
597 return show_beep_##reg(dev, attr, buf); \
598 } \
599 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
600 { \
601 return store_beep_reg(dev, buf, count, BEEP_##REG); \
602 } \
603 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
604
605 sysfs_beep(ENABLE, enable);
606 sysfs_beep(MASK, mask);
607
608 #define device_create_file_beep(client) \
609 do { \
610 device_create_file(&client->dev, &dev_attr_beep_enable); \
611 device_create_file(&client->dev, &dev_attr_beep_mask); \
612 } while (0)
613
614 static ssize_t
615 show_fan_div_reg(struct device *dev, char *buf, int nr)
616 {
617 struct w83781d_data *data = w83781d_update_device(dev);
618 return sprintf(buf, "%ld\n",
619 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
620 }
621
622 /* Note: we save and restore the fan minimum here, because its value is
623 determined in part by the fan divisor. This follows the principle of
624 least suprise; the user doesn't expect the fan minimum to change just
625 because the divisor changed. */
626 static ssize_t
627 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
628 {
629 struct i2c_client *client = to_i2c_client(dev);
630 struct w83781d_data *data = i2c_get_clientdata(client);
631 unsigned long min;
632 u8 reg;
633 unsigned long val = simple_strtoul(buf, NULL, 10);
634
635 down(&data->update_lock);
636
637 /* Save fan_min */
638 min = FAN_FROM_REG(data->fan_min[nr],
639 DIV_FROM_REG(data->fan_div[nr]));
640
641 data->fan_div[nr] = DIV_TO_REG(val, data->type);
642
643 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
644 & (nr==0 ? 0xcf : 0x3f))
645 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
646 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
647
648 /* w83781d and as99127f don't have extended divisor bits */
649 if (data->type != w83781d && data->type != as99127f) {
650 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
651 & ~(1 << (5 + nr)))
652 | ((data->fan_div[nr] & 0x04) << (3 + nr));
653 w83781d_write_value(client, W83781D_REG_VBAT, reg);
654 }
655
656 /* Restore fan_min */
657 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
658 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
659
660 up(&data->update_lock);
661 return count;
662 }
663
664 #define sysfs_fan_div(offset) \
665 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
666 { \
667 return show_fan_div_reg(dev, buf, offset); \
668 } \
669 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
670 { \
671 return store_fan_div_reg(dev, buf, count, offset - 1); \
672 } \
673 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
674
675 sysfs_fan_div(1);
676 sysfs_fan_div(2);
677 sysfs_fan_div(3);
678
679 #define device_create_file_fan_div(client, offset) \
680 do { \
681 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
682 } while (0)
683
684 static ssize_t
685 show_pwm_reg(struct device *dev, char *buf, int nr)
686 {
687 struct w83781d_data *data = w83781d_update_device(dev);
688 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
689 }
690
691 static ssize_t
692 show_pwmenable_reg(struct device *dev, char *buf, int nr)
693 {
694 struct w83781d_data *data = w83781d_update_device(dev);
695 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
696 }
697
698 static ssize_t
699 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
700 {
701 struct i2c_client *client = to_i2c_client(dev);
702 struct w83781d_data *data = i2c_get_clientdata(client);
703 u32 val;
704
705 val = simple_strtoul(buf, NULL, 10);
706
707 down(&data->update_lock);
708 data->pwm[nr - 1] = PWM_TO_REG(val);
709 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
710 up(&data->update_lock);
711 return count;
712 }
713
714 static ssize_t
715 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
716 {
717 struct i2c_client *client = to_i2c_client(dev);
718 struct w83781d_data *data = i2c_get_clientdata(client);
719 u32 val, reg;
720
721 val = simple_strtoul(buf, NULL, 10);
722
723 down(&data->update_lock);
724
725 switch (val) {
726 case 0:
727 case 1:
728 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
729 w83781d_write_value(client, W83781D_REG_PWMCLK12,
730 (reg & 0xf7) | (val << 3));
731
732 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
733 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
734 (reg & 0xef) | (!val << 4));
735
736 data->pwmenable[nr - 1] = val;
737 break;
738
739 default:
740 up(&data->update_lock);
741 return -EINVAL;
742 }
743
744 up(&data->update_lock);
745 return count;
746 }
747
748 #define sysfs_pwm(offset) \
749 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
750 { \
751 return show_pwm_reg(dev, buf, offset); \
752 } \
753 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
754 const char *buf, size_t count) \
755 { \
756 return store_pwm_reg(dev, buf, count, offset); \
757 } \
758 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
759 show_regs_pwm_##offset, store_regs_pwm_##offset);
760
761 #define sysfs_pwmenable(offset) \
762 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
763 { \
764 return show_pwmenable_reg(dev, buf, offset); \
765 } \
766 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
767 const char *buf, size_t count) \
768 { \
769 return store_pwmenable_reg(dev, buf, count, offset); \
770 } \
771 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
772 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
773
774 sysfs_pwm(1);
775 sysfs_pwm(2);
776 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
777 sysfs_pwm(3);
778 sysfs_pwm(4);
779
780 #define device_create_file_pwm(client, offset) \
781 do { \
782 device_create_file(&client->dev, &dev_attr_pwm##offset); \
783 } while (0)
784
785 #define device_create_file_pwmenable(client, offset) \
786 do { \
787 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
788 } while (0)
789
790 static ssize_t
791 show_sensor_reg(struct device *dev, char *buf, int nr)
792 {
793 struct w83781d_data *data = w83781d_update_device(dev);
794 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
795 }
796
797 static ssize_t
798 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
799 {
800 struct i2c_client *client = to_i2c_client(dev);
801 struct w83781d_data *data = i2c_get_clientdata(client);
802 u32 val, tmp;
803
804 val = simple_strtoul(buf, NULL, 10);
805
806 down(&data->update_lock);
807
808 switch (val) {
809 case 1: /* PII/Celeron diode */
810 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
811 w83781d_write_value(client, W83781D_REG_SCFG1,
812 tmp | BIT_SCFG1[nr - 1]);
813 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
814 w83781d_write_value(client, W83781D_REG_SCFG2,
815 tmp | BIT_SCFG2[nr - 1]);
816 data->sens[nr - 1] = val;
817 break;
818 case 2: /* 3904 */
819 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
820 w83781d_write_value(client, W83781D_REG_SCFG1,
821 tmp | BIT_SCFG1[nr - 1]);
822 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
823 w83781d_write_value(client, W83781D_REG_SCFG2,
824 tmp & ~BIT_SCFG2[nr - 1]);
825 data->sens[nr - 1] = val;
826 break;
827 case W83781D_DEFAULT_BETA: /* thermistor */
828 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
829 w83781d_write_value(client, W83781D_REG_SCFG1,
830 tmp & ~BIT_SCFG1[nr - 1]);
831 data->sens[nr - 1] = val;
832 break;
833 default:
834 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
835 (long) val, W83781D_DEFAULT_BETA);
836 break;
837 }
838
839 up(&data->update_lock);
840 return count;
841 }
842
843 #define sysfs_sensor(offset) \
844 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
845 { \
846 return show_sensor_reg(dev, buf, offset); \
847 } \
848 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
849 { \
850 return store_sensor_reg(dev, buf, count, offset); \
851 } \
852 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
853
854 sysfs_sensor(1);
855 sysfs_sensor(2);
856 sysfs_sensor(3);
857
858 #define device_create_file_sensor(client, offset) \
859 do { \
860 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
861 } while (0)
862
863 /* This function is called when:
864 * w83781d_driver is inserted (when this module is loaded), for each
865 available adapter
866 * when a new adapter is inserted (and w83781d_driver is still present) */
867 static int
868 w83781d_attach_adapter(struct i2c_adapter *adapter)
869 {
870 if (!(adapter->class & I2C_CLASS_HWMON))
871 return 0;
872 return i2c_detect(adapter, &addr_data, w83781d_detect);
873 }
874
875 static int
876 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
877 {
878 return w83781d_detect(adapter, isa_address, -1);
879 }
880
881 /* Assumes that adapter is of I2C, not ISA variety.
882 * OTHERWISE DON'T CALL THIS
883 */
884 static int
885 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
886 struct i2c_client *new_client)
887 {
888 int i, val1 = 0, id;
889 int err;
890 const char *client_name = "";
891 struct w83781d_data *data = i2c_get_clientdata(new_client);
892
893 data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
894 if (!(data->lm75[0])) {
895 err = -ENOMEM;
896 goto ERROR_SC_0;
897 }
898 memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
899
900 id = i2c_adapter_id(adapter);
901
902 if (force_subclients[0] == id && force_subclients[1] == address) {
903 for (i = 2; i <= 3; i++) {
904 if (force_subclients[i] < 0x48 ||
905 force_subclients[i] > 0x4f) {
906 dev_err(&new_client->dev, "Invalid subclient "
907 "address %d; must be 0x48-0x4f\n",
908 force_subclients[i]);
909 err = -EINVAL;
910 goto ERROR_SC_1;
911 }
912 }
913 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
914 (force_subclients[2] & 0x07) |
915 ((force_subclients[3] & 0x07) << 4));
916 data->lm75[0]->addr = force_subclients[2];
917 } else {
918 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
919 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
920 }
921
922 if (kind != w83783s) {
923
924 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
925 if (!(data->lm75[1])) {
926 err = -ENOMEM;
927 goto ERROR_SC_1;
928 }
929 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
930
931 if (force_subclients[0] == id &&
932 force_subclients[1] == address) {
933 data->lm75[1]->addr = force_subclients[3];
934 } else {
935 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
936 }
937 if (data->lm75[0]->addr == data->lm75[1]->addr) {
938 dev_err(&new_client->dev,
939 "Duplicate addresses 0x%x for subclients.\n",
940 data->lm75[0]->addr);
941 err = -EBUSY;
942 goto ERROR_SC_2;
943 }
944 }
945
946 if (kind == w83781d)
947 client_name = "w83781d subclient";
948 else if (kind == w83782d)
949 client_name = "w83782d subclient";
950 else if (kind == w83783s)
951 client_name = "w83783s subclient";
952 else if (kind == w83627hf)
953 client_name = "w83627hf subclient";
954 else if (kind == as99127f)
955 client_name = "as99127f subclient";
956
957 for (i = 0; i <= 1; i++) {
958 /* store all data in w83781d */
959 i2c_set_clientdata(data->lm75[i], NULL);
960 data->lm75[i]->adapter = adapter;
961 data->lm75[i]->driver = &w83781d_driver;
962 data->lm75[i]->flags = 0;
963 strlcpy(data->lm75[i]->name, client_name,
964 I2C_NAME_SIZE);
965 if ((err = i2c_attach_client(data->lm75[i]))) {
966 dev_err(&new_client->dev, "Subclient %d "
967 "registration at address 0x%x "
968 "failed.\n", i, data->lm75[i]->addr);
969 if (i == 1)
970 goto ERROR_SC_3;
971 goto ERROR_SC_2;
972 }
973 if (kind == w83783s)
974 break;
975 }
976
977 return 0;
978
979 /* Undo inits in case of errors */
980 ERROR_SC_3:
981 i2c_detach_client(data->lm75[0]);
982 ERROR_SC_2:
983 if (data->lm75[1])
984 kfree(data->lm75[1]);
985 ERROR_SC_1:
986 if (data->lm75[0])
987 kfree(data->lm75[0]);
988 ERROR_SC_0:
989 return err;
990 }
991
992 static int
993 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
994 {
995 int i = 0, val1 = 0, val2;
996 struct i2c_client *new_client;
997 struct w83781d_data *data;
998 int err;
999 const char *client_name = "";
1000 int is_isa = i2c_is_isa_adapter(adapter);
1001 enum vendor { winbond, asus } vendid;
1002
1003 if (!is_isa
1004 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1005 err = -EINVAL;
1006 goto ERROR0;
1007 }
1008
1009 /* Prevent users from forcing a kind for a bus it isn't supposed
1010 to possibly be on */
1011 if (is_isa && (kind == as99127f || kind == w83783s)) {
1012 dev_err(&adapter->dev,
1013 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1014 address);
1015 err = -EINVAL;
1016 goto ERROR0;
1017 }
1018
1019 if (is_isa)
1020 if (!request_region(address, W83781D_EXTENT,
1021 w83781d_isa_driver.name)) {
1022 dev_dbg(&adapter->dev, "Request of region "
1023 "0x%x-0x%x for w83781d failed\n", address,
1024 address + W83781D_EXTENT - 1);
1025 err = -EBUSY;
1026 goto ERROR0;
1027 }
1028
1029 /* Probe whether there is anything available on this address. Already
1030 done for SMBus clients */
1031 if (kind < 0) {
1032 if (is_isa) {
1033
1034 #define REALLY_SLOW_IO
1035 /* We need the timeouts for at least some LM78-like
1036 chips. But only if we read 'undefined' registers. */
1037 i = inb_p(address + 1);
1038 if (inb_p(address + 2) != i
1039 || inb_p(address + 3) != i
1040 || inb_p(address + 7) != i) {
1041 dev_dbg(&adapter->dev, "Detection of w83781d "
1042 "chip failed at step 1\n");
1043 err = -ENODEV;
1044 goto ERROR1;
1045 }
1046 #undef REALLY_SLOW_IO
1047
1048 /* Let's just hope nothing breaks here */
1049 i = inb_p(address + 5) & 0x7f;
1050 outb_p(~i & 0x7f, address + 5);
1051 val2 = inb_p(address + 5) & 0x7f;
1052 if (val2 != (~i & 0x7f)) {
1053 outb_p(i, address + 5);
1054 dev_dbg(&adapter->dev, "Detection of w83781d "
1055 "chip failed at step 2 (0x%x != "
1056 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1057 address + 5);
1058 err = -ENODEV;
1059 goto ERROR1;
1060 }
1061 }
1062 }
1063
1064 /* OK. For now, we presume we have a valid client. We now create the
1065 client structure, even though we cannot fill it completely yet.
1066 But it allows us to access w83781d_{read,write}_value. */
1067
1068 if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1069 err = -ENOMEM;
1070 goto ERROR1;
1071 }
1072 memset(data, 0, sizeof(struct w83781d_data));
1073
1074 new_client = &data->client;
1075 i2c_set_clientdata(new_client, data);
1076 new_client->addr = address;
1077 init_MUTEX(&data->lock);
1078 new_client->adapter = adapter;
1079 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1080 new_client->flags = 0;
1081
1082 /* Now, we do the remaining detection. */
1083
1084 /* The w8378?d may be stuck in some other bank than bank 0. This may
1085 make reading other information impossible. Specify a force=... or
1086 force_*=... parameter, and the Winbond will be reset to the right
1087 bank. */
1088 if (kind < 0) {
1089 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1090 dev_dbg(&new_client->dev, "Detection failed at step "
1091 "3\n");
1092 err = -ENODEV;
1093 goto ERROR2;
1094 }
1095 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1096 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1097 /* Check for Winbond or Asus ID if in bank 0 */
1098 if ((!(val1 & 0x07)) &&
1099 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1100 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1101 dev_dbg(&new_client->dev, "Detection failed at step "
1102 "4\n");
1103 err = -ENODEV;
1104 goto ERROR2;
1105 }
1106 /* If Winbond SMBus, check address at 0x48.
1107 Asus doesn't support, except for as99127f rev.2 */
1108 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1109 ((val1 & 0x80) && (val2 == 0x5c)))) {
1110 if (w83781d_read_value
1111 (new_client, W83781D_REG_I2C_ADDR) != address) {
1112 dev_dbg(&new_client->dev, "Detection failed "
1113 "at step 5\n");
1114 err = -ENODEV;
1115 goto ERROR2;
1116 }
1117 }
1118 }
1119
1120 /* We have either had a force parameter, or we have already detected the
1121 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1122 w83781d_write_value(new_client, W83781D_REG_BANK,
1123 (w83781d_read_value(new_client,
1124 W83781D_REG_BANK) & 0x78) |
1125 0x80);
1126
1127 /* Determine the chip type. */
1128 if (kind <= 0) {
1129 /* get vendor ID */
1130 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1131 if (val2 == 0x5c)
1132 vendid = winbond;
1133 else if (val2 == 0x12)
1134 vendid = asus;
1135 else {
1136 dev_dbg(&new_client->dev, "Chip was made by neither "
1137 "Winbond nor Asus?\n");
1138 err = -ENODEV;
1139 goto ERROR2;
1140 }
1141
1142 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1143 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1144 kind = w83781d;
1145 else if (val1 == 0x30 && vendid == winbond)
1146 kind = w83782d;
1147 else if (val1 == 0x40 && vendid == winbond && !is_isa
1148 && address == 0x2d)
1149 kind = w83783s;
1150 else if (val1 == 0x21 && vendid == winbond)
1151 kind = w83627hf;
1152 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1153 kind = as99127f;
1154 else {
1155 if (kind == 0)
1156 dev_warn(&new_client->dev, "Ignoring 'force' "
1157 "parameter for unknown chip at "
1158 "adapter %d, address 0x%02x\n",
1159 i2c_adapter_id(adapter), address);
1160 err = -EINVAL;
1161 goto ERROR2;
1162 }
1163 }
1164
1165 if (kind == w83781d) {
1166 client_name = "w83781d";
1167 } else if (kind == w83782d) {
1168 client_name = "w83782d";
1169 } else if (kind == w83783s) {
1170 client_name = "w83783s";
1171 } else if (kind == w83627hf) {
1172 client_name = "w83627hf";
1173 } else if (kind == as99127f) {
1174 client_name = "as99127f";
1175 }
1176
1177 /* Fill in the remaining client fields and put into the global list */
1178 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1179 data->type = kind;
1180
1181 data->valid = 0;
1182 init_MUTEX(&data->update_lock);
1183
1184 /* Tell the I2C layer a new client has arrived */
1185 if ((err = i2c_attach_client(new_client)))
1186 goto ERROR2;
1187
1188 /* attach secondary i2c lm75-like clients */
1189 if (!is_isa) {
1190 if ((err = w83781d_detect_subclients(adapter, address,
1191 kind, new_client)))
1192 goto ERROR3;
1193 } else {
1194 data->lm75[0] = NULL;
1195 data->lm75[1] = NULL;
1196 }
1197
1198 /* Initialize the chip */
1199 w83781d_init_client(new_client);
1200
1201 /* A few vars need to be filled upon startup */
1202 for (i = 1; i <= 3; i++) {
1203 data->fan_min[i - 1] = w83781d_read_value(new_client,
1204 W83781D_REG_FAN_MIN(i));
1205 }
1206 if (kind != w83781d && kind != as99127f)
1207 for (i = 0; i < 4; i++)
1208 data->pwmenable[i] = 1;
1209
1210 /* Register sysfs hooks */
1211 data->class_dev = hwmon_device_register(&new_client->dev);
1212 if (IS_ERR(data->class_dev)) {
1213 err = PTR_ERR(data->class_dev);
1214 goto ERROR4;
1215 }
1216
1217 device_create_file_in(new_client, 0);
1218 if (kind != w83783s)
1219 device_create_file_in(new_client, 1);
1220 device_create_file_in(new_client, 2);
1221 device_create_file_in(new_client, 3);
1222 device_create_file_in(new_client, 4);
1223 device_create_file_in(new_client, 5);
1224 device_create_file_in(new_client, 6);
1225 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1226 device_create_file_in(new_client, 7);
1227 device_create_file_in(new_client, 8);
1228 }
1229
1230 device_create_file_fan(new_client, 1);
1231 device_create_file_fan(new_client, 2);
1232 device_create_file_fan(new_client, 3);
1233
1234 device_create_file_temp(new_client, 1);
1235 device_create_file_temp(new_client, 2);
1236 if (kind != w83783s)
1237 device_create_file_temp(new_client, 3);
1238
1239 device_create_file_vid(new_client);
1240 device_create_file_vrm(new_client);
1241
1242 device_create_file_fan_div(new_client, 1);
1243 device_create_file_fan_div(new_client, 2);
1244 device_create_file_fan_div(new_client, 3);
1245
1246 device_create_file_alarms(new_client);
1247
1248 device_create_file_beep(new_client);
1249
1250 if (kind != w83781d && kind != as99127f) {
1251 device_create_file_pwm(new_client, 1);
1252 device_create_file_pwm(new_client, 2);
1253 device_create_file_pwmenable(new_client, 2);
1254 }
1255 if (kind == w83782d && !is_isa) {
1256 device_create_file_pwm(new_client, 3);
1257 device_create_file_pwm(new_client, 4);
1258 }
1259
1260 if (kind != as99127f && kind != w83781d) {
1261 device_create_file_sensor(new_client, 1);
1262 device_create_file_sensor(new_client, 2);
1263 if (kind != w83783s)
1264 device_create_file_sensor(new_client, 3);
1265 }
1266
1267 return 0;
1268
1269 ERROR4:
1270 if (data->lm75[1]) {
1271 i2c_detach_client(data->lm75[1]);
1272 kfree(data->lm75[1]);
1273 }
1274 if (data->lm75[0]) {
1275 i2c_detach_client(data->lm75[0]);
1276 kfree(data->lm75[0]);
1277 }
1278 ERROR3:
1279 i2c_detach_client(new_client);
1280 ERROR2:
1281 kfree(data);
1282 ERROR1:
1283 if (is_isa)
1284 release_region(address, W83781D_EXTENT);
1285 ERROR0:
1286 return err;
1287 }
1288
1289 static int
1290 w83781d_detach_client(struct i2c_client *client)
1291 {
1292 struct w83781d_data *data = i2c_get_clientdata(client);
1293 int err;
1294
1295 /* main client */
1296 if (data)
1297 hwmon_device_unregister(data->class_dev);
1298
1299 if (i2c_is_isa_client(client))
1300 release_region(client->addr, W83781D_EXTENT);
1301
1302 if ((err = i2c_detach_client(client)))
1303 return err;
1304
1305 /* main client */
1306 if (data)
1307 kfree(data);
1308
1309 /* subclient */
1310 else
1311 kfree(client);
1312
1313 return 0;
1314 }
1315
1316 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1317 bank switches. ISA access must always be locked explicitly!
1318 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1319 would slow down the W83781D access and should not be necessary.
1320 There are some ugly typecasts here, but the good news is - they should
1321 nowhere else be necessary! */
1322 static int
1323 w83781d_read_value(struct i2c_client *client, u16 reg)
1324 {
1325 struct w83781d_data *data = i2c_get_clientdata(client);
1326 int res, word_sized, bank;
1327 struct i2c_client *cl;
1328
1329 down(&data->lock);
1330 if (i2c_is_isa_client(client)) {
1331 word_sized = (((reg & 0xff00) == 0x100)
1332 || ((reg & 0xff00) == 0x200))
1333 && (((reg & 0x00ff) == 0x50)
1334 || ((reg & 0x00ff) == 0x53)
1335 || ((reg & 0x00ff) == 0x55));
1336 if (reg & 0xff00) {
1337 outb_p(W83781D_REG_BANK,
1338 client->addr + W83781D_ADDR_REG_OFFSET);
1339 outb_p(reg >> 8,
1340 client->addr + W83781D_DATA_REG_OFFSET);
1341 }
1342 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1343 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1344 if (word_sized) {
1345 outb_p((reg & 0xff) + 1,
1346 client->addr + W83781D_ADDR_REG_OFFSET);
1347 res =
1348 (res << 8) + inb_p(client->addr +
1349 W83781D_DATA_REG_OFFSET);
1350 }
1351 if (reg & 0xff00) {
1352 outb_p(W83781D_REG_BANK,
1353 client->addr + W83781D_ADDR_REG_OFFSET);
1354 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1355 }
1356 } else {
1357 bank = (reg >> 8) & 0x0f;
1358 if (bank > 2)
1359 /* switch banks */
1360 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1361 bank);
1362 if (bank == 0 || bank > 2) {
1363 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1364 } else {
1365 /* switch to subclient */
1366 cl = data->lm75[bank - 1];
1367 /* convert from ISA to LM75 I2C addresses */
1368 switch (reg & 0xff) {
1369 case 0x50: /* TEMP */
1370 res = swab16(i2c_smbus_read_word_data(cl, 0));
1371 break;
1372 case 0x52: /* CONFIG */
1373 res = i2c_smbus_read_byte_data(cl, 1);
1374 break;
1375 case 0x53: /* HYST */
1376 res = swab16(i2c_smbus_read_word_data(cl, 2));
1377 break;
1378 case 0x55: /* OVER */
1379 default:
1380 res = swab16(i2c_smbus_read_word_data(cl, 3));
1381 break;
1382 }
1383 }
1384 if (bank > 2)
1385 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1386 }
1387 up(&data->lock);
1388 return res;
1389 }
1390
1391 static int
1392 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1393 {
1394 struct w83781d_data *data = i2c_get_clientdata(client);
1395 int word_sized, bank;
1396 struct i2c_client *cl;
1397
1398 down(&data->lock);
1399 if (i2c_is_isa_client(client)) {
1400 word_sized = (((reg & 0xff00) == 0x100)
1401 || ((reg & 0xff00) == 0x200))
1402 && (((reg & 0x00ff) == 0x53)
1403 || ((reg & 0x00ff) == 0x55));
1404 if (reg & 0xff00) {
1405 outb_p(W83781D_REG_BANK,
1406 client->addr + W83781D_ADDR_REG_OFFSET);
1407 outb_p(reg >> 8,
1408 client->addr + W83781D_DATA_REG_OFFSET);
1409 }
1410 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1411 if (word_sized) {
1412 outb_p(value >> 8,
1413 client->addr + W83781D_DATA_REG_OFFSET);
1414 outb_p((reg & 0xff) + 1,
1415 client->addr + W83781D_ADDR_REG_OFFSET);
1416 }
1417 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1418 if (reg & 0xff00) {
1419 outb_p(W83781D_REG_BANK,
1420 client->addr + W83781D_ADDR_REG_OFFSET);
1421 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1422 }
1423 } else {
1424 bank = (reg >> 8) & 0x0f;
1425 if (bank > 2)
1426 /* switch banks */
1427 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1428 bank);
1429 if (bank == 0 || bank > 2) {
1430 i2c_smbus_write_byte_data(client, reg & 0xff,
1431 value & 0xff);
1432 } else {
1433 /* switch to subclient */
1434 cl = data->lm75[bank - 1];
1435 /* convert from ISA to LM75 I2C addresses */
1436 switch (reg & 0xff) {
1437 case 0x52: /* CONFIG */
1438 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1439 break;
1440 case 0x53: /* HYST */
1441 i2c_smbus_write_word_data(cl, 2, swab16(value));
1442 break;
1443 case 0x55: /* OVER */
1444 i2c_smbus_write_word_data(cl, 3, swab16(value));
1445 break;
1446 }
1447 }
1448 if (bank > 2)
1449 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1450 }
1451 up(&data->lock);
1452 return 0;
1453 }
1454
1455 /* Called when we have found a new W83781D. It should set limits, etc. */
1456 static void
1457 w83781d_init_client(struct i2c_client *client)
1458 {
1459 struct w83781d_data *data = i2c_get_clientdata(client);
1460 int i, p;
1461 int type = data->type;
1462 u8 tmp;
1463
1464 if (init && type != as99127f) { /* this resets registers we don't have
1465 documentation for on the as99127f */
1466 /* save these registers */
1467 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1468 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1469 /* Reset all except Watchdog values and last conversion values
1470 This sets fan-divs to 2, among others */
1471 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1472 /* Restore the registers and disable power-on abnormal beep.
1473 This saves FAN 1/2/3 input/output values set by BIOS. */
1474 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1475 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1476 /* Disable master beep-enable (reset turns it on).
1477 Individual beep_mask should be reset to off but for some reason
1478 disabling this bit helps some people not get beeped */
1479 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1480 }
1481
1482 data->vrm = i2c_which_vrm();
1483
1484 if ((type != w83781d) && (type != as99127f)) {
1485 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1486 for (i = 1; i <= 3; i++) {
1487 if (!(tmp & BIT_SCFG1[i - 1])) {
1488 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1489 } else {
1490 if (w83781d_read_value
1491 (client,
1492 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1493 data->sens[i - 1] = 1;
1494 else
1495 data->sens[i - 1] = 2;
1496 }
1497 if (type == w83783s && i == 2)
1498 break;
1499 }
1500 }
1501
1502 if (init && type != as99127f) {
1503 /* Enable temp2 */
1504 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1505 if (tmp & 0x01) {
1506 dev_warn(&client->dev, "Enabling temp2, readings "
1507 "might not make sense\n");
1508 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1509 tmp & 0xfe);
1510 }
1511
1512 /* Enable temp3 */
1513 if (type != w83783s) {
1514 tmp = w83781d_read_value(client,
1515 W83781D_REG_TEMP3_CONFIG);
1516 if (tmp & 0x01) {
1517 dev_warn(&client->dev, "Enabling temp3, "
1518 "readings might not make sense\n");
1519 w83781d_write_value(client,
1520 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1521 }
1522 }
1523
1524 if (type != w83781d) {
1525 /* enable comparator mode for temp2 and temp3 so
1526 alarm indication will work correctly */
1527 i = w83781d_read_value(client, W83781D_REG_IRQ);
1528 if (!(i & 0x40))
1529 w83781d_write_value(client, W83781D_REG_IRQ,
1530 i | 0x40);
1531 }
1532 }
1533
1534 /* Start monitoring */
1535 w83781d_write_value(client, W83781D_REG_CONFIG,
1536 (w83781d_read_value(client,
1537 W83781D_REG_CONFIG) & 0xf7)
1538 | 0x01);
1539 }
1540
1541 static struct w83781d_data *w83781d_update_device(struct device *dev)
1542 {
1543 struct i2c_client *client = to_i2c_client(dev);
1544 struct w83781d_data *data = i2c_get_clientdata(client);
1545 int i;
1546
1547 down(&data->update_lock);
1548
1549 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1550 || !data->valid) {
1551 dev_dbg(dev, "Starting device update\n");
1552
1553 for (i = 0; i <= 8; i++) {
1554 if (data->type == w83783s && i == 1)
1555 continue; /* 783S has no in1 */
1556 data->in[i] =
1557 w83781d_read_value(client, W83781D_REG_IN(i));
1558 data->in_min[i] =
1559 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1560 data->in_max[i] =
1561 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1562 if ((data->type != w83782d)
1563 && (data->type != w83627hf) && (i == 6))
1564 break;
1565 }
1566 for (i = 1; i <= 3; i++) {
1567 data->fan[i - 1] =
1568 w83781d_read_value(client, W83781D_REG_FAN(i));
1569 data->fan_min[i - 1] =
1570 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1571 }
1572 if (data->type != w83781d && data->type != as99127f) {
1573 for (i = 1; i <= 4; i++) {
1574 data->pwm[i - 1] =
1575 w83781d_read_value(client,
1576 W83781D_REG_PWM(i));
1577 if ((data->type != w83782d
1578 || i2c_is_isa_client(client))
1579 && i == 2)
1580 break;
1581 }
1582 /* Only PWM2 can be disabled */
1583 data->pwmenable[1] = (w83781d_read_value(client,
1584 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1585 }
1586
1587 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1588 data->temp_max =
1589 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1590 data->temp_max_hyst =
1591 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1592 data->temp_add[0] =
1593 w83781d_read_value(client, W83781D_REG_TEMP(2));
1594 data->temp_max_add[0] =
1595 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1596 data->temp_max_hyst_add[0] =
1597 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1598 if (data->type != w83783s) {
1599 data->temp_add[1] =
1600 w83781d_read_value(client, W83781D_REG_TEMP(3));
1601 data->temp_max_add[1] =
1602 w83781d_read_value(client,
1603 W83781D_REG_TEMP_OVER(3));
1604 data->temp_max_hyst_add[1] =
1605 w83781d_read_value(client,
1606 W83781D_REG_TEMP_HYST(3));
1607 }
1608 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1609 data->vid = i & 0x0f;
1610 data->vid |= (w83781d_read_value(client,
1611 W83781D_REG_CHIPID) & 0x01) << 4;
1612 data->fan_div[0] = (i >> 4) & 0x03;
1613 data->fan_div[1] = (i >> 6) & 0x03;
1614 data->fan_div[2] = (w83781d_read_value(client,
1615 W83781D_REG_PIN) >> 6) & 0x03;
1616 if ((data->type != w83781d) && (data->type != as99127f)) {
1617 i = w83781d_read_value(client, W83781D_REG_VBAT);
1618 data->fan_div[0] |= (i >> 3) & 0x04;
1619 data->fan_div[1] |= (i >> 4) & 0x04;
1620 data->fan_div[2] |= (i >> 5) & 0x04;
1621 }
1622 data->alarms =
1623 w83781d_read_value(client,
1624 W83781D_REG_ALARM1) +
1625 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1626 if ((data->type == w83782d) || (data->type == w83627hf)) {
1627 data->alarms |=
1628 w83781d_read_value(client,
1629 W83781D_REG_ALARM3) << 16;
1630 }
1631 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1632 data->beep_enable = i >> 7;
1633 data->beep_mask = ((i & 0x7f) << 8) +
1634 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1635 if ((data->type != w83781d) && (data->type != as99127f)) {
1636 data->beep_mask |=
1637 w83781d_read_value(client,
1638 W83781D_REG_BEEP_INTS3) << 16;
1639 }
1640 data->last_updated = jiffies;
1641 data->valid = 1;
1642 }
1643
1644 up(&data->update_lock);
1645
1646 return data;
1647 }
1648
1649 static int __init
1650 sensors_w83781d_init(void)
1651 {
1652 int res;
1653
1654 res = i2c_add_driver(&w83781d_driver);
1655 if (res)
1656 return res;
1657
1658 res = i2c_isa_add_driver(&w83781d_isa_driver);
1659 if (res) {
1660 i2c_del_driver(&w83781d_driver);
1661 return res;
1662 }
1663
1664 return 0;
1665 }
1666
1667 static void __exit
1668 sensors_w83781d_exit(void)
1669 {
1670 i2c_isa_del_driver(&w83781d_isa_driver);
1671 i2c_del_driver(&w83781d_driver);
1672 }
1673
1674 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1675 "Philip Edelbrock <phil@netroedge.com>, "
1676 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1677 MODULE_DESCRIPTION("W83781D driver");
1678 MODULE_LICENSE("GPL");
1679
1680 module_init(sensors_w83781d_init);
1681 module_exit(sensors_w83781d_exit);