]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/hwmon/w83781d.c
[PATCH] i2c: Drop i2c_driver.{owner,name}, 3 of 11
[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / w83781d.c
1 /*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 /*
24 Supports following chips:
25
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
33
34 */
35
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c-isa.h>
42 #include <linux/hwmon.h>
43 #include <linux/hwmon-vid.h>
44 #include <linux/err.h>
45 #include <asm/io.h>
46 #include "lm75.h"
47
48 /* Addresses to scan */
49 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
50 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
51 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
52 static unsigned short isa_address = 0x290;
53
54 /* Insmod parameters */
55 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
56 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
57 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
58
59 static int init = 1;
60 module_param(init, bool, 0);
61 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
62
63 /* Constants specified below */
64
65 /* Length of ISA address segment */
66 #define W83781D_EXTENT 8
67
68 /* Where are the ISA address/data registers relative to the base address */
69 #define W83781D_ADDR_REG_OFFSET 5
70 #define W83781D_DATA_REG_OFFSET 6
71
72 /* The W83781D registers */
73 /* The W83782D registers for nr=7,8 are in bank 5 */
74 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
75 (0x554 + (((nr) - 7) * 2)))
76 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
77 (0x555 + (((nr) - 7) * 2)))
78 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
79 (0x550 + (nr) - 7))
80
81 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
82 #define W83781D_REG_FAN(nr) (0x27 + (nr))
83
84 #define W83781D_REG_BANK 0x4E
85 #define W83781D_REG_TEMP2_CONFIG 0x152
86 #define W83781D_REG_TEMP3_CONFIG 0x252
87 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
88 ((nr == 2) ? (0x0150) : \
89 (0x27)))
90 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
91 ((nr == 2) ? (0x153) : \
92 (0x3A)))
93 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
94 ((nr == 2) ? (0x155) : \
95 (0x39)))
96
97 #define W83781D_REG_CONFIG 0x40
98 #define W83781D_REG_ALARM1 0x41
99 #define W83781D_REG_ALARM2 0x42
100 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */
101
102 #define W83781D_REG_IRQ 0x4C
103 #define W83781D_REG_BEEP_CONFIG 0x4D
104 #define W83781D_REG_BEEP_INTS1 0x56
105 #define W83781D_REG_BEEP_INTS2 0x57
106 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
107
108 #define W83781D_REG_VID_FANDIV 0x47
109
110 #define W83781D_REG_CHIPID 0x49
111 #define W83781D_REG_WCHIPID 0x58
112 #define W83781D_REG_CHIPMAN 0x4F
113 #define W83781D_REG_PIN 0x4B
114
115 /* 782D/783S only */
116 #define W83781D_REG_VBAT 0x5D
117
118 /* PWM 782D (1-4) and 783S (1-2) only */
119 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
120 /* on which is which; */
121 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
122 /* However 782d is probably wrong. */
123 #define W83781D_REG_PWM3 0x5E
124 #define W83781D_REG_PWM4 0x5F
125 #define W83781D_REG_PWMCLK12 0x5C
126 #define W83781D_REG_PWMCLK34 0x45C
127 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
128 W83781D_REG_PWM3, W83781D_REG_PWM4
129 };
130
131 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
132
133 #define W83781D_REG_I2C_ADDR 0x48
134 #define W83781D_REG_I2C_SUBADDR 0x4A
135
136 /* The following are undocumented in the data sheets however we
137 received the information in an email from Winbond tech support */
138 /* Sensor selection - not on 781d */
139 #define W83781D_REG_SCFG1 0x5D
140 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
141
142 #define W83781D_REG_SCFG2 0x59
143 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
144
145 #define W83781D_DEFAULT_BETA 3435
146
147 /* RT Table registers */
148 #define W83781D_REG_RT_IDX 0x50
149 #define W83781D_REG_RT_VAL 0x51
150
151 /* Conversions. Rounding and limit checking is only done on the TO_REG
152 variants. Note that you should be a bit careful with which arguments
153 these macros are called: arguments may be evaluated more than once.
154 Fixing this is just not worth it. */
155 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
156 #define IN_FROM_REG(val) (((val) * 16) / 10)
157
158 static inline u8
159 FAN_TO_REG(long rpm, int div)
160 {
161 if (rpm == 0)
162 return 255;
163 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
164 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
165 }
166
167 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
168 ((val) == 255 ? 0 : \
169 1350000 / ((val) * (div))))
170
171 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
172 : (val)) / 1000, 0, 0xff))
173 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
174
175 #define PWM_FROM_REG(val) (val)
176 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
177 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
178 (val) ^ 0x7fff : (val))
179 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
180 (~(val)) & 0x7fff : (val) & 0xffffff)
181
182 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
183 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
184
185 #define DIV_FROM_REG(val) (1 << (val))
186
187 static inline u8
188 DIV_TO_REG(long val, enum chips type)
189 {
190 int i;
191 val = SENSORS_LIMIT(val, 1,
192 ((type == w83781d
193 || type == as99127f) ? 8 : 128)) >> 1;
194 for (i = 0; i < 7; i++) {
195 if (val == 0)
196 break;
197 val >>= 1;
198 }
199 return ((u8) i);
200 }
201
202 /* There are some complications in a module like this. First off, W83781D chips
203 may be both present on the SMBus and the ISA bus, and we have to handle
204 those cases separately at some places. Second, there might be several
205 W83781D chips available (well, actually, that is probably never done; but
206 it is a clean illustration of how to handle a case like that). Finally,
207 a specific chip may be attached to *both* ISA and SMBus, and we would
208 not like to detect it double. Fortunately, in the case of the W83781D at
209 least, a register tells us what SMBus address we are on, so that helps
210 a bit - except if there could be more than one SMBus. Groan. No solution
211 for this yet. */
212
213 /* This module may seem overly long and complicated. In fact, it is not so
214 bad. Quite a lot of bookkeeping is done. A real driver can often cut
215 some corners. */
216
217 /* For each registered W83781D, we need to keep some data in memory. That
218 data is pointed to by w83781d_list[NR]->data. The structure itself is
219 dynamically allocated, at the same time when a new w83781d client is
220 allocated. */
221 struct w83781d_data {
222 struct i2c_client client;
223 struct class_device *class_dev;
224 struct semaphore lock;
225 enum chips type;
226
227 struct semaphore update_lock;
228 char valid; /* !=0 if following fields are valid */
229 unsigned long last_updated; /* In jiffies */
230
231 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
232 /* array of 2 pointers to subclients */
233
234 u8 in[9]; /* Register value - 8 & 9 for 782D only */
235 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
237 u8 fan[3]; /* Register value */
238 u8 fan_min[3]; /* Register value */
239 u8 temp;
240 u8 temp_max; /* Register value */
241 u8 temp_max_hyst; /* Register value */
242 u16 temp_add[2]; /* Register value */
243 u16 temp_max_add[2]; /* Register value */
244 u16 temp_max_hyst_add[2]; /* Register value */
245 u8 fan_div[3]; /* Register encoding, shifted right */
246 u8 vid; /* Register encoding, combined */
247 u32 alarms; /* Register encoding, combined */
248 u32 beep_mask; /* Register encoding, combined */
249 u8 beep_enable; /* Boolean */
250 u8 pwm[4]; /* Register value */
251 u8 pwmenable[4]; /* Boolean */
252 u16 sens[3]; /* 782D/783S only.
253 1 = pentium diode; 2 = 3904 diode;
254 3000-5000 = thermistor beta.
255 Default = 3435.
256 Other Betas unimplemented */
257 u8 vrm;
258 };
259
260 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
261 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
262 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
263 static int w83781d_detach_client(struct i2c_client *client);
264
265 static int w83781d_read_value(struct i2c_client *client, u16 register);
266 static int w83781d_write_value(struct i2c_client *client, u16 register,
267 u16 value);
268 static struct w83781d_data *w83781d_update_device(struct device *dev);
269 static void w83781d_init_client(struct i2c_client *client);
270
271 static struct i2c_driver w83781d_driver = {
272 .driver = {
273 .owner = THIS_MODULE,
274 .name = "w83781d",
275 },
276 .id = I2C_DRIVERID_W83781D,
277 .attach_adapter = w83781d_attach_adapter,
278 .detach_client = w83781d_detach_client,
279 };
280
281 static struct i2c_driver w83781d_isa_driver = {
282 .driver = {
283 .owner = THIS_MODULE,
284 .name = "w83781d-isa",
285 },
286 .attach_adapter = w83781d_isa_attach_adapter,
287 .detach_client = w83781d_detach_client,
288 };
289
290
291 /* following are the sysfs callback functions */
292 #define show_in_reg(reg) \
293 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
294 { \
295 struct w83781d_data *data = w83781d_update_device(dev); \
296 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
297 }
298 show_in_reg(in);
299 show_in_reg(in_min);
300 show_in_reg(in_max);
301
302 #define store_in_reg(REG, reg) \
303 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
304 { \
305 struct i2c_client *client = to_i2c_client(dev); \
306 struct w83781d_data *data = i2c_get_clientdata(client); \
307 u32 val; \
308 \
309 val = simple_strtoul(buf, NULL, 10) / 10; \
310 \
311 down(&data->update_lock); \
312 data->in_##reg[nr] = IN_TO_REG(val); \
313 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
314 \
315 up(&data->update_lock); \
316 return count; \
317 }
318 store_in_reg(MIN, min);
319 store_in_reg(MAX, max);
320
321 #define sysfs_in_offset(offset) \
322 static ssize_t \
323 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
324 { \
325 return show_in(dev, buf, offset); \
326 } \
327 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
328
329 #define sysfs_in_reg_offset(reg, offset) \
330 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
331 { \
332 return show_in_##reg (dev, buf, offset); \
333 } \
334 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
335 { \
336 return store_in_##reg (dev, buf, count, offset); \
337 } \
338 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
339
340 #define sysfs_in_offsets(offset) \
341 sysfs_in_offset(offset); \
342 sysfs_in_reg_offset(min, offset); \
343 sysfs_in_reg_offset(max, offset);
344
345 sysfs_in_offsets(0);
346 sysfs_in_offsets(1);
347 sysfs_in_offsets(2);
348 sysfs_in_offsets(3);
349 sysfs_in_offsets(4);
350 sysfs_in_offsets(5);
351 sysfs_in_offsets(6);
352 sysfs_in_offsets(7);
353 sysfs_in_offsets(8);
354
355 #define device_create_file_in(client, offset) \
356 do { \
357 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
358 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
359 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
360 } while (0)
361
362 #define show_fan_reg(reg) \
363 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
364 { \
365 struct w83781d_data *data = w83781d_update_device(dev); \
366 return sprintf(buf,"%ld\n", \
367 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
368 }
369 show_fan_reg(fan);
370 show_fan_reg(fan_min);
371
372 static ssize_t
373 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
374 {
375 struct i2c_client *client = to_i2c_client(dev);
376 struct w83781d_data *data = i2c_get_clientdata(client);
377 u32 val;
378
379 val = simple_strtoul(buf, NULL, 10);
380
381 down(&data->update_lock);
382 data->fan_min[nr - 1] =
383 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
384 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
385 data->fan_min[nr - 1]);
386
387 up(&data->update_lock);
388 return count;
389 }
390
391 #define sysfs_fan_offset(offset) \
392 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
393 { \
394 return show_fan(dev, buf, offset); \
395 } \
396 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
397
398 #define sysfs_fan_min_offset(offset) \
399 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
400 { \
401 return show_fan_min(dev, buf, offset); \
402 } \
403 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
404 { \
405 return store_fan_min(dev, buf, count, offset); \
406 } \
407 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
408
409 sysfs_fan_offset(1);
410 sysfs_fan_min_offset(1);
411 sysfs_fan_offset(2);
412 sysfs_fan_min_offset(2);
413 sysfs_fan_offset(3);
414 sysfs_fan_min_offset(3);
415
416 #define device_create_file_fan(client, offset) \
417 do { \
418 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
419 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
420 } while (0)
421
422 #define show_temp_reg(reg) \
423 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
424 { \
425 struct w83781d_data *data = w83781d_update_device(dev); \
426 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
427 return sprintf(buf,"%d\n", \
428 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
429 } else { /* TEMP1 */ \
430 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
431 } \
432 }
433 show_temp_reg(temp);
434 show_temp_reg(temp_max);
435 show_temp_reg(temp_max_hyst);
436
437 #define store_temp_reg(REG, reg) \
438 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
439 { \
440 struct i2c_client *client = to_i2c_client(dev); \
441 struct w83781d_data *data = i2c_get_clientdata(client); \
442 s32 val; \
443 \
444 val = simple_strtol(buf, NULL, 10); \
445 \
446 down(&data->update_lock); \
447 \
448 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
449 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
450 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
451 data->temp_##reg##_add[nr-2]); \
452 } else { /* TEMP1 */ \
453 data->temp_##reg = TEMP_TO_REG(val); \
454 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
455 data->temp_##reg); \
456 } \
457 \
458 up(&data->update_lock); \
459 return count; \
460 }
461 store_temp_reg(OVER, max);
462 store_temp_reg(HYST, max_hyst);
463
464 #define sysfs_temp_offset(offset) \
465 static ssize_t \
466 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
467 { \
468 return show_temp(dev, buf, offset); \
469 } \
470 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
471
472 #define sysfs_temp_reg_offset(reg, offset) \
473 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
474 { \
475 return show_temp_##reg (dev, buf, offset); \
476 } \
477 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
478 { \
479 return store_temp_##reg (dev, buf, count, offset); \
480 } \
481 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
482
483 #define sysfs_temp_offsets(offset) \
484 sysfs_temp_offset(offset); \
485 sysfs_temp_reg_offset(max, offset); \
486 sysfs_temp_reg_offset(max_hyst, offset);
487
488 sysfs_temp_offsets(1);
489 sysfs_temp_offsets(2);
490 sysfs_temp_offsets(3);
491
492 #define device_create_file_temp(client, offset) \
493 do { \
494 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
495 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
496 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
497 } while (0)
498
499 static ssize_t
500 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
501 {
502 struct w83781d_data *data = w83781d_update_device(dev);
503 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
504 }
505
506 static
507 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
508 #define device_create_file_vid(client) \
509 device_create_file(&client->dev, &dev_attr_cpu0_vid);
510 static ssize_t
511 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
512 {
513 struct w83781d_data *data = w83781d_update_device(dev);
514 return sprintf(buf, "%ld\n", (long) data->vrm);
515 }
516
517 static ssize_t
518 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
519 {
520 struct i2c_client *client = to_i2c_client(dev);
521 struct w83781d_data *data = i2c_get_clientdata(client);
522 u32 val;
523
524 val = simple_strtoul(buf, NULL, 10);
525 data->vrm = val;
526
527 return count;
528 }
529
530 static
531 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
532 #define device_create_file_vrm(client) \
533 device_create_file(&client->dev, &dev_attr_vrm);
534 static ssize_t
535 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
536 {
537 struct w83781d_data *data = w83781d_update_device(dev);
538 return sprintf(buf, "%u\n", data->alarms);
539 }
540
541 static
542 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
543 #define device_create_file_alarms(client) \
544 device_create_file(&client->dev, &dev_attr_alarms);
545 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
546 {
547 struct w83781d_data *data = w83781d_update_device(dev);
548 return sprintf(buf, "%ld\n",
549 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
550 }
551 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
552 {
553 struct w83781d_data *data = w83781d_update_device(dev);
554 return sprintf(buf, "%ld\n",
555 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
556 }
557
558 #define BEEP_ENABLE 0 /* Store beep_enable */
559 #define BEEP_MASK 1 /* Store beep_mask */
560
561 static ssize_t
562 store_beep_reg(struct device *dev, const char *buf, size_t count,
563 int update_mask)
564 {
565 struct i2c_client *client = to_i2c_client(dev);
566 struct w83781d_data *data = i2c_get_clientdata(client);
567 u32 val, val2;
568
569 val = simple_strtoul(buf, NULL, 10);
570
571 down(&data->update_lock);
572
573 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
574 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
575 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
576 data->beep_mask & 0xff);
577
578 if ((data->type != w83781d) && (data->type != as99127f)) {
579 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
580 ((data->beep_mask) >> 16) & 0xff);
581 }
582
583 val2 = (data->beep_mask >> 8) & 0x7f;
584 } else { /* We are storing beep_enable */
585 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
586 data->beep_enable = BEEP_ENABLE_TO_REG(val);
587 }
588
589 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
590 val2 | data->beep_enable << 7);
591
592 up(&data->update_lock);
593 return count;
594 }
595
596 #define sysfs_beep(REG, reg) \
597 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
598 { \
599 return show_beep_##reg(dev, attr, buf); \
600 } \
601 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
602 { \
603 return store_beep_reg(dev, buf, count, BEEP_##REG); \
604 } \
605 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
606
607 sysfs_beep(ENABLE, enable);
608 sysfs_beep(MASK, mask);
609
610 #define device_create_file_beep(client) \
611 do { \
612 device_create_file(&client->dev, &dev_attr_beep_enable); \
613 device_create_file(&client->dev, &dev_attr_beep_mask); \
614 } while (0)
615
616 static ssize_t
617 show_fan_div_reg(struct device *dev, char *buf, int nr)
618 {
619 struct w83781d_data *data = w83781d_update_device(dev);
620 return sprintf(buf, "%ld\n",
621 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
622 }
623
624 /* Note: we save and restore the fan minimum here, because its value is
625 determined in part by the fan divisor. This follows the principle of
626 least suprise; the user doesn't expect the fan minimum to change just
627 because the divisor changed. */
628 static ssize_t
629 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
630 {
631 struct i2c_client *client = to_i2c_client(dev);
632 struct w83781d_data *data = i2c_get_clientdata(client);
633 unsigned long min;
634 u8 reg;
635 unsigned long val = simple_strtoul(buf, NULL, 10);
636
637 down(&data->update_lock);
638
639 /* Save fan_min */
640 min = FAN_FROM_REG(data->fan_min[nr],
641 DIV_FROM_REG(data->fan_div[nr]));
642
643 data->fan_div[nr] = DIV_TO_REG(val, data->type);
644
645 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
646 & (nr==0 ? 0xcf : 0x3f))
647 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
648 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
649
650 /* w83781d and as99127f don't have extended divisor bits */
651 if (data->type != w83781d && data->type != as99127f) {
652 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
653 & ~(1 << (5 + nr)))
654 | ((data->fan_div[nr] & 0x04) << (3 + nr));
655 w83781d_write_value(client, W83781D_REG_VBAT, reg);
656 }
657
658 /* Restore fan_min */
659 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
660 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
661
662 up(&data->update_lock);
663 return count;
664 }
665
666 #define sysfs_fan_div(offset) \
667 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
668 { \
669 return show_fan_div_reg(dev, buf, offset); \
670 } \
671 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
672 { \
673 return store_fan_div_reg(dev, buf, count, offset - 1); \
674 } \
675 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
676
677 sysfs_fan_div(1);
678 sysfs_fan_div(2);
679 sysfs_fan_div(3);
680
681 #define device_create_file_fan_div(client, offset) \
682 do { \
683 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
684 } while (0)
685
686 static ssize_t
687 show_pwm_reg(struct device *dev, char *buf, int nr)
688 {
689 struct w83781d_data *data = w83781d_update_device(dev);
690 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
691 }
692
693 static ssize_t
694 show_pwmenable_reg(struct device *dev, char *buf, int nr)
695 {
696 struct w83781d_data *data = w83781d_update_device(dev);
697 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
698 }
699
700 static ssize_t
701 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
702 {
703 struct i2c_client *client = to_i2c_client(dev);
704 struct w83781d_data *data = i2c_get_clientdata(client);
705 u32 val;
706
707 val = simple_strtoul(buf, NULL, 10);
708
709 down(&data->update_lock);
710 data->pwm[nr - 1] = PWM_TO_REG(val);
711 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
712 up(&data->update_lock);
713 return count;
714 }
715
716 static ssize_t
717 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
718 {
719 struct i2c_client *client = to_i2c_client(dev);
720 struct w83781d_data *data = i2c_get_clientdata(client);
721 u32 val, reg;
722
723 val = simple_strtoul(buf, NULL, 10);
724
725 down(&data->update_lock);
726
727 switch (val) {
728 case 0:
729 case 1:
730 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
731 w83781d_write_value(client, W83781D_REG_PWMCLK12,
732 (reg & 0xf7) | (val << 3));
733
734 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
735 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
736 (reg & 0xef) | (!val << 4));
737
738 data->pwmenable[nr - 1] = val;
739 break;
740
741 default:
742 up(&data->update_lock);
743 return -EINVAL;
744 }
745
746 up(&data->update_lock);
747 return count;
748 }
749
750 #define sysfs_pwm(offset) \
751 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
752 { \
753 return show_pwm_reg(dev, buf, offset); \
754 } \
755 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
756 const char *buf, size_t count) \
757 { \
758 return store_pwm_reg(dev, buf, count, offset); \
759 } \
760 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
761 show_regs_pwm_##offset, store_regs_pwm_##offset);
762
763 #define sysfs_pwmenable(offset) \
764 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
765 { \
766 return show_pwmenable_reg(dev, buf, offset); \
767 } \
768 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
769 const char *buf, size_t count) \
770 { \
771 return store_pwmenable_reg(dev, buf, count, offset); \
772 } \
773 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
774 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
775
776 sysfs_pwm(1);
777 sysfs_pwm(2);
778 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
779 sysfs_pwm(3);
780 sysfs_pwm(4);
781
782 #define device_create_file_pwm(client, offset) \
783 do { \
784 device_create_file(&client->dev, &dev_attr_pwm##offset); \
785 } while (0)
786
787 #define device_create_file_pwmenable(client, offset) \
788 do { \
789 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
790 } while (0)
791
792 static ssize_t
793 show_sensor_reg(struct device *dev, char *buf, int nr)
794 {
795 struct w83781d_data *data = w83781d_update_device(dev);
796 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
797 }
798
799 static ssize_t
800 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
801 {
802 struct i2c_client *client = to_i2c_client(dev);
803 struct w83781d_data *data = i2c_get_clientdata(client);
804 u32 val, tmp;
805
806 val = simple_strtoul(buf, NULL, 10);
807
808 down(&data->update_lock);
809
810 switch (val) {
811 case 1: /* PII/Celeron diode */
812 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
813 w83781d_write_value(client, W83781D_REG_SCFG1,
814 tmp | BIT_SCFG1[nr - 1]);
815 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
816 w83781d_write_value(client, W83781D_REG_SCFG2,
817 tmp | BIT_SCFG2[nr - 1]);
818 data->sens[nr - 1] = val;
819 break;
820 case 2: /* 3904 */
821 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
822 w83781d_write_value(client, W83781D_REG_SCFG1,
823 tmp | BIT_SCFG1[nr - 1]);
824 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
825 w83781d_write_value(client, W83781D_REG_SCFG2,
826 tmp & ~BIT_SCFG2[nr - 1]);
827 data->sens[nr - 1] = val;
828 break;
829 case W83781D_DEFAULT_BETA: /* thermistor */
830 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
831 w83781d_write_value(client, W83781D_REG_SCFG1,
832 tmp & ~BIT_SCFG1[nr - 1]);
833 data->sens[nr - 1] = val;
834 break;
835 default:
836 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
837 (long) val, W83781D_DEFAULT_BETA);
838 break;
839 }
840
841 up(&data->update_lock);
842 return count;
843 }
844
845 #define sysfs_sensor(offset) \
846 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
847 { \
848 return show_sensor_reg(dev, buf, offset); \
849 } \
850 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
851 { \
852 return store_sensor_reg(dev, buf, count, offset); \
853 } \
854 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
855
856 sysfs_sensor(1);
857 sysfs_sensor(2);
858 sysfs_sensor(3);
859
860 #define device_create_file_sensor(client, offset) \
861 do { \
862 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
863 } while (0)
864
865 /* This function is called when:
866 * w83781d_driver is inserted (when this module is loaded), for each
867 available adapter
868 * when a new adapter is inserted (and w83781d_driver is still present) */
869 static int
870 w83781d_attach_adapter(struct i2c_adapter *adapter)
871 {
872 if (!(adapter->class & I2C_CLASS_HWMON))
873 return 0;
874 return i2c_probe(adapter, &addr_data, w83781d_detect);
875 }
876
877 static int
878 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
879 {
880 return w83781d_detect(adapter, isa_address, -1);
881 }
882
883 /* Assumes that adapter is of I2C, not ISA variety.
884 * OTHERWISE DON'T CALL THIS
885 */
886 static int
887 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
888 struct i2c_client *new_client)
889 {
890 int i, val1 = 0, id;
891 int err;
892 const char *client_name = "";
893 struct w83781d_data *data = i2c_get_clientdata(new_client);
894
895 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
896 if (!(data->lm75[0])) {
897 err = -ENOMEM;
898 goto ERROR_SC_0;
899 }
900
901 id = i2c_adapter_id(adapter);
902
903 if (force_subclients[0] == id && force_subclients[1] == address) {
904 for (i = 2; i <= 3; i++) {
905 if (force_subclients[i] < 0x48 ||
906 force_subclients[i] > 0x4f) {
907 dev_err(&new_client->dev, "Invalid subclient "
908 "address %d; must be 0x48-0x4f\n",
909 force_subclients[i]);
910 err = -EINVAL;
911 goto ERROR_SC_1;
912 }
913 }
914 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
915 (force_subclients[2] & 0x07) |
916 ((force_subclients[3] & 0x07) << 4));
917 data->lm75[0]->addr = force_subclients[2];
918 } else {
919 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
920 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
921 }
922
923 if (kind != w83783s) {
924 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
925 if (!(data->lm75[1])) {
926 err = -ENOMEM;
927 goto ERROR_SC_1;
928 }
929
930 if (force_subclients[0] == id &&
931 force_subclients[1] == address) {
932 data->lm75[1]->addr = force_subclients[3];
933 } else {
934 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
935 }
936 if (data->lm75[0]->addr == data->lm75[1]->addr) {
937 dev_err(&new_client->dev,
938 "Duplicate addresses 0x%x for subclients.\n",
939 data->lm75[0]->addr);
940 err = -EBUSY;
941 goto ERROR_SC_2;
942 }
943 }
944
945 if (kind == w83781d)
946 client_name = "w83781d subclient";
947 else if (kind == w83782d)
948 client_name = "w83782d subclient";
949 else if (kind == w83783s)
950 client_name = "w83783s subclient";
951 else if (kind == w83627hf)
952 client_name = "w83627hf subclient";
953 else if (kind == as99127f)
954 client_name = "as99127f subclient";
955
956 for (i = 0; i <= 1; i++) {
957 /* store all data in w83781d */
958 i2c_set_clientdata(data->lm75[i], NULL);
959 data->lm75[i]->adapter = adapter;
960 data->lm75[i]->driver = &w83781d_driver;
961 data->lm75[i]->flags = 0;
962 strlcpy(data->lm75[i]->name, client_name,
963 I2C_NAME_SIZE);
964 if ((err = i2c_attach_client(data->lm75[i]))) {
965 dev_err(&new_client->dev, "Subclient %d "
966 "registration at address 0x%x "
967 "failed.\n", i, data->lm75[i]->addr);
968 if (i == 1)
969 goto ERROR_SC_3;
970 goto ERROR_SC_2;
971 }
972 if (kind == w83783s)
973 break;
974 }
975
976 return 0;
977
978 /* Undo inits in case of errors */
979 ERROR_SC_3:
980 i2c_detach_client(data->lm75[0]);
981 ERROR_SC_2:
982 kfree(data->lm75[1]);
983 ERROR_SC_1:
984 kfree(data->lm75[0]);
985 ERROR_SC_0:
986 return err;
987 }
988
989 static int
990 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
991 {
992 int i = 0, val1 = 0, val2;
993 struct i2c_client *new_client;
994 struct w83781d_data *data;
995 int err;
996 const char *client_name = "";
997 int is_isa = i2c_is_isa_adapter(adapter);
998 enum vendor { winbond, asus } vendid;
999
1000 if (!is_isa
1001 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1002 err = -EINVAL;
1003 goto ERROR0;
1004 }
1005
1006 /* Prevent users from forcing a kind for a bus it isn't supposed
1007 to possibly be on */
1008 if (is_isa && (kind == as99127f || kind == w83783s)) {
1009 dev_err(&adapter->dev,
1010 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1011 address);
1012 err = -EINVAL;
1013 goto ERROR0;
1014 }
1015
1016 if (is_isa)
1017 if (!request_region(address, W83781D_EXTENT,
1018 w83781d_isa_driver.driver.name)) {
1019 dev_dbg(&adapter->dev, "Request of region "
1020 "0x%x-0x%x for w83781d failed\n", address,
1021 address + W83781D_EXTENT - 1);
1022 err = -EBUSY;
1023 goto ERROR0;
1024 }
1025
1026 /* Probe whether there is anything available on this address. Already
1027 done for SMBus clients */
1028 if (kind < 0) {
1029 if (is_isa) {
1030
1031 #define REALLY_SLOW_IO
1032 /* We need the timeouts for at least some LM78-like
1033 chips. But only if we read 'undefined' registers. */
1034 i = inb_p(address + 1);
1035 if (inb_p(address + 2) != i
1036 || inb_p(address + 3) != i
1037 || inb_p(address + 7) != i) {
1038 dev_dbg(&adapter->dev, "Detection of w83781d "
1039 "chip failed at step 1\n");
1040 err = -ENODEV;
1041 goto ERROR1;
1042 }
1043 #undef REALLY_SLOW_IO
1044
1045 /* Let's just hope nothing breaks here */
1046 i = inb_p(address + 5) & 0x7f;
1047 outb_p(~i & 0x7f, address + 5);
1048 val2 = inb_p(address + 5) & 0x7f;
1049 if (val2 != (~i & 0x7f)) {
1050 outb_p(i, address + 5);
1051 dev_dbg(&adapter->dev, "Detection of w83781d "
1052 "chip failed at step 2 (0x%x != "
1053 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1054 address + 5);
1055 err = -ENODEV;
1056 goto ERROR1;
1057 }
1058 }
1059 }
1060
1061 /* OK. For now, we presume we have a valid client. We now create the
1062 client structure, even though we cannot fill it completely yet.
1063 But it allows us to access w83781d_{read,write}_value. */
1064
1065 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1066 err = -ENOMEM;
1067 goto ERROR1;
1068 }
1069
1070 new_client = &data->client;
1071 i2c_set_clientdata(new_client, data);
1072 new_client->addr = address;
1073 init_MUTEX(&data->lock);
1074 new_client->adapter = adapter;
1075 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1076 new_client->flags = 0;
1077
1078 /* Now, we do the remaining detection. */
1079
1080 /* The w8378?d may be stuck in some other bank than bank 0. This may
1081 make reading other information impossible. Specify a force=... or
1082 force_*=... parameter, and the Winbond will be reset to the right
1083 bank. */
1084 if (kind < 0) {
1085 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1086 dev_dbg(&new_client->dev, "Detection failed at step "
1087 "3\n");
1088 err = -ENODEV;
1089 goto ERROR2;
1090 }
1091 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1092 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1093 /* Check for Winbond or Asus ID if in bank 0 */
1094 if ((!(val1 & 0x07)) &&
1095 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1096 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1097 dev_dbg(&new_client->dev, "Detection failed at step "
1098 "4\n");
1099 err = -ENODEV;
1100 goto ERROR2;
1101 }
1102 /* If Winbond SMBus, check address at 0x48.
1103 Asus doesn't support, except for as99127f rev.2 */
1104 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1105 ((val1 & 0x80) && (val2 == 0x5c)))) {
1106 if (w83781d_read_value
1107 (new_client, W83781D_REG_I2C_ADDR) != address) {
1108 dev_dbg(&new_client->dev, "Detection failed "
1109 "at step 5\n");
1110 err = -ENODEV;
1111 goto ERROR2;
1112 }
1113 }
1114 }
1115
1116 /* We have either had a force parameter, or we have already detected the
1117 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1118 w83781d_write_value(new_client, W83781D_REG_BANK,
1119 (w83781d_read_value(new_client,
1120 W83781D_REG_BANK) & 0x78) |
1121 0x80);
1122
1123 /* Determine the chip type. */
1124 if (kind <= 0) {
1125 /* get vendor ID */
1126 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1127 if (val2 == 0x5c)
1128 vendid = winbond;
1129 else if (val2 == 0x12)
1130 vendid = asus;
1131 else {
1132 dev_dbg(&new_client->dev, "Chip was made by neither "
1133 "Winbond nor Asus?\n");
1134 err = -ENODEV;
1135 goto ERROR2;
1136 }
1137
1138 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1139 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1140 kind = w83781d;
1141 else if (val1 == 0x30 && vendid == winbond)
1142 kind = w83782d;
1143 else if (val1 == 0x40 && vendid == winbond && !is_isa
1144 && address == 0x2d)
1145 kind = w83783s;
1146 else if (val1 == 0x21 && vendid == winbond)
1147 kind = w83627hf;
1148 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1149 kind = as99127f;
1150 else {
1151 if (kind == 0)
1152 dev_warn(&new_client->dev, "Ignoring 'force' "
1153 "parameter for unknown chip at "
1154 "adapter %d, address 0x%02x\n",
1155 i2c_adapter_id(adapter), address);
1156 err = -EINVAL;
1157 goto ERROR2;
1158 }
1159 }
1160
1161 if (kind == w83781d) {
1162 client_name = "w83781d";
1163 } else if (kind == w83782d) {
1164 client_name = "w83782d";
1165 } else if (kind == w83783s) {
1166 client_name = "w83783s";
1167 } else if (kind == w83627hf) {
1168 client_name = "w83627hf";
1169 } else if (kind == as99127f) {
1170 client_name = "as99127f";
1171 }
1172
1173 /* Fill in the remaining client fields and put into the global list */
1174 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1175 data->type = kind;
1176
1177 data->valid = 0;
1178 init_MUTEX(&data->update_lock);
1179
1180 /* Tell the I2C layer a new client has arrived */
1181 if ((err = i2c_attach_client(new_client)))
1182 goto ERROR2;
1183
1184 /* attach secondary i2c lm75-like clients */
1185 if (!is_isa) {
1186 if ((err = w83781d_detect_subclients(adapter, address,
1187 kind, new_client)))
1188 goto ERROR3;
1189 } else {
1190 data->lm75[0] = NULL;
1191 data->lm75[1] = NULL;
1192 }
1193
1194 /* Initialize the chip */
1195 w83781d_init_client(new_client);
1196
1197 /* A few vars need to be filled upon startup */
1198 for (i = 1; i <= 3; i++) {
1199 data->fan_min[i - 1] = w83781d_read_value(new_client,
1200 W83781D_REG_FAN_MIN(i));
1201 }
1202 if (kind != w83781d && kind != as99127f)
1203 for (i = 0; i < 4; i++)
1204 data->pwmenable[i] = 1;
1205
1206 /* Register sysfs hooks */
1207 data->class_dev = hwmon_device_register(&new_client->dev);
1208 if (IS_ERR(data->class_dev)) {
1209 err = PTR_ERR(data->class_dev);
1210 goto ERROR4;
1211 }
1212
1213 device_create_file_in(new_client, 0);
1214 if (kind != w83783s)
1215 device_create_file_in(new_client, 1);
1216 device_create_file_in(new_client, 2);
1217 device_create_file_in(new_client, 3);
1218 device_create_file_in(new_client, 4);
1219 device_create_file_in(new_client, 5);
1220 device_create_file_in(new_client, 6);
1221 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1222 device_create_file_in(new_client, 7);
1223 device_create_file_in(new_client, 8);
1224 }
1225
1226 device_create_file_fan(new_client, 1);
1227 device_create_file_fan(new_client, 2);
1228 device_create_file_fan(new_client, 3);
1229
1230 device_create_file_temp(new_client, 1);
1231 device_create_file_temp(new_client, 2);
1232 if (kind != w83783s)
1233 device_create_file_temp(new_client, 3);
1234
1235 device_create_file_vid(new_client);
1236 device_create_file_vrm(new_client);
1237
1238 device_create_file_fan_div(new_client, 1);
1239 device_create_file_fan_div(new_client, 2);
1240 device_create_file_fan_div(new_client, 3);
1241
1242 device_create_file_alarms(new_client);
1243
1244 device_create_file_beep(new_client);
1245
1246 if (kind != w83781d && kind != as99127f) {
1247 device_create_file_pwm(new_client, 1);
1248 device_create_file_pwm(new_client, 2);
1249 device_create_file_pwmenable(new_client, 2);
1250 }
1251 if (kind == w83782d && !is_isa) {
1252 device_create_file_pwm(new_client, 3);
1253 device_create_file_pwm(new_client, 4);
1254 }
1255
1256 if (kind != as99127f && kind != w83781d) {
1257 device_create_file_sensor(new_client, 1);
1258 device_create_file_sensor(new_client, 2);
1259 if (kind != w83783s)
1260 device_create_file_sensor(new_client, 3);
1261 }
1262
1263 return 0;
1264
1265 ERROR4:
1266 if (data->lm75[1]) {
1267 i2c_detach_client(data->lm75[1]);
1268 kfree(data->lm75[1]);
1269 }
1270 if (data->lm75[0]) {
1271 i2c_detach_client(data->lm75[0]);
1272 kfree(data->lm75[0]);
1273 }
1274 ERROR3:
1275 i2c_detach_client(new_client);
1276 ERROR2:
1277 kfree(data);
1278 ERROR1:
1279 if (is_isa)
1280 release_region(address, W83781D_EXTENT);
1281 ERROR0:
1282 return err;
1283 }
1284
1285 static int
1286 w83781d_detach_client(struct i2c_client *client)
1287 {
1288 struct w83781d_data *data = i2c_get_clientdata(client);
1289 int err;
1290
1291 /* main client */
1292 if (data)
1293 hwmon_device_unregister(data->class_dev);
1294
1295 if (i2c_is_isa_client(client))
1296 release_region(client->addr, W83781D_EXTENT);
1297
1298 if ((err = i2c_detach_client(client)))
1299 return err;
1300
1301 /* main client */
1302 if (data)
1303 kfree(data);
1304
1305 /* subclient */
1306 else
1307 kfree(client);
1308
1309 return 0;
1310 }
1311
1312 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1313 bank switches. ISA access must always be locked explicitly!
1314 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1315 would slow down the W83781D access and should not be necessary.
1316 There are some ugly typecasts here, but the good news is - they should
1317 nowhere else be necessary! */
1318 static int
1319 w83781d_read_value(struct i2c_client *client, u16 reg)
1320 {
1321 struct w83781d_data *data = i2c_get_clientdata(client);
1322 int res, word_sized, bank;
1323 struct i2c_client *cl;
1324
1325 down(&data->lock);
1326 if (i2c_is_isa_client(client)) {
1327 word_sized = (((reg & 0xff00) == 0x100)
1328 || ((reg & 0xff00) == 0x200))
1329 && (((reg & 0x00ff) == 0x50)
1330 || ((reg & 0x00ff) == 0x53)
1331 || ((reg & 0x00ff) == 0x55));
1332 if (reg & 0xff00) {
1333 outb_p(W83781D_REG_BANK,
1334 client->addr + W83781D_ADDR_REG_OFFSET);
1335 outb_p(reg >> 8,
1336 client->addr + W83781D_DATA_REG_OFFSET);
1337 }
1338 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1339 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1340 if (word_sized) {
1341 outb_p((reg & 0xff) + 1,
1342 client->addr + W83781D_ADDR_REG_OFFSET);
1343 res =
1344 (res << 8) + inb_p(client->addr +
1345 W83781D_DATA_REG_OFFSET);
1346 }
1347 if (reg & 0xff00) {
1348 outb_p(W83781D_REG_BANK,
1349 client->addr + W83781D_ADDR_REG_OFFSET);
1350 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1351 }
1352 } else {
1353 bank = (reg >> 8) & 0x0f;
1354 if (bank > 2)
1355 /* switch banks */
1356 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1357 bank);
1358 if (bank == 0 || bank > 2) {
1359 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1360 } else {
1361 /* switch to subclient */
1362 cl = data->lm75[bank - 1];
1363 /* convert from ISA to LM75 I2C addresses */
1364 switch (reg & 0xff) {
1365 case 0x50: /* TEMP */
1366 res = swab16(i2c_smbus_read_word_data(cl, 0));
1367 break;
1368 case 0x52: /* CONFIG */
1369 res = i2c_smbus_read_byte_data(cl, 1);
1370 break;
1371 case 0x53: /* HYST */
1372 res = swab16(i2c_smbus_read_word_data(cl, 2));
1373 break;
1374 case 0x55: /* OVER */
1375 default:
1376 res = swab16(i2c_smbus_read_word_data(cl, 3));
1377 break;
1378 }
1379 }
1380 if (bank > 2)
1381 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1382 }
1383 up(&data->lock);
1384 return res;
1385 }
1386
1387 static int
1388 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1389 {
1390 struct w83781d_data *data = i2c_get_clientdata(client);
1391 int word_sized, bank;
1392 struct i2c_client *cl;
1393
1394 down(&data->lock);
1395 if (i2c_is_isa_client(client)) {
1396 word_sized = (((reg & 0xff00) == 0x100)
1397 || ((reg & 0xff00) == 0x200))
1398 && (((reg & 0x00ff) == 0x53)
1399 || ((reg & 0x00ff) == 0x55));
1400 if (reg & 0xff00) {
1401 outb_p(W83781D_REG_BANK,
1402 client->addr + W83781D_ADDR_REG_OFFSET);
1403 outb_p(reg >> 8,
1404 client->addr + W83781D_DATA_REG_OFFSET);
1405 }
1406 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1407 if (word_sized) {
1408 outb_p(value >> 8,
1409 client->addr + W83781D_DATA_REG_OFFSET);
1410 outb_p((reg & 0xff) + 1,
1411 client->addr + W83781D_ADDR_REG_OFFSET);
1412 }
1413 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1414 if (reg & 0xff00) {
1415 outb_p(W83781D_REG_BANK,
1416 client->addr + W83781D_ADDR_REG_OFFSET);
1417 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1418 }
1419 } else {
1420 bank = (reg >> 8) & 0x0f;
1421 if (bank > 2)
1422 /* switch banks */
1423 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1424 bank);
1425 if (bank == 0 || bank > 2) {
1426 i2c_smbus_write_byte_data(client, reg & 0xff,
1427 value & 0xff);
1428 } else {
1429 /* switch to subclient */
1430 cl = data->lm75[bank - 1];
1431 /* convert from ISA to LM75 I2C addresses */
1432 switch (reg & 0xff) {
1433 case 0x52: /* CONFIG */
1434 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1435 break;
1436 case 0x53: /* HYST */
1437 i2c_smbus_write_word_data(cl, 2, swab16(value));
1438 break;
1439 case 0x55: /* OVER */
1440 i2c_smbus_write_word_data(cl, 3, swab16(value));
1441 break;
1442 }
1443 }
1444 if (bank > 2)
1445 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1446 }
1447 up(&data->lock);
1448 return 0;
1449 }
1450
1451 static void
1452 w83781d_init_client(struct i2c_client *client)
1453 {
1454 struct w83781d_data *data = i2c_get_clientdata(client);
1455 int i, p;
1456 int type = data->type;
1457 u8 tmp;
1458
1459 if (init && type != as99127f) { /* this resets registers we don't have
1460 documentation for on the as99127f */
1461 /* save these registers */
1462 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1463 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1464 /* Reset all except Watchdog values and last conversion values
1465 This sets fan-divs to 2, among others */
1466 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1467 /* Restore the registers and disable power-on abnormal beep.
1468 This saves FAN 1/2/3 input/output values set by BIOS. */
1469 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1470 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1471 /* Disable master beep-enable (reset turns it on).
1472 Individual beep_mask should be reset to off but for some reason
1473 disabling this bit helps some people not get beeped */
1474 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1475 }
1476
1477 data->vrm = vid_which_vrm();
1478
1479 if ((type != w83781d) && (type != as99127f)) {
1480 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1481 for (i = 1; i <= 3; i++) {
1482 if (!(tmp & BIT_SCFG1[i - 1])) {
1483 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1484 } else {
1485 if (w83781d_read_value
1486 (client,
1487 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1488 data->sens[i - 1] = 1;
1489 else
1490 data->sens[i - 1] = 2;
1491 }
1492 if (type == w83783s && i == 2)
1493 break;
1494 }
1495 }
1496
1497 if (init && type != as99127f) {
1498 /* Enable temp2 */
1499 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1500 if (tmp & 0x01) {
1501 dev_warn(&client->dev, "Enabling temp2, readings "
1502 "might not make sense\n");
1503 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1504 tmp & 0xfe);
1505 }
1506
1507 /* Enable temp3 */
1508 if (type != w83783s) {
1509 tmp = w83781d_read_value(client,
1510 W83781D_REG_TEMP3_CONFIG);
1511 if (tmp & 0x01) {
1512 dev_warn(&client->dev, "Enabling temp3, "
1513 "readings might not make sense\n");
1514 w83781d_write_value(client,
1515 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1516 }
1517 }
1518
1519 if (type != w83781d) {
1520 /* enable comparator mode for temp2 and temp3 so
1521 alarm indication will work correctly */
1522 i = w83781d_read_value(client, W83781D_REG_IRQ);
1523 if (!(i & 0x40))
1524 w83781d_write_value(client, W83781D_REG_IRQ,
1525 i | 0x40);
1526 }
1527 }
1528
1529 /* Start monitoring */
1530 w83781d_write_value(client, W83781D_REG_CONFIG,
1531 (w83781d_read_value(client,
1532 W83781D_REG_CONFIG) & 0xf7)
1533 | 0x01);
1534 }
1535
1536 static struct w83781d_data *w83781d_update_device(struct device *dev)
1537 {
1538 struct i2c_client *client = to_i2c_client(dev);
1539 struct w83781d_data *data = i2c_get_clientdata(client);
1540 int i;
1541
1542 down(&data->update_lock);
1543
1544 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1545 || !data->valid) {
1546 dev_dbg(dev, "Starting device update\n");
1547
1548 for (i = 0; i <= 8; i++) {
1549 if (data->type == w83783s && i == 1)
1550 continue; /* 783S has no in1 */
1551 data->in[i] =
1552 w83781d_read_value(client, W83781D_REG_IN(i));
1553 data->in_min[i] =
1554 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1555 data->in_max[i] =
1556 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1557 if ((data->type != w83782d)
1558 && (data->type != w83627hf) && (i == 6))
1559 break;
1560 }
1561 for (i = 1; i <= 3; i++) {
1562 data->fan[i - 1] =
1563 w83781d_read_value(client, W83781D_REG_FAN(i));
1564 data->fan_min[i - 1] =
1565 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1566 }
1567 if (data->type != w83781d && data->type != as99127f) {
1568 for (i = 1; i <= 4; i++) {
1569 data->pwm[i - 1] =
1570 w83781d_read_value(client,
1571 W83781D_REG_PWM(i));
1572 if ((data->type != w83782d
1573 || i2c_is_isa_client(client))
1574 && i == 2)
1575 break;
1576 }
1577 /* Only PWM2 can be disabled */
1578 data->pwmenable[1] = (w83781d_read_value(client,
1579 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1580 }
1581
1582 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1583 data->temp_max =
1584 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1585 data->temp_max_hyst =
1586 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1587 data->temp_add[0] =
1588 w83781d_read_value(client, W83781D_REG_TEMP(2));
1589 data->temp_max_add[0] =
1590 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1591 data->temp_max_hyst_add[0] =
1592 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1593 if (data->type != w83783s) {
1594 data->temp_add[1] =
1595 w83781d_read_value(client, W83781D_REG_TEMP(3));
1596 data->temp_max_add[1] =
1597 w83781d_read_value(client,
1598 W83781D_REG_TEMP_OVER(3));
1599 data->temp_max_hyst_add[1] =
1600 w83781d_read_value(client,
1601 W83781D_REG_TEMP_HYST(3));
1602 }
1603 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1604 data->vid = i & 0x0f;
1605 data->vid |= (w83781d_read_value(client,
1606 W83781D_REG_CHIPID) & 0x01) << 4;
1607 data->fan_div[0] = (i >> 4) & 0x03;
1608 data->fan_div[1] = (i >> 6) & 0x03;
1609 data->fan_div[2] = (w83781d_read_value(client,
1610 W83781D_REG_PIN) >> 6) & 0x03;
1611 if ((data->type != w83781d) && (data->type != as99127f)) {
1612 i = w83781d_read_value(client, W83781D_REG_VBAT);
1613 data->fan_div[0] |= (i >> 3) & 0x04;
1614 data->fan_div[1] |= (i >> 4) & 0x04;
1615 data->fan_div[2] |= (i >> 5) & 0x04;
1616 }
1617 data->alarms =
1618 w83781d_read_value(client,
1619 W83781D_REG_ALARM1) +
1620 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1621 if ((data->type == w83782d) || (data->type == w83627hf)) {
1622 data->alarms |=
1623 w83781d_read_value(client,
1624 W83781D_REG_ALARM3) << 16;
1625 }
1626 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1627 data->beep_enable = i >> 7;
1628 data->beep_mask = ((i & 0x7f) << 8) +
1629 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1630 if ((data->type != w83781d) && (data->type != as99127f)) {
1631 data->beep_mask |=
1632 w83781d_read_value(client,
1633 W83781D_REG_BEEP_INTS3) << 16;
1634 }
1635 data->last_updated = jiffies;
1636 data->valid = 1;
1637 }
1638
1639 up(&data->update_lock);
1640
1641 return data;
1642 }
1643
1644 static int __init
1645 sensors_w83781d_init(void)
1646 {
1647 int res;
1648
1649 res = i2c_add_driver(&w83781d_driver);
1650 if (res)
1651 return res;
1652
1653 res = i2c_isa_add_driver(&w83781d_isa_driver);
1654 if (res) {
1655 i2c_del_driver(&w83781d_driver);
1656 return res;
1657 }
1658
1659 return 0;
1660 }
1661
1662 static void __exit
1663 sensors_w83781d_exit(void)
1664 {
1665 i2c_isa_del_driver(&w83781d_isa_driver);
1666 i2c_del_driver(&w83781d_driver);
1667 }
1668
1669 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1670 "Philip Edelbrock <phil@netroedge.com>, "
1671 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1672 MODULE_DESCRIPTION("W83781D driver");
1673 MODULE_LICENSE("GPL");
1674
1675 module_init(sensors_w83781d_init);
1676 module_exit(sensors_w83781d_exit);