1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * APM X-Gene SoC Hardware Monitoring Driver
5 * Copyright (c) 2016, Applied Micro Circuits Corporation
6 * Author: Loc Ho <lho@apm.com>
7 * Hoan Tran <hotran@apm.com>
9 * This driver provides the following features:
10 * - Retrieve CPU total power (uW)
11 * - Retrieve IO total power (uW)
12 * - Retrieve SoC temperature (milli-degree C) and alarm
14 #include <linux/acpi.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/hwmon.h>
17 #include <linux/hwmon-sysfs.h>
19 #include <linux/interrupt.h>
20 #include <linux/kfifo.h>
21 #include <linux/mailbox_controller.h>
22 #include <linux/mailbox_client.h>
23 #include <linux/module.h>
25 #include <linux/platform_device.h>
29 /* SLIMpro message defines */
30 #define MSG_TYPE_DBG 0
31 #define MSG_TYPE_ERR 7
32 #define MSG_TYPE_PWRMGMT 9
34 #define MSG_TYPE(v) (((v) & 0xF0000000) >> 28)
35 #define MSG_TYPE_SET(v) (((v) << 28) & 0xF0000000)
36 #define MSG_SUBTYPE(v) (((v) & 0x0F000000) >> 24)
37 #define MSG_SUBTYPE_SET(v) (((v) << 24) & 0x0F000000)
39 #define DBG_SUBTYPE_SENSOR_READ 4
40 #define SENSOR_RD_MSG 0x04FFE902
41 #define SENSOR_RD_EN_ADDR(a) ((a) & 0x000FFFFF)
42 #define PMD_PWR_REG 0x20
43 #define PMD_PWR_MW_REG 0x26
44 #define SOC_PWR_REG 0x21
45 #define SOC_PWR_MW_REG 0x27
46 #define SOC_TEMP_REG 0x10
48 #define TEMP_NEGATIVE_BIT 8
49 #define SENSOR_INVALID_DATA BIT(15)
51 #define PWRMGMT_SUBTYPE_TPC 1
53 #define TPC_GET_ALARM 3
54 #define TPC_CMD(v) (((v) & 0x00FF0000) >> 16)
55 #define TPC_CMD_SET(v) (((v) << 16) & 0x00FF0000)
56 #define TPC_EN_MSG(hndl, cmd, type) \
57 (MSG_TYPE_SET(MSG_TYPE_PWRMGMT) | \
58 MSG_SUBTYPE_SET(hndl) | TPC_CMD_SET(cmd) | type)
61 #define PCC_SIGNATURE_MASK 0x50424300
62 #define PCCC_GENERATE_DB_INT BIT(15)
63 #define PCCS_CMD_COMPLETE BIT(0)
64 #define PCCS_SCI_DOORBEL BIT(1)
65 #define PCCS_PLATFORM_NOTIFICATION BIT(3)
67 * Arbitrary retries in case the remote processor is slow to respond
70 #define PCC_NUM_RETRIES 500
72 #define ASYNC_MSG_FIFO_SIZE 16
73 #define MBOX_OP_TIMEOUTMS 1000
75 #define WATT_TO_mWATT(x) ((x) * 1000)
76 #define mWATT_TO_uWATT(x) ((x) * 1000)
77 #define CELSIUS_TO_mCELSIUS(x) ((x) * 1000)
79 #define to_xgene_hwmon_dev(cl) \
80 container_of(cl, struct xgene_hwmon_dev, mbox_client)
82 enum xgene_hwmon_version
{
87 struct slimpro_resp_msg
{
93 struct xgene_hwmon_dev
{
95 struct mbox_chan
*mbox_chan
;
96 struct pcc_mbox_chan
*pcc_chan
;
97 struct mbox_client mbox_client
;
100 spinlock_t kfifo_lock
;
101 struct mutex rd_mutex
;
102 struct completion rd_complete
;
104 struct slimpro_resp_msg sync_msg
;
106 struct work_struct workq
;
107 struct kfifo_rec_ptr_1 async_msg_fifo
;
109 struct device
*hwmon_dev
;
110 bool temp_critical_alarm
;
112 phys_addr_t comm_base_addr
;
118 * This function tests and clears a bitmask then returns its old value
120 static u16
xgene_word_tst_and_clr(u16
*addr
, u16 mask
)
124 val
= le16_to_cpu(READ_ONCE(*addr
));
127 WRITE_ONCE(*addr
, cpu_to_le16(val
));
132 static int xgene_hwmon_pcc_rd(struct xgene_hwmon_dev
*ctx
, u32
*msg
)
134 struct acpi_pcct_shared_memory
*generic_comm_base
= ctx
->pcc_comm_addr
;
135 u32
*ptr
= (void *)(generic_comm_base
+ 1);
139 mutex_lock(&ctx
->rd_mutex
);
140 init_completion(&ctx
->rd_complete
);
141 ctx
->resp_pending
= true;
143 /* Write signature for subspace */
144 WRITE_ONCE(generic_comm_base
->signature
,
145 cpu_to_le32(PCC_SIGNATURE_MASK
| ctx
->mbox_idx
));
147 /* Write to the shared command region */
148 WRITE_ONCE(generic_comm_base
->command
,
149 cpu_to_le16(MSG_TYPE(msg
[0]) | PCCC_GENERATE_DB_INT
));
151 /* Flip CMD COMPLETE bit */
152 val
= le16_to_cpu(READ_ONCE(generic_comm_base
->status
));
153 val
&= ~PCCS_CMD_COMPLETE
;
154 WRITE_ONCE(generic_comm_base
->status
, cpu_to_le16(val
));
156 /* Copy the message to the PCC comm space */
157 for (i
= 0; i
< sizeof(struct slimpro_resp_msg
) / 4; i
++)
158 WRITE_ONCE(ptr
[i
], cpu_to_le32(msg
[i
]));
160 /* Ring the doorbell */
161 rc
= mbox_send_message(ctx
->mbox_chan
, msg
);
163 dev_err(ctx
->dev
, "Mailbox send error %d\n", rc
);
166 if (!wait_for_completion_timeout(&ctx
->rd_complete
,
167 usecs_to_jiffies(ctx
->usecs_lat
))) {
168 dev_err(ctx
->dev
, "Mailbox operation timed out\n");
173 /* Check for error message */
174 if (MSG_TYPE(ctx
->sync_msg
.msg
) == MSG_TYPE_ERR
) {
179 msg
[0] = ctx
->sync_msg
.msg
;
180 msg
[1] = ctx
->sync_msg
.param1
;
181 msg
[2] = ctx
->sync_msg
.param2
;
184 mbox_chan_txdone(ctx
->mbox_chan
, 0);
185 ctx
->resp_pending
= false;
186 mutex_unlock(&ctx
->rd_mutex
);
190 static int xgene_hwmon_rd(struct xgene_hwmon_dev
*ctx
, u32
*msg
)
194 mutex_lock(&ctx
->rd_mutex
);
195 init_completion(&ctx
->rd_complete
);
196 ctx
->resp_pending
= true;
198 rc
= mbox_send_message(ctx
->mbox_chan
, msg
);
200 dev_err(ctx
->dev
, "Mailbox send error %d\n", rc
);
204 if (!wait_for_completion_timeout(&ctx
->rd_complete
,
205 msecs_to_jiffies(MBOX_OP_TIMEOUTMS
))) {
206 dev_err(ctx
->dev
, "Mailbox operation timed out\n");
211 /* Check for error message */
212 if (MSG_TYPE(ctx
->sync_msg
.msg
) == MSG_TYPE_ERR
) {
217 msg
[0] = ctx
->sync_msg
.msg
;
218 msg
[1] = ctx
->sync_msg
.param1
;
219 msg
[2] = ctx
->sync_msg
.param2
;
222 ctx
->resp_pending
= false;
223 mutex_unlock(&ctx
->rd_mutex
);
227 static int xgene_hwmon_reg_map_rd(struct xgene_hwmon_dev
*ctx
, u32 addr
,
233 msg
[0] = SENSOR_RD_MSG
;
234 msg
[1] = SENSOR_RD_EN_ADDR(addr
);
238 rc
= xgene_hwmon_rd(ctx
, msg
);
240 rc
= xgene_hwmon_pcc_rd(ctx
, msg
);
246 * Check if sensor data is valid.
248 if (msg
[1] & SENSOR_INVALID_DATA
)
256 static int xgene_hwmon_get_notification_msg(struct xgene_hwmon_dev
*ctx
,
262 msg
[0] = TPC_EN_MSG(PWRMGMT_SUBTYPE_TPC
, TPC_GET_ALARM
, 0);
266 rc
= xgene_hwmon_pcc_rd(ctx
, msg
);
277 static int xgene_hwmon_get_cpu_pwr(struct xgene_hwmon_dev
*ctx
, u32
*val
)
282 rc
= xgene_hwmon_reg_map_rd(ctx
, PMD_PWR_REG
, &watt
);
286 rc
= xgene_hwmon_reg_map_rd(ctx
, PMD_PWR_MW_REG
, &mwatt
);
290 *val
= WATT_TO_mWATT(watt
) + mwatt
;
294 static int xgene_hwmon_get_io_pwr(struct xgene_hwmon_dev
*ctx
, u32
*val
)
299 rc
= xgene_hwmon_reg_map_rd(ctx
, SOC_PWR_REG
, &watt
);
303 rc
= xgene_hwmon_reg_map_rd(ctx
, SOC_PWR_MW_REG
, &mwatt
);
307 *val
= WATT_TO_mWATT(watt
) + mwatt
;
311 static int xgene_hwmon_get_temp(struct xgene_hwmon_dev
*ctx
, u32
*val
)
313 return xgene_hwmon_reg_map_rd(ctx
, SOC_TEMP_REG
, val
);
317 * Sensor temperature/power functions
319 static ssize_t
temp1_input_show(struct device
*dev
,
320 struct device_attribute
*attr
,
323 struct xgene_hwmon_dev
*ctx
= dev_get_drvdata(dev
);
327 rc
= xgene_hwmon_get_temp(ctx
, &val
);
331 temp
= sign_extend32(val
, TEMP_NEGATIVE_BIT
);
333 return sysfs_emit(buf
, "%d\n", CELSIUS_TO_mCELSIUS(temp
));
336 static ssize_t
temp1_label_show(struct device
*dev
,
337 struct device_attribute
*attr
,
340 return sysfs_emit(buf
, "SoC Temperature\n");
343 static ssize_t
temp1_critical_alarm_show(struct device
*dev
,
344 struct device_attribute
*devattr
,
347 struct xgene_hwmon_dev
*ctx
= dev_get_drvdata(dev
);
349 return sysfs_emit(buf
, "%d\n", ctx
->temp_critical_alarm
);
352 static ssize_t
power1_label_show(struct device
*dev
,
353 struct device_attribute
*attr
,
356 return sysfs_emit(buf
, "CPU power\n");
359 static ssize_t
power2_label_show(struct device
*dev
,
360 struct device_attribute
*attr
,
363 return sysfs_emit(buf
, "IO power\n");
366 static ssize_t
power1_input_show(struct device
*dev
,
367 struct device_attribute
*attr
,
370 struct xgene_hwmon_dev
*ctx
= dev_get_drvdata(dev
);
374 rc
= xgene_hwmon_get_cpu_pwr(ctx
, &val
);
378 return sysfs_emit(buf
, "%u\n", mWATT_TO_uWATT(val
));
381 static ssize_t
power2_input_show(struct device
*dev
,
382 struct device_attribute
*attr
,
385 struct xgene_hwmon_dev
*ctx
= dev_get_drvdata(dev
);
389 rc
= xgene_hwmon_get_io_pwr(ctx
, &val
);
393 return sysfs_emit(buf
, "%u\n", mWATT_TO_uWATT(val
));
396 static DEVICE_ATTR_RO(temp1_label
);
397 static DEVICE_ATTR_RO(temp1_input
);
398 static DEVICE_ATTR_RO(temp1_critical_alarm
);
399 static DEVICE_ATTR_RO(power1_label
);
400 static DEVICE_ATTR_RO(power1_input
);
401 static DEVICE_ATTR_RO(power2_label
);
402 static DEVICE_ATTR_RO(power2_input
);
404 static struct attribute
*xgene_hwmon_attrs
[] = {
405 &dev_attr_temp1_label
.attr
,
406 &dev_attr_temp1_input
.attr
,
407 &dev_attr_temp1_critical_alarm
.attr
,
408 &dev_attr_power1_label
.attr
,
409 &dev_attr_power1_input
.attr
,
410 &dev_attr_power2_label
.attr
,
411 &dev_attr_power2_input
.attr
,
415 ATTRIBUTE_GROUPS(xgene_hwmon
);
417 static int xgene_hwmon_tpc_alarm(struct xgene_hwmon_dev
*ctx
,
418 struct slimpro_resp_msg
*amsg
)
420 ctx
->temp_critical_alarm
= !!amsg
->param2
;
421 sysfs_notify(&ctx
->dev
->kobj
, NULL
, "temp1_critical_alarm");
426 static void xgene_hwmon_process_pwrmsg(struct xgene_hwmon_dev
*ctx
,
427 struct slimpro_resp_msg
*amsg
)
429 if ((MSG_SUBTYPE(amsg
->msg
) == PWRMGMT_SUBTYPE_TPC
) &&
430 (TPC_CMD(amsg
->msg
) == TPC_ALARM
))
431 xgene_hwmon_tpc_alarm(ctx
, amsg
);
435 * This function is called to process async work queue
437 static void xgene_hwmon_evt_work(struct work_struct
*work
)
439 struct slimpro_resp_msg amsg
;
440 struct xgene_hwmon_dev
*ctx
;
443 ctx
= container_of(work
, struct xgene_hwmon_dev
, workq
);
444 while (kfifo_out_spinlocked(&ctx
->async_msg_fifo
, &amsg
,
445 sizeof(struct slimpro_resp_msg
),
448 * If PCC, send a consumer command to Platform to get info
449 * If Slimpro Mailbox, get message from specific FIFO
451 if (!acpi_disabled
) {
452 ret
= xgene_hwmon_get_notification_msg(ctx
,
458 if (MSG_TYPE(amsg
.msg
) == MSG_TYPE_PWRMGMT
)
459 xgene_hwmon_process_pwrmsg(ctx
, &amsg
);
463 static int xgene_hwmon_rx_ready(struct xgene_hwmon_dev
*ctx
, void *msg
)
465 if (IS_ERR_OR_NULL(ctx
->hwmon_dev
) && !ctx
->resp_pending
) {
466 /* Enqueue to the FIFO */
467 kfifo_in_spinlocked(&ctx
->async_msg_fifo
, msg
,
468 sizeof(struct slimpro_resp_msg
),
477 * This function is called when the SLIMpro Mailbox received a message
479 static void xgene_hwmon_rx_cb(struct mbox_client
*cl
, void *msg
)
481 struct xgene_hwmon_dev
*ctx
= to_xgene_hwmon_dev(cl
);
484 * While the driver registers with the mailbox framework, an interrupt
485 * can be pending before the probe function completes its
486 * initialization. If such condition occurs, just queue up the message
487 * as the driver is not ready for servicing the callback.
489 if (xgene_hwmon_rx_ready(ctx
, msg
) < 0)
493 * Response message format:
494 * msg[0] is the return code of the operation
495 * msg[1] is the first parameter word
496 * msg[2] is the second parameter word
498 * As message only supports dword size, just assign it.
501 /* Check for sync query */
502 if (ctx
->resp_pending
&&
503 ((MSG_TYPE(((u32
*)msg
)[0]) == MSG_TYPE_ERR
) ||
504 (MSG_TYPE(((u32
*)msg
)[0]) == MSG_TYPE_DBG
&&
505 MSG_SUBTYPE(((u32
*)msg
)[0]) == DBG_SUBTYPE_SENSOR_READ
) ||
506 (MSG_TYPE(((u32
*)msg
)[0]) == MSG_TYPE_PWRMGMT
&&
507 MSG_SUBTYPE(((u32
*)msg
)[0]) == PWRMGMT_SUBTYPE_TPC
&&
508 TPC_CMD(((u32
*)msg
)[0]) == TPC_ALARM
))) {
509 ctx
->sync_msg
.msg
= ((u32
*)msg
)[0];
510 ctx
->sync_msg
.param1
= ((u32
*)msg
)[1];
511 ctx
->sync_msg
.param2
= ((u32
*)msg
)[2];
513 /* Operation waiting for response */
514 complete(&ctx
->rd_complete
);
519 /* Enqueue to the FIFO */
520 kfifo_in_spinlocked(&ctx
->async_msg_fifo
, msg
,
521 sizeof(struct slimpro_resp_msg
), &ctx
->kfifo_lock
);
522 /* Schedule the bottom handler */
523 schedule_work(&ctx
->workq
);
527 * This function is called when the PCC Mailbox received a message
529 static void xgene_hwmon_pcc_rx_cb(struct mbox_client
*cl
, void *msg
)
531 struct xgene_hwmon_dev
*ctx
= to_xgene_hwmon_dev(cl
);
532 struct acpi_pcct_shared_memory
*generic_comm_base
= ctx
->pcc_comm_addr
;
533 struct slimpro_resp_msg amsg
;
536 * While the driver registers with the mailbox framework, an interrupt
537 * can be pending before the probe function completes its
538 * initialization. If such condition occurs, just queue up the message
539 * as the driver is not ready for servicing the callback.
541 if (xgene_hwmon_rx_ready(ctx
, &amsg
) < 0)
544 msg
= generic_comm_base
+ 1;
545 /* Check if platform sends interrupt */
546 if (!xgene_word_tst_and_clr(&generic_comm_base
->status
,
551 * Response message format:
552 * msg[0] is the return code of the operation
553 * msg[1] is the first parameter word
554 * msg[2] is the second parameter word
556 * As message only supports dword size, just assign it.
559 /* Check for sync query */
560 if (ctx
->resp_pending
&&
561 ((MSG_TYPE(((u32
*)msg
)[0]) == MSG_TYPE_ERR
) ||
562 (MSG_TYPE(((u32
*)msg
)[0]) == MSG_TYPE_DBG
&&
563 MSG_SUBTYPE(((u32
*)msg
)[0]) == DBG_SUBTYPE_SENSOR_READ
) ||
564 (MSG_TYPE(((u32
*)msg
)[0]) == MSG_TYPE_PWRMGMT
&&
565 MSG_SUBTYPE(((u32
*)msg
)[0]) == PWRMGMT_SUBTYPE_TPC
&&
566 TPC_CMD(((u32
*)msg
)[0]) == TPC_ALARM
))) {
567 /* Check if platform completes command */
568 if (xgene_word_tst_and_clr(&generic_comm_base
->status
,
569 PCCS_CMD_COMPLETE
)) {
570 ctx
->sync_msg
.msg
= ((u32
*)msg
)[0];
571 ctx
->sync_msg
.param1
= ((u32
*)msg
)[1];
572 ctx
->sync_msg
.param2
= ((u32
*)msg
)[2];
574 /* Operation waiting for response */
575 complete(&ctx
->rd_complete
);
582 * Platform notifies interrupt to OSPM.
583 * OPSM schedules a consumer command to get this information
584 * in a workqueue. Platform must wait until OSPM has issued
585 * a consumer command that serves this notification.
588 /* Enqueue to the FIFO */
589 kfifo_in_spinlocked(&ctx
->async_msg_fifo
, &amsg
,
590 sizeof(struct slimpro_resp_msg
), &ctx
->kfifo_lock
);
591 /* Schedule the bottom handler */
592 schedule_work(&ctx
->workq
);
595 static void xgene_hwmon_tx_done(struct mbox_client
*cl
, void *msg
, int ret
)
598 dev_dbg(cl
->dev
, "TX did not complete: CMD sent:%x, ret:%d\n",
601 dev_dbg(cl
->dev
, "TX completed. CMD sent:%x, ret:%d\n",
607 static const struct acpi_device_id xgene_hwmon_acpi_match
[] = {
608 {"APMC0D29", XGENE_HWMON_V1
},
609 {"APMC0D8A", XGENE_HWMON_V2
},
612 MODULE_DEVICE_TABLE(acpi
, xgene_hwmon_acpi_match
);
615 static int xgene_hwmon_probe(struct platform_device
*pdev
)
617 struct xgene_hwmon_dev
*ctx
;
618 struct mbox_client
*cl
;
621 ctx
= devm_kzalloc(&pdev
->dev
, sizeof(*ctx
), GFP_KERNEL
);
625 ctx
->dev
= &pdev
->dev
;
626 platform_set_drvdata(pdev
, ctx
);
627 cl
= &ctx
->mbox_client
;
629 spin_lock_init(&ctx
->kfifo_lock
);
630 mutex_init(&ctx
->rd_mutex
);
632 rc
= kfifo_alloc(&ctx
->async_msg_fifo
,
633 sizeof(struct slimpro_resp_msg
) * ASYNC_MSG_FIFO_SIZE
,
638 INIT_WORK(&ctx
->workq
, xgene_hwmon_evt_work
);
640 /* Request mailbox channel */
641 cl
->dev
= &pdev
->dev
;
642 cl
->tx_done
= xgene_hwmon_tx_done
;
643 cl
->tx_block
= false;
644 cl
->tx_tout
= MBOX_OP_TIMEOUTMS
;
645 cl
->knows_txdone
= false;
647 cl
->rx_callback
= xgene_hwmon_rx_cb
;
648 ctx
->mbox_chan
= mbox_request_channel(cl
, 0);
649 if (IS_ERR(ctx
->mbox_chan
)) {
651 "SLIMpro mailbox channel request failed\n");
656 struct pcc_mbox_chan
*pcc_chan
;
657 const struct acpi_device_id
*acpi_id
;
660 acpi_id
= acpi_match_device(pdev
->dev
.driver
->acpi_match_table
,
667 version
= (int)acpi_id
->driver_data
;
669 if (device_property_read_u32(&pdev
->dev
, "pcc-channel",
671 dev_err(&pdev
->dev
, "no pcc-channel property\n");
676 cl
->rx_callback
= xgene_hwmon_pcc_rx_cb
;
677 pcc_chan
= pcc_mbox_request_channel(cl
, ctx
->mbox_idx
);
678 if (IS_ERR(pcc_chan
)) {
680 "PPC channel request failed\n");
685 ctx
->pcc_chan
= pcc_chan
;
686 ctx
->mbox_chan
= pcc_chan
->mchan
;
688 if (!ctx
->mbox_chan
->mbox
->txdone_irq
) {
689 dev_err(&pdev
->dev
, "PCC IRQ not supported\n");
695 * This is the shared communication region
696 * for the OS and Platform to communicate over.
698 ctx
->comm_base_addr
= pcc_chan
->shmem_base_addr
;
699 if (ctx
->comm_base_addr
) {
700 if (version
== XGENE_HWMON_V2
)
701 ctx
->pcc_comm_addr
= (void __force
*)devm_ioremap(&pdev
->dev
,
703 pcc_chan
->shmem_size
);
705 ctx
->pcc_comm_addr
= devm_memremap(&pdev
->dev
,
707 pcc_chan
->shmem_size
,
710 dev_err(&pdev
->dev
, "Failed to get PCC comm region\n");
715 if (!ctx
->pcc_comm_addr
) {
717 "Failed to ioremap PCC comm region\n");
723 * pcc_chan->latency is just a Nominal value. In reality
724 * the remote processor could be much slower to reply.
725 * So add an arbitrary amount of wait on top of Nominal.
727 ctx
->usecs_lat
= PCC_NUM_RETRIES
* pcc_chan
->latency
;
730 ctx
->hwmon_dev
= hwmon_device_register_with_groups(ctx
->dev
,
734 if (IS_ERR(ctx
->hwmon_dev
)) {
735 dev_err(&pdev
->dev
, "Failed to register HW monitor device\n");
736 rc
= PTR_ERR(ctx
->hwmon_dev
);
741 * Schedule the bottom handler if there is a pending message.
743 schedule_work(&ctx
->workq
);
745 dev_info(&pdev
->dev
, "APM X-Gene SoC HW monitor driver registered\n");
751 mbox_free_channel(ctx
->mbox_chan
);
753 pcc_mbox_free_channel(ctx
->pcc_chan
);
755 kfifo_free(&ctx
->async_msg_fifo
);
760 static int xgene_hwmon_remove(struct platform_device
*pdev
)
762 struct xgene_hwmon_dev
*ctx
= platform_get_drvdata(pdev
);
764 cancel_work_sync(&ctx
->workq
);
765 hwmon_device_unregister(ctx
->hwmon_dev
);
766 kfifo_free(&ctx
->async_msg_fifo
);
768 mbox_free_channel(ctx
->mbox_chan
);
770 pcc_mbox_free_channel(ctx
->pcc_chan
);
775 static const struct of_device_id xgene_hwmon_of_match
[] = {
776 {.compatible
= "apm,xgene-slimpro-hwmon"},
779 MODULE_DEVICE_TABLE(of
, xgene_hwmon_of_match
);
781 static struct platform_driver xgene_hwmon_driver
= {
782 .probe
= xgene_hwmon_probe
,
783 .remove
= xgene_hwmon_remove
,
785 .name
= "xgene-slimpro-hwmon",
786 .of_match_table
= xgene_hwmon_of_match
,
787 .acpi_match_table
= ACPI_PTR(xgene_hwmon_acpi_match
),
790 module_platform_driver(xgene_hwmon_driver
);
792 MODULE_DESCRIPTION("APM X-Gene SoC hardware monitor");
793 MODULE_LICENSE("GPL");