drivers/hwspinlock/Kconfig

   1 #
   2 # Generic HWSPINLOCK framework
   3 #
   4
   5 menuconfig HWSPINLOCK
   6         tristate "Hardware Spinlock drivers"
   7
   8 config HWSPINLOCK_OMAP
   9         tristate "OMAP Hardware Spinlock device"
  10         depends on HWSPINLOCK
  11         depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX
  12         help
  13           Say y here to support the OMAP Hardware Spinlock device (firstly
  14           introduced in OMAP4).
  15
  16           If unsure, say N.
  17
  18 config HWSPINLOCK_QCOM
  19         tristate "Qualcomm Hardware Spinlock device"
  20         depends on HWSPINLOCK
  21         depends on ARCH_QCOM
  22         select MFD_SYSCON
  23         help
  24           Say y here to support the Qualcomm Hardware Mutex functionality, which
  25           provides a synchronisation mechanism for the various processors on
  26           the SoC.
  27
  28           If unsure, say N.
  29
  30 config HWSPINLOCK_SIRF
  31         tristate "SIRF Hardware Spinlock device"
  32         depends on HWSPINLOCK
  33         depends on ARCH_SIRF
  34         help
  35           Say y here to support the SIRF Hardware Spinlock device, which
  36           provides a synchronisation mechanism for the various processors
  37           on the SoC.
  38
  39           It's safe to say n here if you're not interested in SIRF hardware
  40           spinlock or just want a bare minimum kernel.
  41
  42 config HWSPINLOCK_SPRD
  43         tristate "SPRD Hardware Spinlock device"
  44         depends on ARCH_SPRD
  45         depends on HWSPINLOCK
  46         help
  47           Say y here to support the SPRD Hardware Spinlock device.
  48
  49           If unsure, say N.
  50
  51 config HSEM_U8500
  52         tristate "STE Hardware Semaphore functionality"
  53         depends on HWSPINLOCK
  54         depends on ARCH_U8500
  55         help
  56           Say y here to support the STE Hardware Semaphore functionality, which
  57           provides a synchronisation mechanism for the various processor on the
  58           SoC.
  59
  60           If unsure, say N.