drivers/i2c/busses/i2c-bcm2835.c

   1 /*
   2  * BCM2835 master mode driver
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/completion.h>
  16 #include <linux/err.h>
  17 #include <linux/i2c.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/io.h>
  20 #include <linux/module.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/slab.h>
  23
  24 #define BCM2835_I2C_C           0x0
  25 #define BCM2835_I2C_S           0x4
  26 #define BCM2835_I2C_DLEN        0x8
  27 #define BCM2835_I2C_A           0xc
  28 #define BCM2835_I2C_FIFO        0x10
  29 #define BCM2835_I2C_DIV         0x14
  30 #define BCM2835_I2C_DEL         0x18
  31 #define BCM2835_I2C_CLKT        0x1c
  32
  33 #define BCM2835_I2C_C_READ      BIT(0)
  34 #define BCM2835_I2C_C_CLEAR     BIT(4) /* bits 4 and 5 both clear */
  35 #define BCM2835_I2C_C_ST        BIT(7)
  36 #define BCM2835_I2C_C_INTD      BIT(8)
  37 #define BCM2835_I2C_C_INTT      BIT(9)
  38 #define BCM2835_I2C_C_INTR      BIT(10)
  39 #define BCM2835_I2C_C_I2CEN     BIT(15)
  40
  41 #define BCM2835_I2C_S_TA        BIT(0)
  42 #define BCM2835_I2C_S_DONE      BIT(1)
  43 #define BCM2835_I2C_S_TXW       BIT(2)
  44 #define BCM2835_I2C_S_RXR       BIT(3)
  45 #define BCM2835_I2C_S_TXD       BIT(4)
  46 #define BCM2835_I2C_S_RXD       BIT(5)
  47 #define BCM2835_I2C_S_TXE       BIT(6)
  48 #define BCM2835_I2C_S_RXF       BIT(7)
  49 #define BCM2835_I2C_S_ERR       BIT(8)
  50 #define BCM2835_I2C_S_CLKT      BIT(9)
  51 #define BCM2835_I2C_S_LEN       BIT(10) /* Fake bit for SW error reporting */
  52
  53 #define BCM2835_I2C_CDIV_MIN    0x0002
  54 #define BCM2835_I2C_CDIV_MAX    0xFFFE
  55
  56 struct bcm2835_i2c_dev {
  57         struct device *dev;
  58         void __iomem *regs;
  59         struct clk *clk;
  60         int irq;
  61         u32 bus_clk_rate;
  62         struct i2c_adapter adapter;
  63         struct completion completion;
  64         struct i2c_msg *curr_msg;
  65         int num_msgs;
  66         u32 msg_err;
  67         u8 *msg_buf;
  68         size_t msg_buf_remaining;
  69 };
  70
  71 static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev,
  72                                       u32 reg, u32 val)
  73 {
  74         writel(val, i2c_dev->regs + reg);
  75 }
  76
  77 static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
  78 {
  79         return readl(i2c_dev->regs + reg);
  80 }
  81
  82 static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
  83 {
  84         u32 divider;
  85
  86         divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
  87                                i2c_dev->bus_clk_rate);
  88         /*
  89          * Per the datasheet, the register is always interpreted as an even
  90          * number, by rounding down. In other words, the LSB is ignored. So,
  91          * if the LSB is set, increment the divider to avoid any issue.
  92          */
  93         if (divider & 1)
  94                 divider++;
  95         if ((divider < BCM2835_I2C_CDIV_MIN) ||
  96             (divider > BCM2835_I2C_CDIV_MAX)) {
  97                 dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
  98                 return -EINVAL;
  99         }
 100
 101         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
 102
 103         return 0;
 104 }
 105
 106 static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
 107 {
 108         u32 val;
 109
 110         while (i2c_dev->msg_buf_remaining) {
 111                 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 112                 if (!(val & BCM2835_I2C_S_TXD))
 113                         break;
 114                 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_FIFO,
 115                                    *i2c_dev->msg_buf);
 116                 i2c_dev->msg_buf++;
 117                 i2c_dev->msg_buf_remaining--;
 118         }
 119 }
 120
 121 static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
 122 {
 123         u32 val;
 124
 125         while (i2c_dev->msg_buf_remaining) {
 126                 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 127                 if (!(val & BCM2835_I2C_S_RXD))
 128                         break;
 129                 *i2c_dev->msg_buf = bcm2835_i2c_readl(i2c_dev,
 130                                                       BCM2835_I2C_FIFO);
 131                 i2c_dev->msg_buf++;
 132                 i2c_dev->msg_buf_remaining--;
 133         }
 134 }
 135
 136 /*
 137  * Repeated Start Condition (Sr)
 138  * The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
 139  * talks about reading from a slave with 10 bit address. This is achieved by
 140  * issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
 141  * issue a read.
 142  * A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
 143  * firmware actually does it using polling and says that it's a workaround for
 144  * a problem in the state machine.
 145  * It turns out that it is possible to use the TXW interrupt to know when the
 146  * transfer is active, provided the FIFO has not been prefilled.
 147  */
 148
 149 static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
 150 {
 151         u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN;
 152         struct i2c_msg *msg = i2c_dev->curr_msg;
 153         bool last_msg = (i2c_dev->num_msgs == 1);
 154
 155         if (!i2c_dev->num_msgs)
 156                 return;
 157
 158         i2c_dev->num_msgs--;
 159         i2c_dev->msg_buf = msg->buf;
 160         i2c_dev->msg_buf_remaining = msg->len;
 161
 162         if (msg->flags & I2C_M_RD)
 163                 c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
 164         else
 165                 c |= BCM2835_I2C_C_INTT;
 166
 167         if (last_msg)
 168                 c |= BCM2835_I2C_C_INTD;
 169
 170         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
 171         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
 172         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
 173 }
 174
 175 /*
 176  * Note about I2C_C_CLEAR on error:
 177  * The I2C_C_CLEAR on errors will take some time to resolve -- if you were in
 178  * non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through
 179  * the state machine to send a NACK and a STOP. Since we're setting CLEAR
 180  * without I2CEN, that NACK will be hanging around queued up for next time
 181  * we start the engine.
 182  */
 183
 184 static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
 185 {
 186         struct bcm2835_i2c_dev *i2c_dev = data;
 187         u32 val, err;
 188
 189         val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 190
 191         err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
 192         if (err) {
 193                 i2c_dev->msg_err = err;
 194                 goto complete;
 195         }
 196
 197         if (val & BCM2835_I2C_S_DONE) {
 198                 if (i2c_dev->curr_msg->flags & I2C_M_RD) {
 199                         bcm2835_drain_rxfifo(i2c_dev);
 200                         val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
 201                 }
 202
 203                 if ((val & BCM2835_I2C_S_RXD) || i2c_dev->msg_buf_remaining)
 204                         i2c_dev->msg_err = BCM2835_I2C_S_LEN;
 205                 else
 206                         i2c_dev->msg_err = 0;
 207                 goto complete;
 208         }
 209
 210         if (val & BCM2835_I2C_S_TXW) {
 211                 if (!i2c_dev->msg_buf_remaining) {
 212                         i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
 213                         goto complete;
 214                 }
 215
 216                 bcm2835_fill_txfifo(i2c_dev);
 217
 218                 if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) {
 219                         i2c_dev->curr_msg++;
 220                         bcm2835_i2c_start_transfer(i2c_dev);
 221                 }
 222
 223                 return IRQ_HANDLED;
 224         }
 225
 226         if (val & BCM2835_I2C_S_RXR) {
 227                 if (!i2c_dev->msg_buf_remaining) {
 228                         i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
 229                         goto complete;
 230                 }
 231
 232                 bcm2835_drain_rxfifo(i2c_dev);
 233                 return IRQ_HANDLED;
 234         }
 235
 236         return IRQ_NONE;
 237
 238 complete:
 239         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
 240         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, BCM2835_I2C_S_CLKT |
 241                            BCM2835_I2C_S_ERR | BCM2835_I2C_S_DONE);
 242         complete(&i2c_dev->completion);
 243
 244         return IRQ_HANDLED;
 245 }
 246
 247 static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
 248                             int num)
 249 {
 250         struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
 251         unsigned long time_left;
 252         int i, ret;
 253
 254         for (i = 0; i < (num - 1); i++)
 255                 if (msgs[i].flags & I2C_M_RD) {
 256                         dev_warn_once(i2c_dev->dev,
 257                                       "only one read message supported, has to be last\n");
 258                         return -EOPNOTSUPP;
 259                 }
 260
 261         ret = bcm2835_i2c_set_divider(i2c_dev);
 262         if (ret)
 263                 return ret;
 264
 265         i2c_dev->curr_msg = msgs;
 266         i2c_dev->num_msgs = num;
 267         reinit_completion(&i2c_dev->completion);
 268
 269         bcm2835_i2c_start_transfer(i2c_dev);
 270
 271         time_left = wait_for_completion_timeout(&i2c_dev->completion,
 272                                                 adap->timeout);
 273         if (!time_left) {
 274                 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C,
 275                                    BCM2835_I2C_C_CLEAR);
 276                 dev_err(i2c_dev->dev, "i2c transfer timed out\n");
 277                 return -ETIMEDOUT;
 278         }
 279
 280         if (!i2c_dev->msg_err)
 281                 return num;
 282
 283         dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
 284
 285         if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
 286                 return -EREMOTEIO;
 287
 288         return -EIO;
 289 }
 290
 291 static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
 292 {
 293         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 294 }
 295
 296 static const struct i2c_algorithm bcm2835_i2c_algo = {
 297         .master_xfer    = bcm2835_i2c_xfer,
 298         .functionality  = bcm2835_i2c_func,
 299 };
 300
 301 /*
 302  * This HW was reported to have problems with clock stretching:
 303  * http://www.advamation.com/knowhow/raspberrypi/rpi-i2c-bug.html
 304  * https://www.raspberrypi.org/forums/viewtopic.php?p=146272
 305  */
 306 static const struct i2c_adapter_quirks bcm2835_i2c_quirks = {
 307         .flags = I2C_AQ_NO_CLK_STRETCH,
 308 };
 309
 310 static int bcm2835_i2c_probe(struct platform_device *pdev)
 311 {
 312         struct bcm2835_i2c_dev *i2c_dev;
 313         struct resource *mem, *irq;
 314         int ret;
 315         struct i2c_adapter *adap;
 316
 317         i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
 318         if (!i2c_dev)
 319                 return -ENOMEM;
 320         platform_set_drvdata(pdev, i2c_dev);
 321         i2c_dev->dev = &pdev->dev;
 322         init_completion(&i2c_dev->completion);
 323
 324         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 325         i2c_dev->regs = devm_ioremap_resource(&pdev->dev, mem);
 326         if (IS_ERR(i2c_dev->regs))
 327                 return PTR_ERR(i2c_dev->regs);
 328
 329         i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
 330         if (IS_ERR(i2c_dev->clk)) {
 331                 if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER)
 332                         dev_err(&pdev->dev, "Could not get clock\n");
 333                 return PTR_ERR(i2c_dev->clk);
 334         }
 335
 336         ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
 337                                    &i2c_dev->bus_clk_rate);
 338         if (ret < 0) {
 339                 dev_warn(&pdev->dev,
 340                          "Could not read clock-frequency property\n");
 341                 i2c_dev->bus_clk_rate = 100000;
 342         }
 343
 344         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 345         if (!irq) {
 346                 dev_err(&pdev->dev, "No IRQ resource\n");
 347                 return -ENODEV;
 348         }
 349         i2c_dev->irq = irq->start;
 350
 351         ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED,
 352                           dev_name(&pdev->dev), i2c_dev);
 353         if (ret) {
 354                 dev_err(&pdev->dev, "Could not request IRQ\n");
 355                 return -ENODEV;
 356         }
 357
 358         adap = &i2c_dev->adapter;
 359         i2c_set_adapdata(adap, i2c_dev);
 360         adap->owner = THIS_MODULE;
 361         adap->class = I2C_CLASS_DEPRECATED;
 362         strlcpy(adap->name, "bcm2835 I2C adapter", sizeof(adap->name));
 363         adap->algo = &bcm2835_i2c_algo;
 364         adap->dev.parent = &pdev->dev;
 365         adap->dev.of_node = pdev->dev.of_node;
 366         adap->quirks = &bcm2835_i2c_quirks;
 367
 368         bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
 369
 370         ret = i2c_add_adapter(adap);
 371         if (ret)
 372                 free_irq(i2c_dev->irq, i2c_dev);
 373
 374         return ret;
 375 }
 376
 377 static int bcm2835_i2c_remove(struct platform_device *pdev)
 378 {
 379         struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
 380
 381         free_irq(i2c_dev->irq, i2c_dev);
 382         i2c_del_adapter(&i2c_dev->adapter);
 383
 384         return 0;
 385 }
 386
 387 static const struct of_device_id bcm2835_i2c_of_match[] = {
 388         { .compatible = "brcm,bcm2835-i2c" },
 389         {},
 390 };
 391 MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match);
 392
 393 static struct platform_driver bcm2835_i2c_driver = {
 394         .probe          = bcm2835_i2c_probe,
 395         .remove         = bcm2835_i2c_remove,
 396         .driver         = {
 397                 .name   = "i2c-bcm2835",
 398                 .of_match_table = bcm2835_i2c_of_match,
 399         },
 400 };
 401 module_platform_driver(bcm2835_i2c_driver);
 402
 403 MODULE_AUTHOR("Stephen Warren <swarren@wwwdotorg.org>");
 404 MODULE_DESCRIPTION("BCM2835 I2C bus adapter");
 405 MODULE_LICENSE("GPL v2");
 406 MODULE_ALIAS("platform:i2c-bcm2835");