]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/i2c/busses/i2c-designware-core.h
efi/arm: Fix boot crash with CONFIG_CPUMASK_OFFSTACK=y
[mirror_ubuntu-artful-kernel.git] / drivers / i2c / busses / i2c-designware-core.h
1 /*
2 * Synopsys DesignWare I2C adapter driver (master only).
3 *
4 * Based on the TI DAVINCI I2C adapter driver.
5 *
6 * Copyright (C) 2006 Texas Instruments.
7 * Copyright (C) 2007 MontaVista Software Inc.
8 * Copyright (C) 2009 Provigent Ltd.
9 *
10 * ----------------------------------------------------------------------------
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 * ----------------------------------------------------------------------------
22 *
23 */
24
25 #include <linux/i2c.h>
26
27 #define DW_IC_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C | \
28 I2C_FUNC_SMBUS_BYTE | \
29 I2C_FUNC_SMBUS_BYTE_DATA | \
30 I2C_FUNC_SMBUS_WORD_DATA | \
31 I2C_FUNC_SMBUS_BLOCK_DATA | \
32 I2C_FUNC_SMBUS_I2C_BLOCK)
33
34 #define DW_IC_CON_MASTER 0x1
35 #define DW_IC_CON_SPEED_STD 0x2
36 #define DW_IC_CON_SPEED_FAST 0x4
37 #define DW_IC_CON_SPEED_HIGH 0x6
38 #define DW_IC_CON_SPEED_MASK 0x6
39 #define DW_IC_CON_10BITADDR_MASTER 0x10
40 #define DW_IC_CON_RESTART_EN 0x20
41 #define DW_IC_CON_SLAVE_DISABLE 0x40
42
43
44 /**
45 * struct dw_i2c_dev - private i2c-designware data
46 * @dev: driver model device node
47 * @base: IO registers pointer
48 * @cmd_complete: tx completion indicator
49 * @clk: input reference clock
50 * @cmd_err: run time hadware error code
51 * @msgs: points to an array of messages currently being transfered
52 * @msgs_num: the number of elements in msgs
53 * @msg_write_idx: the element index of the current tx message in the msgs
54 * array
55 * @tx_buf_len: the length of the current tx buffer
56 * @tx_buf: the current tx buffer
57 * @msg_read_idx: the element index of the current rx message in the msgs
58 * array
59 * @rx_buf_len: the length of the current rx buffer
60 * @rx_buf: the current rx buffer
61 * @msg_err: error status of the current transfer
62 * @status: i2c master status, one of STATUS_*
63 * @abort_source: copy of the TX_ABRT_SOURCE register
64 * @irq: interrupt number for the i2c master
65 * @adapter: i2c subsystem adapter node
66 * @tx_fifo_depth: depth of the hardware tx fifo
67 * @rx_fifo_depth: depth of the hardware rx fifo
68 * @rx_outstanding: current master-rx elements in tx fifo
69 * @clk_freq: bus clock frequency
70 * @ss_hcnt: standard speed HCNT value
71 * @ss_lcnt: standard speed LCNT value
72 * @fs_hcnt: fast speed HCNT value
73 * @fs_lcnt: fast speed LCNT value
74 * @fp_hcnt: fast plus HCNT value
75 * @fp_lcnt: fast plus LCNT value
76 * @hs_hcnt: high speed HCNT value
77 * @hs_lcnt: high speed LCNT value
78 * @acquire_lock: function to acquire a hardware lock on the bus
79 * @release_lock: function to release a hardware lock on the bus
80 * @pm_runtime_disabled: true if pm runtime is disabled
81 *
82 * HCNT and LCNT parameters can be used if the platform knows more accurate
83 * values than the one computed based only on the input clock frequency.
84 * Leave them to be %0 if not used.
85 */
86 struct dw_i2c_dev {
87 struct device *dev;
88 void __iomem *base;
89 struct completion cmd_complete;
90 struct clk *clk;
91 u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
92 struct dw_pci_controller *controller;
93 int cmd_err;
94 struct i2c_msg *msgs;
95 int msgs_num;
96 int msg_write_idx;
97 u32 tx_buf_len;
98 u8 *tx_buf;
99 int msg_read_idx;
100 u32 rx_buf_len;
101 u8 *rx_buf;
102 int msg_err;
103 unsigned int status;
104 u32 abort_source;
105 int irq;
106 u32 accessor_flags;
107 struct i2c_adapter adapter;
108 u32 functionality;
109 u32 master_cfg;
110 unsigned int tx_fifo_depth;
111 unsigned int rx_fifo_depth;
112 int rx_outstanding;
113 u32 clk_freq;
114 u32 sda_hold_time;
115 u32 sda_falling_time;
116 u32 scl_falling_time;
117 u16 ss_hcnt;
118 u16 ss_lcnt;
119 u16 fs_hcnt;
120 u16 fs_lcnt;
121 u16 fp_hcnt;
122 u16 fp_lcnt;
123 u16 hs_hcnt;
124 u16 hs_lcnt;
125 int (*acquire_lock)(struct dw_i2c_dev *dev);
126 void (*release_lock)(struct dw_i2c_dev *dev);
127 bool pm_runtime_disabled;
128 };
129
130 #define ACCESS_SWAP 0x00000001
131 #define ACCESS_16BIT 0x00000002
132 #define ACCESS_INTR_MASK 0x00000004
133
134 extern int i2c_dw_init(struct dw_i2c_dev *dev);
135 extern void i2c_dw_disable(struct dw_i2c_dev *dev);
136 extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
137 extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);
138 extern int i2c_dw_probe(struct dw_i2c_dev *dev);
139
140 #if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL)
141 extern int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev);
142 #else
143 static inline int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev) { return 0; }
144 #endif