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softlockup: fix watchdog task wakeup frequency
[mirror_ubuntu-hirsute-kernel.git] / drivers / i2c / busses / i2c-ibm_iic.c
1 /*
2 * drivers/i2c/busses/i2c-ibm_iic.c
3 *
4 * Support for the IIC peripheral on IBM PPC 4xx
5 *
6 * Copyright (c) 2003, 2004 Zultys Technologies.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 *
9 * Copyright (c) 2008 PIKA Technologies
10 * Sean MacLennan <smaclennan@pikatech.com>
11 *
12 * Based on original work by
13 * Ian DaSilva <idasilva@mvista.com>
14 * Armin Kuster <akuster@mvista.com>
15 * Matt Porter <mporter@mvista.com>
16 *
17 * Copyright 2000-2003 MontaVista Software Inc.
18 *
19 * Original driver version was highly leveraged from i2c-elektor.c
20 *
21 * Copyright 1995-97 Simon G. Vogl
22 * 1998-99 Hans Berglund
23 *
24 * With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi>
25 * and even Frodo Looijaard <frodol@dds.nl>
26 *
27 * This program is free software; you can redistribute it and/or modify it
28 * under the terms of the GNU General Public License as published by the
29 * Free Software Foundation; either version 2 of the License, or (at your
30 * option) any later version.
31 *
32 */
33
34 #include <linux/module.h>
35 #include <linux/kernel.h>
36 #include <linux/ioport.h>
37 #include <linux/delay.h>
38 #include <linux/slab.h>
39 #include <linux/init.h>
40 #include <linux/interrupt.h>
41 #include <asm/irq.h>
42 #include <asm/io.h>
43 #include <linux/i2c.h>
44 #include <linux/i2c-id.h>
45
46 #ifdef CONFIG_IBM_OCP
47 #include <asm/ocp.h>
48 #include <asm/ibm4xx.h>
49 #else
50 #include <linux/of_platform.h>
51 #endif
52
53 #include "i2c-ibm_iic.h"
54
55 #define DRIVER_VERSION "2.2"
56
57 MODULE_DESCRIPTION("IBM IIC driver v" DRIVER_VERSION);
58 MODULE_LICENSE("GPL");
59
60 static int iic_force_poll;
61 module_param(iic_force_poll, bool, 0);
62 MODULE_PARM_DESC(iic_force_poll, "Force polling mode");
63
64 static int iic_force_fast;
65 module_param(iic_force_fast, bool, 0);
66 MODULE_PARM_DESC(iic_force_fast, "Force fast mode (400 kHz)");
67
68 #define DBG_LEVEL 0
69
70 #ifdef DBG
71 #undef DBG
72 #endif
73
74 #ifdef DBG2
75 #undef DBG2
76 #endif
77
78 #if DBG_LEVEL > 0
79 # define DBG(f,x...) printk(KERN_DEBUG "ibm-iic" f, ##x)
80 #else
81 # define DBG(f,x...) ((void)0)
82 #endif
83 #if DBG_LEVEL > 1
84 # define DBG2(f,x...) DBG(f, ##x)
85 #else
86 # define DBG2(f,x...) ((void)0)
87 #endif
88 #if DBG_LEVEL > 2
89 static void dump_iic_regs(const char* header, struct ibm_iic_private* dev)
90 {
91 volatile struct iic_regs __iomem *iic = dev->vaddr;
92 printk(KERN_DEBUG "ibm-iic%d: %s\n", dev->idx, header);
93 printk(KERN_DEBUG " cntl = 0x%02x, mdcntl = 0x%02x\n"
94 KERN_DEBUG " sts = 0x%02x, extsts = 0x%02x\n"
95 KERN_DEBUG " clkdiv = 0x%02x, xfrcnt = 0x%02x\n"
96 KERN_DEBUG " xtcntlss = 0x%02x, directcntl = 0x%02x\n",
97 in_8(&iic->cntl), in_8(&iic->mdcntl), in_8(&iic->sts),
98 in_8(&iic->extsts), in_8(&iic->clkdiv), in_8(&iic->xfrcnt),
99 in_8(&iic->xtcntlss), in_8(&iic->directcntl));
100 }
101 # define DUMP_REGS(h,dev) dump_iic_regs((h),(dev))
102 #else
103 # define DUMP_REGS(h,dev) ((void)0)
104 #endif
105
106 /* Bus timings (in ns) for bit-banging */
107 static struct i2c_timings {
108 unsigned int hd_sta;
109 unsigned int su_sto;
110 unsigned int low;
111 unsigned int high;
112 unsigned int buf;
113 } timings [] = {
114 /* Standard mode (100 KHz) */
115 {
116 .hd_sta = 4000,
117 .su_sto = 4000,
118 .low = 4700,
119 .high = 4000,
120 .buf = 4700,
121 },
122 /* Fast mode (400 KHz) */
123 {
124 .hd_sta = 600,
125 .su_sto = 600,
126 .low = 1300,
127 .high = 600,
128 .buf = 1300,
129 }};
130
131 /* Enable/disable interrupt generation */
132 static inline void iic_interrupt_mode(struct ibm_iic_private* dev, int enable)
133 {
134 out_8(&dev->vaddr->intmsk, enable ? INTRMSK_EIMTC : 0);
135 }
136
137 /*
138 * Initialize IIC interface.
139 */
140 static void iic_dev_init(struct ibm_iic_private* dev)
141 {
142 volatile struct iic_regs __iomem *iic = dev->vaddr;
143
144 DBG("%d: init\n", dev->idx);
145
146 /* Clear master address */
147 out_8(&iic->lmadr, 0);
148 out_8(&iic->hmadr, 0);
149
150 /* Clear slave address */
151 out_8(&iic->lsadr, 0);
152 out_8(&iic->hsadr, 0);
153
154 /* Clear status & extended status */
155 out_8(&iic->sts, STS_SCMP | STS_IRQA);
156 out_8(&iic->extsts, EXTSTS_IRQP | EXTSTS_IRQD | EXTSTS_LA
157 | EXTSTS_ICT | EXTSTS_XFRA);
158
159 /* Set clock divider */
160 out_8(&iic->clkdiv, dev->clckdiv);
161
162 /* Clear transfer count */
163 out_8(&iic->xfrcnt, 0);
164
165 /* Clear extended control and status */
166 out_8(&iic->xtcntlss, XTCNTLSS_SRC | XTCNTLSS_SRS | XTCNTLSS_SWC
167 | XTCNTLSS_SWS);
168
169 /* Clear control register */
170 out_8(&iic->cntl, 0);
171
172 /* Enable interrupts if possible */
173 iic_interrupt_mode(dev, dev->irq >= 0);
174
175 /* Set mode control */
176 out_8(&iic->mdcntl, MDCNTL_FMDB | MDCNTL_EINT | MDCNTL_EUBS
177 | (dev->fast_mode ? MDCNTL_FSM : 0));
178
179 DUMP_REGS("iic_init", dev);
180 }
181
182 /*
183 * Reset IIC interface
184 */
185 static void iic_dev_reset(struct ibm_iic_private* dev)
186 {
187 volatile struct iic_regs __iomem *iic = dev->vaddr;
188 int i;
189 u8 dc;
190
191 DBG("%d: soft reset\n", dev->idx);
192 DUMP_REGS("reset", dev);
193
194 /* Place chip in the reset state */
195 out_8(&iic->xtcntlss, XTCNTLSS_SRST);
196
197 /* Check if bus is free */
198 dc = in_8(&iic->directcntl);
199 if (!DIRCTNL_FREE(dc)){
200 DBG("%d: trying to regain bus control\n", dev->idx);
201
202 /* Try to set bus free state */
203 out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
204
205 /* Wait until we regain bus control */
206 for (i = 0; i < 100; ++i){
207 dc = in_8(&iic->directcntl);
208 if (DIRCTNL_FREE(dc))
209 break;
210
211 /* Toggle SCL line */
212 dc ^= DIRCNTL_SCC;
213 out_8(&iic->directcntl, dc);
214 udelay(10);
215 dc ^= DIRCNTL_SCC;
216 out_8(&iic->directcntl, dc);
217
218 /* be nice */
219 cond_resched();
220 }
221 }
222
223 /* Remove reset */
224 out_8(&iic->xtcntlss, 0);
225
226 /* Reinitialize interface */
227 iic_dev_init(dev);
228 }
229
230 /*
231 * Do 0-length transaction using bit-banging through IIC_DIRECTCNTL register.
232 */
233
234 /* Wait for SCL and/or SDA to be high */
235 static int iic_dc_wait(volatile struct iic_regs __iomem *iic, u8 mask)
236 {
237 unsigned long x = jiffies + HZ / 28 + 2;
238 while ((in_8(&iic->directcntl) & mask) != mask){
239 if (unlikely(time_after(jiffies, x)))
240 return -1;
241 cond_resched();
242 }
243 return 0;
244 }
245
246 static int iic_smbus_quick(struct ibm_iic_private* dev, const struct i2c_msg* p)
247 {
248 volatile struct iic_regs __iomem *iic = dev->vaddr;
249 const struct i2c_timings* t = &timings[dev->fast_mode ? 1 : 0];
250 u8 mask, v, sda;
251 int i, res;
252
253 /* Only 7-bit addresses are supported */
254 if (unlikely(p->flags & I2C_M_TEN)){
255 DBG("%d: smbus_quick - 10 bit addresses are not supported\n",
256 dev->idx);
257 return -EINVAL;
258 }
259
260 DBG("%d: smbus_quick(0x%02x)\n", dev->idx, p->addr);
261
262 /* Reset IIC interface */
263 out_8(&iic->xtcntlss, XTCNTLSS_SRST);
264
265 /* Wait for bus to become free */
266 out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
267 if (unlikely(iic_dc_wait(iic, DIRCNTL_MSDA | DIRCNTL_MSC)))
268 goto err;
269 ndelay(t->buf);
270
271 /* START */
272 out_8(&iic->directcntl, DIRCNTL_SCC);
273 sda = 0;
274 ndelay(t->hd_sta);
275
276 /* Send address */
277 v = (u8)((p->addr << 1) | ((p->flags & I2C_M_RD) ? 1 : 0));
278 for (i = 0, mask = 0x80; i < 8; ++i, mask >>= 1){
279 out_8(&iic->directcntl, sda);
280 ndelay(t->low / 2);
281 sda = (v & mask) ? DIRCNTL_SDAC : 0;
282 out_8(&iic->directcntl, sda);
283 ndelay(t->low / 2);
284
285 out_8(&iic->directcntl, DIRCNTL_SCC | sda);
286 if (unlikely(iic_dc_wait(iic, DIRCNTL_MSC)))
287 goto err;
288 ndelay(t->high);
289 }
290
291 /* ACK */
292 out_8(&iic->directcntl, sda);
293 ndelay(t->low / 2);
294 out_8(&iic->directcntl, DIRCNTL_SDAC);
295 ndelay(t->low / 2);
296 out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
297 if (unlikely(iic_dc_wait(iic, DIRCNTL_MSC)))
298 goto err;
299 res = (in_8(&iic->directcntl) & DIRCNTL_MSDA) ? -EREMOTEIO : 1;
300 ndelay(t->high);
301
302 /* STOP */
303 out_8(&iic->directcntl, 0);
304 ndelay(t->low);
305 out_8(&iic->directcntl, DIRCNTL_SCC);
306 if (unlikely(iic_dc_wait(iic, DIRCNTL_MSC)))
307 goto err;
308 ndelay(t->su_sto);
309 out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
310
311 ndelay(t->buf);
312
313 DBG("%d: smbus_quick -> %s\n", dev->idx, res ? "NACK" : "ACK");
314 out:
315 /* Remove reset */
316 out_8(&iic->xtcntlss, 0);
317
318 /* Reinitialize interface */
319 iic_dev_init(dev);
320
321 return res;
322 err:
323 DBG("%d: smbus_quick - bus is stuck\n", dev->idx);
324 res = -EREMOTEIO;
325 goto out;
326 }
327
328 /*
329 * IIC interrupt handler
330 */
331 static irqreturn_t iic_handler(int irq, void *dev_id)
332 {
333 struct ibm_iic_private* dev = (struct ibm_iic_private*)dev_id;
334 volatile struct iic_regs __iomem *iic = dev->vaddr;
335
336 DBG2("%d: irq handler, STS = 0x%02x, EXTSTS = 0x%02x\n",
337 dev->idx, in_8(&iic->sts), in_8(&iic->extsts));
338
339 /* Acknowledge IRQ and wakeup iic_wait_for_tc */
340 out_8(&iic->sts, STS_IRQA | STS_SCMP);
341 wake_up_interruptible(&dev->wq);
342
343 return IRQ_HANDLED;
344 }
345
346 /*
347 * Get master transfer result and clear errors if any.
348 * Returns the number of actually transferred bytes or error (<0)
349 */
350 static int iic_xfer_result(struct ibm_iic_private* dev)
351 {
352 volatile struct iic_regs __iomem *iic = dev->vaddr;
353
354 if (unlikely(in_8(&iic->sts) & STS_ERR)){
355 DBG("%d: xfer error, EXTSTS = 0x%02x\n", dev->idx,
356 in_8(&iic->extsts));
357
358 /* Clear errors and possible pending IRQs */
359 out_8(&iic->extsts, EXTSTS_IRQP | EXTSTS_IRQD |
360 EXTSTS_LA | EXTSTS_ICT | EXTSTS_XFRA);
361
362 /* Flush master data buffer */
363 out_8(&iic->mdcntl, in_8(&iic->mdcntl) | MDCNTL_FMDB);
364
365 /* Is bus free?
366 * If error happened during combined xfer
367 * IIC interface is usually stuck in some strange
368 * state, the only way out - soft reset.
369 */
370 if ((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE){
371 DBG("%d: bus is stuck, resetting\n", dev->idx);
372 iic_dev_reset(dev);
373 }
374 return -EREMOTEIO;
375 }
376 else
377 return in_8(&iic->xfrcnt) & XFRCNT_MTC_MASK;
378 }
379
380 /*
381 * Try to abort active transfer.
382 */
383 static void iic_abort_xfer(struct ibm_iic_private* dev)
384 {
385 volatile struct iic_regs __iomem *iic = dev->vaddr;
386 unsigned long x;
387
388 DBG("%d: iic_abort_xfer\n", dev->idx);
389
390 out_8(&iic->cntl, CNTL_HMT);
391
392 /*
393 * Wait for the abort command to complete.
394 * It's not worth to be optimized, just poll (timeout >= 1 tick)
395 */
396 x = jiffies + 2;
397 while ((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE){
398 if (time_after(jiffies, x)){
399 DBG("%d: abort timeout, resetting...\n", dev->idx);
400 iic_dev_reset(dev);
401 return;
402 }
403 schedule();
404 }
405
406 /* Just to clear errors */
407 iic_xfer_result(dev);
408 }
409
410 /*
411 * Wait for master transfer to complete.
412 * It puts current process to sleep until we get interrupt or timeout expires.
413 * Returns the number of transferred bytes or error (<0)
414 */
415 static int iic_wait_for_tc(struct ibm_iic_private* dev){
416
417 volatile struct iic_regs __iomem *iic = dev->vaddr;
418 int ret = 0;
419
420 if (dev->irq >= 0){
421 /* Interrupt mode */
422 ret = wait_event_interruptible_timeout(dev->wq,
423 !(in_8(&iic->sts) & STS_PT), dev->adap.timeout * HZ);
424
425 if (unlikely(ret < 0))
426 DBG("%d: wait interrupted\n", dev->idx);
427 else if (unlikely(in_8(&iic->sts) & STS_PT)){
428 DBG("%d: wait timeout\n", dev->idx);
429 ret = -ETIMEDOUT;
430 }
431 }
432 else {
433 /* Polling mode */
434 unsigned long x = jiffies + dev->adap.timeout * HZ;
435
436 while (in_8(&iic->sts) & STS_PT){
437 if (unlikely(time_after(jiffies, x))){
438 DBG("%d: poll timeout\n", dev->idx);
439 ret = -ETIMEDOUT;
440 break;
441 }
442
443 if (unlikely(signal_pending(current))){
444 DBG("%d: poll interrupted\n", dev->idx);
445 ret = -ERESTARTSYS;
446 break;
447 }
448 schedule();
449 }
450 }
451
452 if (unlikely(ret < 0))
453 iic_abort_xfer(dev);
454 else
455 ret = iic_xfer_result(dev);
456
457 DBG2("%d: iic_wait_for_tc -> %d\n", dev->idx, ret);
458
459 return ret;
460 }
461
462 /*
463 * Low level master transfer routine
464 */
465 static int iic_xfer_bytes(struct ibm_iic_private* dev, struct i2c_msg* pm,
466 int combined_xfer)
467 {
468 volatile struct iic_regs __iomem *iic = dev->vaddr;
469 char* buf = pm->buf;
470 int i, j, loops, ret = 0;
471 int len = pm->len;
472
473 u8 cntl = (in_8(&iic->cntl) & CNTL_AMD) | CNTL_PT;
474 if (pm->flags & I2C_M_RD)
475 cntl |= CNTL_RW;
476
477 loops = (len + 3) / 4;
478 for (i = 0; i < loops; ++i, len -= 4){
479 int count = len > 4 ? 4 : len;
480 u8 cmd = cntl | ((count - 1) << CNTL_TCT_SHIFT);
481
482 if (!(cntl & CNTL_RW))
483 for (j = 0; j < count; ++j)
484 out_8((void __iomem *)&iic->mdbuf, *buf++);
485
486 if (i < loops - 1)
487 cmd |= CNTL_CHT;
488 else if (combined_xfer)
489 cmd |= CNTL_RPST;
490
491 DBG2("%d: xfer_bytes, %d, CNTL = 0x%02x\n", dev->idx, count, cmd);
492
493 /* Start transfer */
494 out_8(&iic->cntl, cmd);
495
496 /* Wait for completion */
497 ret = iic_wait_for_tc(dev);
498
499 if (unlikely(ret < 0))
500 break;
501 else if (unlikely(ret != count)){
502 DBG("%d: xfer_bytes, requested %d, transfered %d\n",
503 dev->idx, count, ret);
504
505 /* If it's not a last part of xfer, abort it */
506 if (combined_xfer || (i < loops - 1))
507 iic_abort_xfer(dev);
508
509 ret = -EREMOTEIO;
510 break;
511 }
512
513 if (cntl & CNTL_RW)
514 for (j = 0; j < count; ++j)
515 *buf++ = in_8((void __iomem *)&iic->mdbuf);
516 }
517
518 return ret > 0 ? 0 : ret;
519 }
520
521 /*
522 * Set target slave address for master transfer
523 */
524 static inline void iic_address(struct ibm_iic_private* dev, struct i2c_msg* msg)
525 {
526 volatile struct iic_regs __iomem *iic = dev->vaddr;
527 u16 addr = msg->addr;
528
529 DBG2("%d: iic_address, 0x%03x (%d-bit)\n", dev->idx,
530 addr, msg->flags & I2C_M_TEN ? 10 : 7);
531
532 if (msg->flags & I2C_M_TEN){
533 out_8(&iic->cntl, CNTL_AMD);
534 out_8(&iic->lmadr, addr);
535 out_8(&iic->hmadr, 0xf0 | ((addr >> 7) & 0x06));
536 }
537 else {
538 out_8(&iic->cntl, 0);
539 out_8(&iic->lmadr, addr << 1);
540 }
541 }
542
543 static inline int iic_invalid_address(const struct i2c_msg* p)
544 {
545 return (p->addr > 0x3ff) || (!(p->flags & I2C_M_TEN) && (p->addr > 0x7f));
546 }
547
548 static inline int iic_address_neq(const struct i2c_msg* p1,
549 const struct i2c_msg* p2)
550 {
551 return (p1->addr != p2->addr)
552 || ((p1->flags & I2C_M_TEN) != (p2->flags & I2C_M_TEN));
553 }
554
555 /*
556 * Generic master transfer entrypoint.
557 * Returns the number of processed messages or error (<0)
558 */
559 static int iic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
560 {
561 struct ibm_iic_private* dev = (struct ibm_iic_private*)(i2c_get_adapdata(adap));
562 volatile struct iic_regs __iomem *iic = dev->vaddr;
563 int i, ret = 0;
564
565 DBG2("%d: iic_xfer, %d msg(s)\n", dev->idx, num);
566
567 if (!num)
568 return 0;
569
570 /* Check the sanity of the passed messages.
571 * Uhh, generic i2c layer is more suitable place for such code...
572 */
573 if (unlikely(iic_invalid_address(&msgs[0]))){
574 DBG("%d: invalid address 0x%03x (%d-bit)\n", dev->idx,
575 msgs[0].addr, msgs[0].flags & I2C_M_TEN ? 10 : 7);
576 return -EINVAL;
577 }
578 for (i = 0; i < num; ++i){
579 if (unlikely(msgs[i].len <= 0)){
580 if (num == 1 && !msgs[0].len){
581 /* Special case for I2C_SMBUS_QUICK emulation.
582 * IBM IIC doesn't support 0-length transactions
583 * so we have to emulate them using bit-banging.
584 */
585 return iic_smbus_quick(dev, &msgs[0]);
586 }
587 DBG("%d: invalid len %d in msg[%d]\n", dev->idx,
588 msgs[i].len, i);
589 return -EINVAL;
590 }
591 if (unlikely(iic_address_neq(&msgs[0], &msgs[i]))){
592 DBG("%d: invalid addr in msg[%d]\n", dev->idx, i);
593 return -EINVAL;
594 }
595 }
596
597 /* Check bus state */
598 if (unlikely((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE)){
599 DBG("%d: iic_xfer, bus is not free\n", dev->idx);
600
601 /* Usually it means something serious has happend.
602 * We *cannot* have unfinished previous transfer
603 * so it doesn't make any sense to try to stop it.
604 * Probably we were not able to recover from the
605 * previous error.
606 * The only *reasonable* thing I can think of here
607 * is soft reset. --ebs
608 */
609 iic_dev_reset(dev);
610
611 if ((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE){
612 DBG("%d: iic_xfer, bus is still not free\n", dev->idx);
613 return -EREMOTEIO;
614 }
615 }
616 else {
617 /* Flush master data buffer (just in case) */
618 out_8(&iic->mdcntl, in_8(&iic->mdcntl) | MDCNTL_FMDB);
619 }
620
621 /* Load slave address */
622 iic_address(dev, &msgs[0]);
623
624 /* Do real transfer */
625 for (i = 0; i < num && !ret; ++i)
626 ret = iic_xfer_bytes(dev, &msgs[i], i < num - 1);
627
628 return ret < 0 ? ret : num;
629 }
630
631 static u32 iic_func(struct i2c_adapter *adap)
632 {
633 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;
634 }
635
636 static const struct i2c_algorithm iic_algo = {
637 .master_xfer = iic_xfer,
638 .functionality = iic_func
639 };
640
641 /*
642 * Calculates IICx_CLCKDIV value for a specific OPB clock frequency
643 */
644 static inline u8 iic_clckdiv(unsigned int opb)
645 {
646 /* Compatibility kludge, should go away after all cards
647 * are fixed to fill correct value for opbfreq.
648 * Previous driver version used hardcoded divider value 4,
649 * it corresponds to OPB frequency from the range (40, 50] MHz
650 */
651 if (!opb){
652 printk(KERN_WARNING "ibm-iic: using compatibility value for OPB freq,"
653 " fix your board specific setup\n");
654 opb = 50000000;
655 }
656
657 /* Convert to MHz */
658 opb /= 1000000;
659
660 if (opb < 20 || opb > 150){
661 printk(KERN_WARNING "ibm-iic: invalid OPB clock frequency %u MHz\n",
662 opb);
663 opb = opb < 20 ? 20 : 150;
664 }
665 return (u8)((opb + 9) / 10 - 1);
666 }
667
668 #ifdef CONFIG_IBM_OCP
669 /*
670 * Register single IIC interface
671 */
672 static int __devinit iic_probe(struct ocp_device *ocp){
673
674 struct ibm_iic_private* dev;
675 struct i2c_adapter* adap;
676 struct ocp_func_iic_data* iic_data = ocp->def->additions;
677 int ret;
678
679 if (!iic_data)
680 printk(KERN_WARNING"ibm-iic%d: missing additional data!\n",
681 ocp->def->index);
682
683 if (!(dev = kzalloc(sizeof(*dev), GFP_KERNEL))) {
684 printk(KERN_ERR "ibm-iic%d: failed to allocate device data\n",
685 ocp->def->index);
686 return -ENOMEM;
687 }
688
689 dev->idx = ocp->def->index;
690 ocp_set_drvdata(ocp, dev);
691
692 if (!request_mem_region(ocp->def->paddr, sizeof(struct iic_regs),
693 "ibm_iic")) {
694 ret = -EBUSY;
695 goto fail1;
696 }
697
698 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){
699 printk(KERN_ERR "ibm-iic%d: failed to ioremap device registers\n",
700 dev->idx);
701 ret = -ENXIO;
702 goto fail2;
703 }
704
705 init_waitqueue_head(&dev->wq);
706
707 dev->irq = iic_force_poll ? -1 : ocp->def->irq;
708 if (dev->irq >= 0){
709 /* Disable interrupts until we finish initialization,
710 assumes level-sensitive IRQ setup...
711 */
712 iic_interrupt_mode(dev, 0);
713 if (request_irq(dev->irq, iic_handler, 0, "IBM IIC", dev)){
714 printk(KERN_ERR "ibm-iic%d: request_irq %d failed\n",
715 dev->idx, dev->irq);
716 /* Fallback to the polling mode */
717 dev->irq = -1;
718 }
719 }
720
721 if (dev->irq < 0)
722 printk(KERN_WARNING "ibm-iic%d: using polling mode\n",
723 dev->idx);
724
725 /* Board specific settings */
726 dev->fast_mode = iic_force_fast ? 1 : (iic_data ? iic_data->fast_mode : 0);
727
728 /* clckdiv is the same for *all* IIC interfaces,
729 * but I'd rather make a copy than introduce another global. --ebs
730 */
731 dev->clckdiv = iic_clckdiv(ocp_sys_info.opb_bus_freq);
732 DBG("%d: clckdiv = %d\n", dev->idx, dev->clckdiv);
733
734 /* Initialize IIC interface */
735 iic_dev_init(dev);
736
737 /* Register it with i2c layer */
738 adap = &dev->adap;
739 adap->dev.parent = &ocp->dev;
740 strcpy(adap->name, "IBM IIC");
741 i2c_set_adapdata(adap, dev);
742 adap->id = I2C_HW_OCP;
743 adap->class = I2C_CLASS_HWMON;
744 adap->algo = &iic_algo;
745 adap->client_register = NULL;
746 adap->client_unregister = NULL;
747 adap->timeout = 1;
748
749 /*
750 * If "dev->idx" is negative we consider it as zero.
751 * The reason to do so is to avoid sysfs names that only make
752 * sense when there are multiple adapters.
753 */
754 adap->nr = dev->idx >= 0 ? dev->idx : 0;
755
756 if ((ret = i2c_add_numbered_adapter(adap)) < 0) {
757 printk(KERN_ERR "ibm-iic%d: failed to register i2c adapter\n",
758 dev->idx);
759 goto fail;
760 }
761
762 printk(KERN_INFO "ibm-iic%d: using %s mode\n", dev->idx,
763 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
764
765 return 0;
766
767 fail:
768 if (dev->irq >= 0){
769 iic_interrupt_mode(dev, 0);
770 free_irq(dev->irq, dev);
771 }
772
773 iounmap(dev->vaddr);
774 fail2:
775 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
776 fail1:
777 ocp_set_drvdata(ocp, NULL);
778 kfree(dev);
779 return ret;
780 }
781
782 /*
783 * Cleanup initialized IIC interface
784 */
785 static void __devexit iic_remove(struct ocp_device *ocp)
786 {
787 struct ibm_iic_private* dev = (struct ibm_iic_private*)ocp_get_drvdata(ocp);
788 BUG_ON(dev == NULL);
789 if (i2c_del_adapter(&dev->adap)){
790 printk(KERN_ERR "ibm-iic%d: failed to delete i2c adapter :(\n",
791 dev->idx);
792 /* That's *very* bad, just shutdown IRQ ... */
793 if (dev->irq >= 0){
794 iic_interrupt_mode(dev, 0);
795 free_irq(dev->irq, dev);
796 dev->irq = -1;
797 }
798 } else {
799 if (dev->irq >= 0){
800 iic_interrupt_mode(dev, 0);
801 free_irq(dev->irq, dev);
802 }
803 iounmap(dev->vaddr);
804 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
805 kfree(dev);
806 }
807 }
808
809 static struct ocp_device_id ibm_iic_ids[] __devinitdata =
810 {
811 { .vendor = OCP_VENDOR_IBM, .function = OCP_FUNC_IIC },
812 { .vendor = OCP_VENDOR_INVALID }
813 };
814
815 MODULE_DEVICE_TABLE(ocp, ibm_iic_ids);
816
817 static struct ocp_driver ibm_iic_driver =
818 {
819 .name = "iic",
820 .id_table = ibm_iic_ids,
821 .probe = iic_probe,
822 .remove = __devexit_p(iic_remove),
823 #if defined(CONFIG_PM)
824 .suspend = NULL,
825 .resume = NULL,
826 #endif
827 };
828
829 static int __init iic_init(void)
830 {
831 printk(KERN_INFO "IBM IIC driver v" DRIVER_VERSION "\n");
832 return ocp_register_driver(&ibm_iic_driver);
833 }
834
835 static void __exit iic_exit(void)
836 {
837 ocp_unregister_driver(&ibm_iic_driver);
838 }
839
840 #else /* !CONFIG_IBM_OCP */
841
842 static int __devinit iic_request_irq(struct of_device *ofdev,
843 struct ibm_iic_private *dev)
844 {
845 struct device_node *np = ofdev->node;
846 int irq;
847
848 if (iic_force_poll)
849 return NO_IRQ;
850
851 irq = irq_of_parse_and_map(np, 0);
852 if (irq == NO_IRQ) {
853 dev_err(&ofdev->dev, "irq_of_parse_and_map failed\n");
854 return NO_IRQ;
855 }
856
857 /* Disable interrupts until we finish initialization, assumes
858 * level-sensitive IRQ setup...
859 */
860 iic_interrupt_mode(dev, 0);
861 if (request_irq(irq, iic_handler, 0, "IBM IIC", dev)) {
862 dev_err(&ofdev->dev, "request_irq %d failed\n", irq);
863 /* Fallback to the polling mode */
864 return NO_IRQ;
865 }
866
867 return irq;
868 }
869
870 /*
871 * Register single IIC interface
872 */
873 static int __devinit iic_probe(struct of_device *ofdev,
874 const struct of_device_id *match)
875 {
876 struct device_node *np = ofdev->node;
877 struct ibm_iic_private *dev;
878 struct i2c_adapter *adap;
879 const u32 *indexp, *freq;
880 int ret;
881
882 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
883 if (!dev) {
884 dev_err(&ofdev->dev, "failed to allocate device data\n");
885 return -ENOMEM;
886 }
887
888 dev_set_drvdata(&ofdev->dev, dev);
889
890 indexp = of_get_property(np, "index", NULL);
891 if (!indexp) {
892 dev_err(&ofdev->dev, "no index specified\n");
893 ret = -EINVAL;
894 goto error_cleanup;
895 }
896 dev->idx = *indexp;
897
898 dev->vaddr = of_iomap(np, 0);
899 if (dev->vaddr == NULL) {
900 dev_err(&ofdev->dev, "failed to iomap device\n");
901 ret = -ENXIO;
902 goto error_cleanup;
903 }
904
905 init_waitqueue_head(&dev->wq);
906
907 dev->irq = iic_request_irq(ofdev, dev);
908 if (dev->irq == NO_IRQ)
909 dev_warn(&ofdev->dev, "using polling mode\n");
910
911 /* Board specific settings */
912 if (iic_force_fast || of_get_property(np, "fast-mode", NULL))
913 dev->fast_mode = 1;
914
915 freq = of_get_property(np, "clock-frequency", NULL);
916 if (freq == NULL) {
917 freq = of_get_property(np->parent, "clock-frequency", NULL);
918 if (freq == NULL) {
919 dev_err(&ofdev->dev, "Unable to get bus frequency\n");
920 ret = -EINVAL;
921 goto error_cleanup;
922 }
923 }
924
925 dev->clckdiv = iic_clckdiv(*freq);
926 dev_dbg(&ofdev->dev, "clckdiv = %d\n", dev->clckdiv);
927
928 /* Initialize IIC interface */
929 iic_dev_init(dev);
930
931 /* Register it with i2c layer */
932 adap = &dev->adap;
933 adap->dev.parent = &ofdev->dev;
934 strlcpy(adap->name, "IBM IIC", sizeof(adap->name));
935 i2c_set_adapdata(adap, dev);
936 adap->id = I2C_HW_OCP;
937 adap->class = I2C_CLASS_HWMON;
938 adap->algo = &iic_algo;
939 adap->timeout = 1;
940 adap->nr = dev->idx;
941
942 ret = i2c_add_numbered_adapter(adap);
943 if (ret < 0) {
944 dev_err(&ofdev->dev, "failed to register i2c adapter\n");
945 goto error_cleanup;
946 }
947
948 dev_info(&ofdev->dev, "using %s mode\n",
949 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
950
951 return 0;
952
953 error_cleanup:
954 if (dev->irq != NO_IRQ) {
955 iic_interrupt_mode(dev, 0);
956 free_irq(dev->irq, dev);
957 }
958
959 if (dev->vaddr)
960 iounmap(dev->vaddr);
961
962 dev_set_drvdata(&ofdev->dev, NULL);
963 kfree(dev);
964 return ret;
965 }
966
967 /*
968 * Cleanup initialized IIC interface
969 */
970 static int __devexit iic_remove(struct of_device *ofdev)
971 {
972 struct ibm_iic_private *dev = dev_get_drvdata(&ofdev->dev);
973
974 dev_set_drvdata(&ofdev->dev, NULL);
975
976 i2c_del_adapter(&dev->adap);
977
978 if (dev->irq != NO_IRQ) {
979 iic_interrupt_mode(dev, 0);
980 free_irq(dev->irq, dev);
981 }
982
983 iounmap(dev->vaddr);
984 kfree(dev);
985
986 return 0;
987 }
988
989 static const struct of_device_id ibm_iic_match[] = {
990 { .compatible = "ibm,iic-405ex", },
991 { .compatible = "ibm,iic-405gp", },
992 { .compatible = "ibm,iic-440gp", },
993 { .compatible = "ibm,iic-440gpx", },
994 { .compatible = "ibm,iic-440grx", },
995 {}
996 };
997
998 static struct of_platform_driver ibm_iic_driver = {
999 .name = "ibm-iic",
1000 .match_table = ibm_iic_match,
1001 .probe = iic_probe,
1002 .remove = __devexit_p(iic_remove),
1003 };
1004
1005 static int __init iic_init(void)
1006 {
1007 return of_register_platform_driver(&ibm_iic_driver);
1008 }
1009
1010 static void __exit iic_exit(void)
1011 {
1012 of_unregister_platform_driver(&ibm_iic_driver);
1013 }
1014 #endif /* CONFIG_IBM_OCP */
1015
1016 module_init(iic_init);
1017 module_exit(iic_exit);
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