2 * This is i.MX low power i2c controller driver.
4 * Copyright 2016 Freescale Semiconductor, Inc.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/clk.h>
19 #include <linux/completion.h>
20 #include <linux/delay.h>
21 #include <linux/err.h>
22 #include <linux/errno.h>
23 #include <linux/i2c.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
30 #include <linux/of_device.h>
31 #include <linux/pinctrl/consumer.h>
32 #include <linux/platform_device.h>
33 #include <linux/sched.h>
34 #include <linux/slab.h>
36 #define DRIVER_NAME "imx-lpi2c"
38 #define LPI2C_PARAM 0x04 /* i2c RX/TX FIFO size */
39 #define LPI2C_MCR 0x10 /* i2c contrl register */
40 #define LPI2C_MSR 0x14 /* i2c status register */
41 #define LPI2C_MIER 0x18 /* i2c interrupt enable */
42 #define LPI2C_MCFGR0 0x20 /* i2c master configuration */
43 #define LPI2C_MCFGR1 0x24 /* i2c master configuration */
44 #define LPI2C_MCFGR2 0x28 /* i2c master configuration */
45 #define LPI2C_MCFGR3 0x2C /* i2c master configuration */
46 #define LPI2C_MCCR0 0x48 /* i2c master clk configuration */
47 #define LPI2C_MCCR1 0x50 /* i2c master clk configuration */
48 #define LPI2C_MFCR 0x58 /* i2c master FIFO control */
49 #define LPI2C_MFSR 0x5C /* i2c master FIFO status */
50 #define LPI2C_MTDR 0x60 /* i2c master TX data register */
51 #define LPI2C_MRDR 0x70 /* i2c master RX data register */
54 #define TRAN_DATA 0X00
55 #define RECV_DATA 0X01
57 #define RECV_DISCARD 0X03
58 #define GEN_START 0X04
59 #define START_NACK 0X05
60 #define START_HIGH 0X06
61 #define START_HIGH_NACK 0X07
63 #define MCR_MEN BIT(0)
64 #define MCR_RST BIT(1)
65 #define MCR_DOZEN BIT(2)
66 #define MCR_DBGEN BIT(3)
67 #define MCR_RTF BIT(8)
68 #define MCR_RRF BIT(9)
69 #define MSR_TDF BIT(0)
70 #define MSR_RDF BIT(1)
71 #define MSR_SDF BIT(9)
72 #define MSR_NDF BIT(10)
73 #define MSR_ALF BIT(11)
74 #define MSR_MBF BIT(24)
75 #define MSR_BBF BIT(25)
76 #define MIER_TDIE BIT(0)
77 #define MIER_RDIE BIT(1)
78 #define MIER_SDIE BIT(9)
79 #define MIER_NDIE BIT(10)
80 #define MCFGR1_AUTOSTOP BIT(8)
81 #define MCFGR1_IGNACK BIT(9)
82 #define MRDR_RXEMPTY BIT(14)
84 #define I2C_CLK_RATIO 2
85 #define CHUNK_DATA 256
87 #define LPI2C_DEFAULT_RATE 100000
88 #define STARDARD_MAX_BITRATE 400000
89 #define FAST_MAX_BITRATE 1000000
90 #define FAST_PLUS_MAX_BITRATE 3400000
91 #define HIGHSPEED_MAX_BITRATE 5000000
94 STANDARD
, /* 100+Kbps */
96 FAST_PLUS
, /* 1.0+Mbps */
98 ULTRA_FAST
, /* 5.0+Mbps */
101 enum lpi2c_imx_pincfg
{
108 struct lpi2c_imx_struct
{
109 struct i2c_adapter adapter
;
114 struct completion complete
;
116 unsigned int delivered
;
117 unsigned int block_data
;
118 unsigned int bitrate
;
119 unsigned int txfifosize
;
120 unsigned int rxfifosize
;
121 enum lpi2c_imx_mode mode
;
124 static void lpi2c_imx_intctrl(struct lpi2c_imx_struct
*lpi2c_imx
,
127 writel(enable
, lpi2c_imx
->base
+ LPI2C_MIER
);
130 static int lpi2c_imx_bus_busy(struct lpi2c_imx_struct
*lpi2c_imx
)
132 unsigned long orig_jiffies
= jiffies
;
136 temp
= readl(lpi2c_imx
->base
+ LPI2C_MSR
);
138 /* check for arbitration lost, clear if set */
139 if (temp
& MSR_ALF
) {
140 writel(temp
, lpi2c_imx
->base
+ LPI2C_MSR
);
144 if (temp
& (MSR_BBF
| MSR_MBF
))
147 if (time_after(jiffies
, orig_jiffies
+ msecs_to_jiffies(500))) {
148 dev_dbg(&lpi2c_imx
->adapter
.dev
, "bus not work\n");
157 static void lpi2c_imx_set_mode(struct lpi2c_imx_struct
*lpi2c_imx
)
159 unsigned int bitrate
= lpi2c_imx
->bitrate
;
160 enum lpi2c_imx_mode mode
;
162 if (bitrate
< STARDARD_MAX_BITRATE
)
164 else if (bitrate
< FAST_MAX_BITRATE
)
166 else if (bitrate
< FAST_PLUS_MAX_BITRATE
)
168 else if (bitrate
< HIGHSPEED_MAX_BITRATE
)
173 lpi2c_imx
->mode
= mode
;
176 static int lpi2c_imx_start(struct lpi2c_imx_struct
*lpi2c_imx
,
177 struct i2c_msg
*msgs
)
182 temp
= readl(lpi2c_imx
->base
+ LPI2C_MCR
);
183 temp
|= MCR_RRF
| MCR_RTF
;
184 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCR
);
185 writel(0x7f00, lpi2c_imx
->base
+ LPI2C_MSR
);
187 read
= msgs
->flags
& I2C_M_RD
;
188 temp
= (msgs
->addr
<< 1 | read
) | (GEN_START
<< 8);
189 writel(temp
, lpi2c_imx
->base
+ LPI2C_MTDR
);
191 return lpi2c_imx_bus_busy(lpi2c_imx
);
194 static void lpi2c_imx_stop(struct lpi2c_imx_struct
*lpi2c_imx
)
196 unsigned long orig_jiffies
= jiffies
;
199 writel(GEN_STOP
<< 8, lpi2c_imx
->base
+ LPI2C_MTDR
);
202 temp
= readl(lpi2c_imx
->base
+ LPI2C_MSR
);
206 if (time_after(jiffies
, orig_jiffies
+ msecs_to_jiffies(500))) {
207 dev_dbg(&lpi2c_imx
->adapter
.dev
, "stop timeout\n");
215 /* CLKLO = I2C_CLK_RATIO * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI/2 */
216 static int lpi2c_imx_config(struct lpi2c_imx_struct
*lpi2c_imx
)
218 u8 prescale
, filt
, sethold
, clkhi
, clklo
, datavd
;
219 unsigned int clk_rate
, clk_cycle
;
220 enum lpi2c_imx_pincfg pincfg
;
223 lpi2c_imx_set_mode(lpi2c_imx
);
225 clk_rate
= clk_get_rate(lpi2c_imx
->clk
);
226 if (lpi2c_imx
->mode
== HS
|| lpi2c_imx
->mode
== ULTRA_FAST
)
231 for (prescale
= 0; prescale
<= 7; prescale
++) {
232 clk_cycle
= clk_rate
/ ((1 << prescale
) * lpi2c_imx
->bitrate
)
234 clkhi
= (clk_cycle
+ I2C_CLK_RATIO
) / (I2C_CLK_RATIO
+ 1);
235 clklo
= clk_cycle
- clkhi
;
243 /* set MCFGR1: PINCFG, PRESCALE, IGNACK */
244 if (lpi2c_imx
->mode
== ULTRA_FAST
)
248 temp
= prescale
| pincfg
<< 24;
250 if (lpi2c_imx
->mode
== ULTRA_FAST
)
251 temp
|= MCFGR1_IGNACK
;
253 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCFGR1
);
255 /* set MCFGR2: FILTSDA, FILTSCL */
256 temp
= (filt
<< 16) | (filt
<< 24);
257 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCFGR2
);
259 /* set MCCR: DATAVD, SETHOLD, CLKHI, CLKLO */
262 temp
= datavd
<< 24 | sethold
<< 16 | clkhi
<< 8 | clklo
;
264 if (lpi2c_imx
->mode
== HS
)
265 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCCR1
);
267 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCCR0
);
272 static int lpi2c_imx_master_enable(struct lpi2c_imx_struct
*lpi2c_imx
)
277 ret
= clk_enable(lpi2c_imx
->clk
);
282 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCR
);
283 writel(0, lpi2c_imx
->base
+ LPI2C_MCR
);
285 ret
= lpi2c_imx_config(lpi2c_imx
);
289 temp
= readl(lpi2c_imx
->base
+ LPI2C_MCR
);
291 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCR
);
296 clk_disable(lpi2c_imx
->clk
);
301 static int lpi2c_imx_master_disable(struct lpi2c_imx_struct
*lpi2c_imx
)
305 temp
= readl(lpi2c_imx
->base
+ LPI2C_MCR
);
307 writel(temp
, lpi2c_imx
->base
+ LPI2C_MCR
);
309 clk_disable(lpi2c_imx
->clk
);
314 static int lpi2c_imx_msg_complete(struct lpi2c_imx_struct
*lpi2c_imx
)
316 unsigned long timeout
;
318 timeout
= wait_for_completion_timeout(&lpi2c_imx
->complete
, HZ
);
320 return timeout
? 0 : -ETIMEDOUT
;
323 static int lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct
*lpi2c_imx
)
325 unsigned long orig_jiffies
= jiffies
;
329 txcnt
= readl(lpi2c_imx
->base
+ LPI2C_MFSR
) & 0xff;
331 if (readl(lpi2c_imx
->base
+ LPI2C_MSR
) & MSR_NDF
) {
332 dev_dbg(&lpi2c_imx
->adapter
.dev
, "NDF detected\n");
336 if (time_after(jiffies
, orig_jiffies
+ msecs_to_jiffies(500))) {
337 dev_dbg(&lpi2c_imx
->adapter
.dev
, "txfifo empty timeout\n");
347 static void lpi2c_imx_set_tx_watermark(struct lpi2c_imx_struct
*lpi2c_imx
)
349 writel(lpi2c_imx
->txfifosize
>> 1, lpi2c_imx
->base
+ LPI2C_MFCR
);
352 static void lpi2c_imx_set_rx_watermark(struct lpi2c_imx_struct
*lpi2c_imx
)
354 unsigned int temp
, remaining
;
356 remaining
= lpi2c_imx
->msglen
- lpi2c_imx
->delivered
;
358 if (remaining
> (lpi2c_imx
->rxfifosize
>> 1))
359 temp
= lpi2c_imx
->rxfifosize
>> 1;
363 writel(temp
<< 16, lpi2c_imx
->base
+ LPI2C_MFCR
);
366 static void lpi2c_imx_write_txfifo(struct lpi2c_imx_struct
*lpi2c_imx
)
368 unsigned int data
, txcnt
;
370 txcnt
= readl(lpi2c_imx
->base
+ LPI2C_MFSR
) & 0xff;
372 while (txcnt
< lpi2c_imx
->txfifosize
) {
373 if (lpi2c_imx
->delivered
== lpi2c_imx
->msglen
)
376 data
= lpi2c_imx
->tx_buf
[lpi2c_imx
->delivered
++];
377 writel(data
, lpi2c_imx
->base
+ LPI2C_MTDR
);
381 if (lpi2c_imx
->delivered
< lpi2c_imx
->msglen
)
382 lpi2c_imx_intctrl(lpi2c_imx
, MIER_TDIE
| MIER_NDIE
);
384 complete(&lpi2c_imx
->complete
);
387 static void lpi2c_imx_read_rxfifo(struct lpi2c_imx_struct
*lpi2c_imx
)
389 unsigned int blocklen
, remaining
;
390 unsigned int temp
, data
;
393 data
= readl(lpi2c_imx
->base
+ LPI2C_MRDR
);
394 if (data
& MRDR_RXEMPTY
)
397 lpi2c_imx
->rx_buf
[lpi2c_imx
->delivered
++] = data
& 0xff;
401 * First byte is the length of remaining packet in the SMBus block
402 * data read. Add it to msgs->len.
404 if (lpi2c_imx
->block_data
) {
405 blocklen
= lpi2c_imx
->rx_buf
[0];
406 lpi2c_imx
->msglen
+= blocklen
;
409 remaining
= lpi2c_imx
->msglen
- lpi2c_imx
->delivered
;
412 complete(&lpi2c_imx
->complete
);
416 /* not finished, still waiting for rx data */
417 lpi2c_imx_set_rx_watermark(lpi2c_imx
);
419 /* multiple receive commands */
420 if (lpi2c_imx
->block_data
) {
421 lpi2c_imx
->block_data
= 0;
423 temp
|= (RECV_DATA
<< 8);
424 writel(temp
, lpi2c_imx
->base
+ LPI2C_MTDR
);
425 } else if (!(lpi2c_imx
->delivered
& 0xff)) {
426 temp
= (remaining
> CHUNK_DATA
? CHUNK_DATA
: remaining
) - 1;
427 temp
|= (RECV_DATA
<< 8);
428 writel(temp
, lpi2c_imx
->base
+ LPI2C_MTDR
);
431 lpi2c_imx_intctrl(lpi2c_imx
, MIER_RDIE
);
434 static void lpi2c_imx_write(struct lpi2c_imx_struct
*lpi2c_imx
,
435 struct i2c_msg
*msgs
)
437 lpi2c_imx
->tx_buf
= msgs
->buf
;
438 lpi2c_imx_set_tx_watermark(lpi2c_imx
);
439 lpi2c_imx_write_txfifo(lpi2c_imx
);
442 static void lpi2c_imx_read(struct lpi2c_imx_struct
*lpi2c_imx
,
443 struct i2c_msg
*msgs
)
447 lpi2c_imx
->rx_buf
= msgs
->buf
;
448 lpi2c_imx
->block_data
= msgs
->flags
& I2C_M_RECV_LEN
;
450 lpi2c_imx_set_rx_watermark(lpi2c_imx
);
451 temp
= msgs
->len
> CHUNK_DATA
? CHUNK_DATA
- 1 : msgs
->len
- 1;
452 temp
|= (RECV_DATA
<< 8);
453 writel(temp
, lpi2c_imx
->base
+ LPI2C_MTDR
);
455 lpi2c_imx_intctrl(lpi2c_imx
, MIER_RDIE
| MIER_NDIE
);
458 static int lpi2c_imx_xfer(struct i2c_adapter
*adapter
,
459 struct i2c_msg
*msgs
, int num
)
461 struct lpi2c_imx_struct
*lpi2c_imx
= i2c_get_adapdata(adapter
);
465 result
= lpi2c_imx_master_enable(lpi2c_imx
);
469 for (i
= 0; i
< num
; i
++) {
470 result
= lpi2c_imx_start(lpi2c_imx
, &msgs
[i
]);
475 if (num
== 1 && msgs
[0].len
== 0)
478 lpi2c_imx
->delivered
= 0;
479 lpi2c_imx
->msglen
= msgs
[i
].len
;
480 init_completion(&lpi2c_imx
->complete
);
482 if (msgs
[i
].flags
& I2C_M_RD
)
483 lpi2c_imx_read(lpi2c_imx
, &msgs
[i
]);
485 lpi2c_imx_write(lpi2c_imx
, &msgs
[i
]);
487 result
= lpi2c_imx_msg_complete(lpi2c_imx
);
491 if (!(msgs
[i
].flags
& I2C_M_RD
)) {
492 result
= lpi2c_imx_txfifo_empty(lpi2c_imx
);
499 lpi2c_imx_stop(lpi2c_imx
);
501 temp
= readl(lpi2c_imx
->base
+ LPI2C_MSR
);
502 if ((temp
& MSR_NDF
) && !result
)
506 lpi2c_imx_master_disable(lpi2c_imx
);
508 dev_dbg(&lpi2c_imx
->adapter
.dev
, "<%s> exit with: %s: %d\n", __func__
,
509 (result
< 0) ? "error" : "success msg",
510 (result
< 0) ? result
: num
);
512 return (result
< 0) ? result
: num
;
515 static irqreturn_t
lpi2c_imx_isr(int irq
, void *dev_id
)
517 struct lpi2c_imx_struct
*lpi2c_imx
= dev_id
;
520 lpi2c_imx_intctrl(lpi2c_imx
, 0);
521 temp
= readl(lpi2c_imx
->base
+ LPI2C_MSR
);
524 lpi2c_imx_read_rxfifo(lpi2c_imx
);
527 lpi2c_imx_write_txfifo(lpi2c_imx
);
530 complete(&lpi2c_imx
->complete
);
535 static u32
lpi2c_imx_func(struct i2c_adapter
*adapter
)
537 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
|
538 I2C_FUNC_SMBUS_READ_BLOCK_DATA
;
541 static const struct i2c_algorithm lpi2c_imx_algo
= {
542 .master_xfer
= lpi2c_imx_xfer
,
543 .functionality
= lpi2c_imx_func
,
546 static const struct of_device_id lpi2c_imx_of_match
[] = {
547 { .compatible
= "fsl,imx7ulp-lpi2c" },
548 { .compatible
= "fsl,imx8dv-lpi2c" },
551 MODULE_DEVICE_TABLE(of
, lpi2c_imx_of_match
);
553 static int lpi2c_imx_probe(struct platform_device
*pdev
)
555 struct lpi2c_imx_struct
*lpi2c_imx
;
556 struct resource
*res
;
560 lpi2c_imx
= devm_kzalloc(&pdev
->dev
, sizeof(*lpi2c_imx
), GFP_KERNEL
);
564 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
565 lpi2c_imx
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
566 if (IS_ERR(lpi2c_imx
->base
))
567 return PTR_ERR(lpi2c_imx
->base
);
569 irq
= platform_get_irq(pdev
, 0);
571 dev_err(&pdev
->dev
, "can't get irq number\n");
575 lpi2c_imx
->adapter
.owner
= THIS_MODULE
;
576 lpi2c_imx
->adapter
.algo
= &lpi2c_imx_algo
;
577 lpi2c_imx
->adapter
.dev
.parent
= &pdev
->dev
;
578 lpi2c_imx
->adapter
.dev
.of_node
= pdev
->dev
.of_node
;
579 strlcpy(lpi2c_imx
->adapter
.name
, pdev
->name
,
580 sizeof(lpi2c_imx
->adapter
.name
));
582 lpi2c_imx
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
583 if (IS_ERR(lpi2c_imx
->clk
)) {
584 dev_err(&pdev
->dev
, "can't get I2C peripheral clock\n");
585 return PTR_ERR(lpi2c_imx
->clk
);
588 ret
= of_property_read_u32(pdev
->dev
.of_node
,
589 "clock-frequency", &lpi2c_imx
->bitrate
);
591 lpi2c_imx
->bitrate
= LPI2C_DEFAULT_RATE
;
593 ret
= devm_request_irq(&pdev
->dev
, irq
, lpi2c_imx_isr
, 0,
594 pdev
->name
, lpi2c_imx
);
596 dev_err(&pdev
->dev
, "can't claim irq %d\n", irq
);
600 i2c_set_adapdata(&lpi2c_imx
->adapter
, lpi2c_imx
);
601 platform_set_drvdata(pdev
, lpi2c_imx
);
603 ret
= clk_prepare_enable(lpi2c_imx
->clk
);
605 dev_err(&pdev
->dev
, "clk enable failed %d\n", ret
);
609 temp
= readl(lpi2c_imx
->base
+ LPI2C_PARAM
);
610 lpi2c_imx
->txfifosize
= 1 << (temp
& 0x0f);
611 lpi2c_imx
->rxfifosize
= 1 << ((temp
>> 8) & 0x0f);
613 clk_disable(lpi2c_imx
->clk
);
615 ret
= i2c_add_adapter(&lpi2c_imx
->adapter
);
619 dev_info(&lpi2c_imx
->adapter
.dev
, "LPI2C adapter registered\n");
624 clk_unprepare(lpi2c_imx
->clk
);
629 static int lpi2c_imx_remove(struct platform_device
*pdev
)
631 struct lpi2c_imx_struct
*lpi2c_imx
= platform_get_drvdata(pdev
);
633 i2c_del_adapter(&lpi2c_imx
->adapter
);
635 clk_unprepare(lpi2c_imx
->clk
);
640 #ifdef CONFIG_PM_SLEEP
641 static int lpi2c_imx_suspend(struct device
*dev
)
643 pinctrl_pm_select_sleep_state(dev
);
648 static int lpi2c_imx_resume(struct device
*dev
)
650 pinctrl_pm_select_default_state(dev
);
656 static SIMPLE_DEV_PM_OPS(imx_lpi2c_pm
, lpi2c_imx_suspend
, lpi2c_imx_resume
);
658 static struct platform_driver lpi2c_imx_driver
= {
659 .probe
= lpi2c_imx_probe
,
660 .remove
= lpi2c_imx_remove
,
663 .of_match_table
= lpi2c_imx_of_match
,
668 module_platform_driver(lpi2c_imx_driver
);
670 MODULE_AUTHOR("Gao Pan <pandy.gao@nxp.com>");
671 MODULE_DESCRIPTION("I2C adapter driver for LPI2C bus");
672 MODULE_LICENSE("GPL");