drivers/i2c/busses/i2c-meson.c

   1 /*
   2  * I2C bus driver for Amlogic Meson SoCs
   3  *
   4  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/clk.h>
  12 #include <linux/completion.h>
  13 #include <linux/i2c.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/io.h>
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/of.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/types.h>
  21
  22 /* Meson I2C register map */
  23 #define REG_CTRL                0x00
  24 #define REG_SLAVE_ADDR          0x04
  25 #define REG_TOK_LIST0           0x08
  26 #define REG_TOK_LIST1           0x0c
  27 #define REG_TOK_WDATA0          0x10
  28 #define REG_TOK_WDATA1          0x14
  29 #define REG_TOK_RDATA0          0x18
  30 #define REG_TOK_RDATA1          0x1c
  31
  32 /* Control register fields */
  33 #define REG_CTRL_START          BIT(0)
  34 #define REG_CTRL_ACK_IGNORE     BIT(1)
  35 #define REG_CTRL_STATUS         BIT(2)
  36 #define REG_CTRL_ERROR          BIT(3)
  37 #define REG_CTRL_CLKDIV_SHIFT   12
  38 #define REG_CTRL_CLKDIV_MASK    GENMASK(21, 12)
  39 #define REG_CTRL_CLKDIVEXT_SHIFT 28
  40 #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
  41
  42 #define I2C_TIMEOUT_MS          500
  43
  44 enum {
  45         TOKEN_END = 0,
  46         TOKEN_START,
  47         TOKEN_SLAVE_ADDR_WRITE,
  48         TOKEN_SLAVE_ADDR_READ,
  49         TOKEN_DATA,
  50         TOKEN_DATA_LAST,
  51         TOKEN_STOP,
  52 };
  53
  54 enum {
  55         STATE_IDLE,
  56         STATE_READ,
  57         STATE_WRITE,
  58 };
  59
  60 /**
  61  * struct meson_i2c - Meson I2C device private data
  62  *
  63  * @adap:       I2C adapter instance
  64  * @dev:        Pointer to device structure
  65  * @regs:       Base address of the device memory mapped registers
  66  * @clk:        Pointer to clock structure
  67  * @irq:        IRQ number
  68  * @msg:        Pointer to the current I2C message
  69  * @state:      Current state in the driver state machine
  70  * @last:       Flag set for the last message in the transfer
  71  * @count:      Number of bytes to be sent/received in current transfer
  72  * @pos:        Current position in the send/receive buffer
  73  * @error:      Flag set when an error is received
  74  * @lock:       To avoid race conditions between irq handler and xfer code
  75  * @done:       Completion used to wait for transfer termination
  76  * @tokens:     Sequence of tokens to be written to the device
  77  * @num_tokens: Number of tokens
  78  */
  79 struct meson_i2c {
  80         struct i2c_adapter      adap;
  81         struct device           *dev;
  82         void __iomem            *regs;
  83         struct clk              *clk;
  84
  85         struct i2c_msg          *msg;
  86         int                     state;
  87         bool                    last;
  88         int                     count;
  89         int                     pos;
  90         int                     error;
  91
  92         spinlock_t              lock;
  93         struct completion       done;
  94         u32                     tokens[2];
  95         int                     num_tokens;
  96 };
  97
  98 static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask,
  99                                u32 val)
 100 {
 101         u32 data;
 102
 103         data = readl(i2c->regs + reg);
 104         data &= ~mask;
 105         data |= val & mask;
 106         writel(data, i2c->regs + reg);
 107 }
 108
 109 static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
 110 {
 111         i2c->tokens[0] = 0;
 112         i2c->tokens[1] = 0;
 113         i2c->num_tokens = 0;
 114 }
 115
 116 static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
 117 {
 118         if (i2c->num_tokens < 8)
 119                 i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
 120         else
 121                 i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
 122
 123         i2c->num_tokens++;
 124 }
 125
 126 static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq)
 127 {
 128         unsigned long clk_rate = clk_get_rate(i2c->clk);
 129         unsigned int div;
 130
 131         div = DIV_ROUND_UP(clk_rate, freq * 4);
 132
 133         /* clock divider has 12 bits */
 134         if (div >= (1 << 12)) {
 135                 dev_err(i2c->dev, "requested bus frequency too low\n");
 136                 div = (1 << 12) - 1;
 137         }
 138
 139         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
 140                            (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);
 141
 142         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK,
 143                            (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
 144
 145         dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
 146                 clk_rate, freq, div);
 147 }
 148
 149 static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len)
 150 {
 151         u32 rdata0, rdata1;
 152         int i;
 153
 154         rdata0 = readl(i2c->regs + REG_TOK_RDATA0);
 155         rdata1 = readl(i2c->regs + REG_TOK_RDATA1);
 156
 157         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
 158                 rdata0, rdata1, len);
 159
 160         for (i = 0; i < min(4, len); i++)
 161                 *buf++ = (rdata0 >> i * 8) & 0xff;
 162
 163         for (i = 4; i < min(8, len); i++)
 164                 *buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
 165 }
 166
 167 static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len)
 168 {
 169         u32 wdata0 = 0, wdata1 = 0;
 170         int i;
 171
 172         for (i = 0; i < min(4, len); i++)
 173                 wdata0 |= *buf++ << (i * 8);
 174
 175         for (i = 4; i < min(8, len); i++)
 176                 wdata1 |= *buf++ << ((i - 4) * 8);
 177
 178         writel(wdata0, i2c->regs + REG_TOK_WDATA0);
 179         writel(wdata1, i2c->regs + REG_TOK_WDATA1);
 180
 181         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
 182                 wdata0, wdata1, len);
 183 }
 184
 185 static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
 186 {
 187         bool write = !(i2c->msg->flags & I2C_M_RD);
 188         int i;
 189
 190         i2c->count = min(i2c->msg->len - i2c->pos, 8);
 191
 192         for (i = 0; i < i2c->count - 1; i++)
 193                 meson_i2c_add_token(i2c, TOKEN_DATA);
 194
 195         if (i2c->count) {
 196                 if (write || i2c->pos + i2c->count < i2c->msg->len)
 197                         meson_i2c_add_token(i2c, TOKEN_DATA);
 198                 else
 199                         meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
 200         }
 201
 202         if (write)
 203                 meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
 204
 205         if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
 206                 meson_i2c_add_token(i2c, TOKEN_STOP);
 207
 208         writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0);
 209         writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1);
 210 }
 211
 212 static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
 213 {
 214         struct meson_i2c *i2c = dev_id;
 215         unsigned int ctrl;
 216
 217         spin_lock(&i2c->lock);
 218
 219         meson_i2c_reset_tokens(i2c);
 220         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
 221         ctrl = readl(i2c->regs + REG_CTRL);
 222
 223         dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n",
 224                 i2c->state, i2c->pos, i2c->count, ctrl);
 225
 226         if (i2c->state == STATE_IDLE) {
 227                 spin_unlock(&i2c->lock);
 228                 return IRQ_NONE;
 229         }
 230
 231         if (ctrl & REG_CTRL_ERROR) {
 232                 /*
 233                  * The bit is set when the IGNORE_NAK bit is cleared
 234                  * and the device didn't respond. In this case, the
 235                  * I2C controller automatically generates a STOP
 236                  * condition.
 237                  */
 238                 dev_dbg(i2c->dev, "error bit set\n");
 239                 i2c->error = -ENXIO;
 240                 i2c->state = STATE_IDLE;
 241                 complete(&i2c->done);
 242                 goto out;
 243         }
 244
 245         if (i2c->state == STATE_READ && i2c->count)
 246                 meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
 247
 248         i2c->pos += i2c->count;
 249
 250         if (i2c->pos >= i2c->msg->len) {
 251                 i2c->state = STATE_IDLE;
 252                 complete(&i2c->done);
 253                 goto out;
 254         }
 255
 256         /* Restart the processing */
 257         meson_i2c_prepare_xfer(i2c);
 258         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START);
 259 out:
 260         spin_unlock(&i2c->lock);
 261
 262         return IRQ_HANDLED;
 263 }
 264
 265 static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg)
 266 {
 267         int token;
 268
 269         token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
 270                 TOKEN_SLAVE_ADDR_WRITE;
 271
 272         writel(msg->addr << 1, i2c->regs + REG_SLAVE_ADDR);
 273         meson_i2c_add_token(i2c, TOKEN_START);
 274         meson_i2c_add_token(i2c, token);
 275 }
 276
 277 static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
 278                               int last)
 279 {
 280         unsigned long time_left, flags;
 281         int ret = 0;
 282
 283         i2c->msg = msg;
 284         i2c->last = last;
 285         i2c->pos = 0;
 286         i2c->count = 0;
 287         i2c->error = 0;
 288
 289         meson_i2c_reset_tokens(i2c);
 290
 291         flags = (msg->flags & I2C_M_IGNORE_NAK) ? REG_CTRL_ACK_IGNORE : 0;
 292         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags);
 293
 294         if (!(msg->flags & I2C_M_NOSTART))
 295                 meson_i2c_do_start(i2c, msg);
 296
 297         i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
 298         meson_i2c_prepare_xfer(i2c);
 299         reinit_completion(&i2c->done);
 300
 301         /* Start the transfer */
 302         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START);
 303
 304         time_left = msecs_to_jiffies(I2C_TIMEOUT_MS);
 305         time_left = wait_for_completion_timeout(&i2c->done, time_left);
 306
 307         /*
 308          * Protect access to i2c struct and registers from interrupt
 309          * handlers triggered by a transfer terminated after the
 310          * timeout period
 311          */
 312         spin_lock_irqsave(&i2c->lock, flags);
 313
 314         /* Abort any active operation */
 315         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
 316
 317         if (!time_left) {
 318                 i2c->state = STATE_IDLE;
 319                 ret = -ETIMEDOUT;
 320         }
 321
 322         if (i2c->error)
 323                 ret = i2c->error;
 324
 325         spin_unlock_irqrestore(&i2c->lock, flags);
 326
 327         return ret;
 328 }
 329
 330 static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 331                           int num)
 332 {
 333         struct meson_i2c *i2c = adap->algo_data;
 334         int i, ret = 0;
 335
 336         clk_enable(i2c->clk);
 337
 338         for (i = 0; i < num; i++) {
 339                 ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1);
 340                 if (ret)
 341                         break;
 342         }
 343
 344         clk_disable(i2c->clk);
 345
 346         return ret ?: i;
 347 }
 348
 349 static u32 meson_i2c_func(struct i2c_adapter *adap)
 350 {
 351         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 352 }
 353
 354 static const struct i2c_algorithm meson_i2c_algorithm = {
 355         .master_xfer    = meson_i2c_xfer,
 356         .functionality  = meson_i2c_func,
 357 };
 358
 359 static int meson_i2c_probe(struct platform_device *pdev)
 360 {
 361         struct device_node *np = pdev->dev.of_node;
 362         struct meson_i2c *i2c;
 363         struct resource *mem;
 364         struct i2c_timings timings;
 365         int irq, ret = 0;
 366
 367         i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL);
 368         if (!i2c)
 369                 return -ENOMEM;
 370
 371         i2c_parse_fw_timings(&pdev->dev, &timings, true);
 372
 373         i2c->dev = &pdev->dev;
 374         platform_set_drvdata(pdev, i2c);
 375
 376         spin_lock_init(&i2c->lock);
 377         init_completion(&i2c->done);
 378
 379         i2c->clk = devm_clk_get(&pdev->dev, NULL);
 380         if (IS_ERR(i2c->clk)) {
 381                 dev_err(&pdev->dev, "can't get device clock\n");
 382                 return PTR_ERR(i2c->clk);
 383         }
 384
 385         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 386         i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
 387         if (IS_ERR(i2c->regs))
 388                 return PTR_ERR(i2c->regs);
 389
 390         irq = platform_get_irq(pdev, 0);
 391         if (irq < 0) {
 392                 dev_err(&pdev->dev, "can't find IRQ\n");
 393                 return irq;
 394         }
 395
 396         ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c);
 397         if (ret < 0) {
 398                 dev_err(&pdev->dev, "can't request IRQ\n");
 399                 return ret;
 400         }
 401
 402         ret = clk_prepare(i2c->clk);
 403         if (ret < 0) {
 404                 dev_err(&pdev->dev, "can't prepare clock\n");
 405                 return ret;
 406         }
 407
 408         strlcpy(i2c->adap.name, "Meson I2C adapter",
 409                 sizeof(i2c->adap.name));
 410         i2c->adap.owner = THIS_MODULE;
 411         i2c->adap.algo = &meson_i2c_algorithm;
 412         i2c->adap.dev.parent = &pdev->dev;
 413         i2c->adap.dev.of_node = np;
 414         i2c->adap.algo_data = i2c;
 415
 416         /*
 417          * A transfer is triggered when START bit changes from 0 to 1.
 418          * Ensure that the bit is set to 0 after probe
 419          */
 420         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
 421
 422         ret = i2c_add_adapter(&i2c->adap);
 423         if (ret < 0) {
 424                 clk_unprepare(i2c->clk);
 425                 return ret;
 426         }
 427
 428         meson_i2c_set_clk_div(i2c, timings.bus_freq_hz);
 429
 430         return 0;
 431 }
 432
 433 static int meson_i2c_remove(struct platform_device *pdev)
 434 {
 435         struct meson_i2c *i2c = platform_get_drvdata(pdev);
 436
 437         i2c_del_adapter(&i2c->adap);
 438         clk_unprepare(i2c->clk);
 439
 440         return 0;
 441 }
 442
 443 static const struct of_device_id meson_i2c_match[] = {
 444         { .compatible = "amlogic,meson6-i2c" },
 445         { .compatible = "amlogic,meson-gxbb-i2c" },
 446         { },
 447 };
 448 MODULE_DEVICE_TABLE(of, meson_i2c_match);
 449
 450 static struct platform_driver meson_i2c_driver = {
 451         .probe   = meson_i2c_probe,
 452         .remove  = meson_i2c_remove,
 453         .driver  = {
 454                 .name  = "meson-i2c",
 455                 .of_match_table = meson_i2c_match,
 456         },
 457 };
 458
 459 module_platform_driver(meson_i2c_driver);
 460
 461 MODULE_DESCRIPTION("Amlogic Meson I2C Bus driver");
 462 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
 463 MODULE_LICENSE("GPL v2");