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1 /*
2 SMBus driver for nVidia nForce2 MCP
3
4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
7 Based on
8 SMBus 2.0 driver for AMD-8111 IO-Hub
9 Copyright (c) 2002 Vojtech Pavlik
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26 /*
27 SUPPORTED DEVICES PCI ID
28 nForce2 MCP 0064
29 nForce2 Ultra 400 MCP 0084
30 nForce3 Pro150 MCP 00D4
31 nForce3 250Gb MCP 00E4
32 nForce4 MCP 0052
33 nForce4 MCP-04 0034
34 nForce4 MCP51 0264
35 nForce4 MCP55 0368
36 nForce MCP61 03EB
37 nForce MCP65 0446
38
39 This driver supports the 2 SMBuses that are included in the MCP of the
40 nForce2/3/4/5xx chipsets.
41 */
42
43 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */
44
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/kernel.h>
48 #include <linux/stddef.h>
49 #include <linux/ioport.h>
50 #include <linux/init.h>
51 #include <linux/i2c.h>
52 #include <linux/delay.h>
53 #include <linux/dmi.h>
54 #include <asm/io.h>
55
56 MODULE_LICENSE("GPL");
57 MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
58 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
59
60
61 struct nforce2_smbus {
62 struct i2c_adapter adapter;
63 int base;
64 int size;
65 int blockops;
66 int can_abort;
67 };
68
69
70 /*
71 * nVidia nForce2 SMBus control register definitions
72 * (Newer incarnations use standard BARs 4 and 5 instead)
73 */
74 #define NFORCE_PCI_SMB1 0x50
75 #define NFORCE_PCI_SMB2 0x54
76
77
78 /*
79 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
80 */
81 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
82 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
83 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
84 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
85 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
86 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
87 bytes */
88 #define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
89 check the status of
90 the abort command */
91 #define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
92
93 #define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that
94 abort succeeded */
95 #define NVIDIA_SMB_CTRL_ABORT 0x20
96 #define NVIDIA_SMB_STS_DONE 0x80
97 #define NVIDIA_SMB_STS_ALRM 0x40
98 #define NVIDIA_SMB_STS_RES 0x20
99 #define NVIDIA_SMB_STS_STATUS 0x1f
100
101 #define NVIDIA_SMB_PRTCL_WRITE 0x00
102 #define NVIDIA_SMB_PRTCL_READ 0x01
103 #define NVIDIA_SMB_PRTCL_QUICK 0x02
104 #define NVIDIA_SMB_PRTCL_BYTE 0x04
105 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
106 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
107 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
108 #define NVIDIA_SMB_PRTCL_PEC 0x80
109
110 /* Misc definitions */
111 #define MAX_TIMEOUT 100
112
113 /* We disable the second SMBus channel on these boards */
114 static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = {
115 {
116 .ident = "DFI Lanparty NF4 Expert",
117 .matches = {
118 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
119 DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
120 },
121 },
122 { }
123 };
124
125 static struct pci_driver nforce2_driver;
126
127 /* For multiplexing support, we need a global reference to the 1st
128 SMBus channel */
129 #if defined CONFIG_I2C_NFORCE2_S4985 || defined CONFIG_I2C_NFORCE2_S4985_MODULE
130 struct i2c_adapter *nforce2_smbus;
131 EXPORT_SYMBOL_GPL(nforce2_smbus);
132
133 static void nforce2_set_reference(struct i2c_adapter *adap)
134 {
135 nforce2_smbus = adap;
136 }
137 #else
138 static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
139 #endif
140
141 static void nforce2_abort(struct i2c_adapter *adap)
142 {
143 struct nforce2_smbus *smbus = adap->algo_data;
144 int timeout = 0;
145 unsigned char temp;
146
147 dev_dbg(&adap->dev, "Aborting current transaction\n");
148
149 outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
150 do {
151 msleep(1);
152 temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
153 } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
154 (timeout++ < MAX_TIMEOUT));
155 if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
156 dev_err(&adap->dev, "Can't reset the smbus\n");
157 outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
158 }
159
160 static int nforce2_check_status(struct i2c_adapter *adap)
161 {
162 struct nforce2_smbus *smbus = adap->algo_data;
163 int timeout = 0;
164 unsigned char temp;
165
166 do {
167 msleep(1);
168 temp = inb_p(NVIDIA_SMB_STS);
169 } while ((!temp) && (timeout++ < MAX_TIMEOUT));
170
171 if (timeout >= MAX_TIMEOUT) {
172 dev_dbg(&adap->dev, "SMBus Timeout!\n");
173 if (smbus->can_abort)
174 nforce2_abort(adap);
175 return -ETIMEDOUT;
176 }
177 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
178 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
179 return -EIO;
180 }
181 return 0;
182 }
183
184 /* Return negative errno on error */
185 static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
186 unsigned short flags, char read_write,
187 u8 command, int size, union i2c_smbus_data * data)
188 {
189 struct nforce2_smbus *smbus = adap->algo_data;
190 unsigned char protocol, pec;
191 u8 len;
192 int i, status;
193
194 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
195 NVIDIA_SMB_PRTCL_WRITE;
196 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
197
198 switch (size) {
199
200 case I2C_SMBUS_QUICK:
201 protocol |= NVIDIA_SMB_PRTCL_QUICK;
202 read_write = I2C_SMBUS_WRITE;
203 break;
204
205 case I2C_SMBUS_BYTE:
206 if (read_write == I2C_SMBUS_WRITE)
207 outb_p(command, NVIDIA_SMB_CMD);
208 protocol |= NVIDIA_SMB_PRTCL_BYTE;
209 break;
210
211 case I2C_SMBUS_BYTE_DATA:
212 outb_p(command, NVIDIA_SMB_CMD);
213 if (read_write == I2C_SMBUS_WRITE)
214 outb_p(data->byte, NVIDIA_SMB_DATA);
215 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
216 break;
217
218 case I2C_SMBUS_WORD_DATA:
219 outb_p(command, NVIDIA_SMB_CMD);
220 if (read_write == I2C_SMBUS_WRITE) {
221 outb_p(data->word, NVIDIA_SMB_DATA);
222 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
223 }
224 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
225 break;
226
227 case I2C_SMBUS_BLOCK_DATA:
228 outb_p(command, NVIDIA_SMB_CMD);
229 if (read_write == I2C_SMBUS_WRITE) {
230 len = data->block[0];
231 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
232 dev_err(&adap->dev,
233 "Transaction failed "
234 "(requested block size: %d)\n",
235 len);
236 return -EINVAL;
237 }
238 outb_p(len, NVIDIA_SMB_BCNT);
239 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
240 outb_p(data->block[i + 1],
241 NVIDIA_SMB_DATA+i);
242 }
243 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
244 break;
245
246 default:
247 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
248 return -EOPNOTSUPP;
249 }
250
251 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
252 outb_p(protocol, NVIDIA_SMB_PRTCL);
253
254 status = nforce2_check_status(adap);
255 if (status)
256 return status;
257
258 if (read_write == I2C_SMBUS_WRITE)
259 return 0;
260
261 switch (size) {
262
263 case I2C_SMBUS_BYTE:
264 case I2C_SMBUS_BYTE_DATA:
265 data->byte = inb_p(NVIDIA_SMB_DATA);
266 break;
267
268 case I2C_SMBUS_WORD_DATA:
269 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
270 break;
271
272 case I2C_SMBUS_BLOCK_DATA:
273 len = inb_p(NVIDIA_SMB_BCNT);
274 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
275 dev_err(&adap->dev, "Transaction failed "
276 "(received block size: 0x%02x)\n",
277 len);
278 return -EPROTO;
279 }
280 for (i = 0; i < len; i++)
281 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
282 data->block[0] = len;
283 break;
284 }
285
286 return 0;
287 }
288
289
290 static u32 nforce2_func(struct i2c_adapter *adapter)
291 {
292 /* other functionality might be possible, but is not tested */
293 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
294 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
295 I2C_FUNC_SMBUS_PEC |
296 (((struct nforce2_smbus*)adapter->algo_data)->blockops ?
297 I2C_FUNC_SMBUS_BLOCK_DATA : 0);
298 }
299
300 static struct i2c_algorithm smbus_algorithm = {
301 .smbus_xfer = nforce2_access,
302 .functionality = nforce2_func,
303 };
304
305
306 static struct pci_device_id nforce2_ids[] = {
307 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
308 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
309 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
310 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
311 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
312 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
313 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
314 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
315 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
316 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
317 { 0 }
318 };
319
320 MODULE_DEVICE_TABLE (pci, nforce2_ids);
321
322
323 static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
324 int alt_reg, struct nforce2_smbus *smbus, const char *name)
325 {
326 int error;
327
328 smbus->base = pci_resource_start(dev, bar);
329 if (smbus->base) {
330 smbus->size = pci_resource_len(dev, bar);
331 } else {
332 /* Older incarnations of the device used non-standard BARs */
333 u16 iobase;
334
335 if (pci_read_config_word(dev, alt_reg, &iobase)
336 != PCIBIOS_SUCCESSFUL) {
337 dev_err(&dev->dev, "Error reading PCI config for %s\n",
338 name);
339 return -EIO;
340 }
341
342 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
343 smbus->size = 64;
344 }
345
346 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
347 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
348 smbus->base, smbus->base+smbus->size-1, name);
349 return -EBUSY;
350 }
351 smbus->adapter.owner = THIS_MODULE;
352 smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
353 smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
354 smbus->adapter.algo = &smbus_algorithm;
355 smbus->adapter.algo_data = smbus;
356 smbus->adapter.dev.parent = &dev->dev;
357 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
358 "SMBus nForce2 adapter at %04x", smbus->base);
359
360 error = i2c_add_adapter(&smbus->adapter);
361 if (error) {
362 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
363 release_region(smbus->base, smbus->size);
364 return error;
365 }
366 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
367 return 0;
368 }
369
370
371 static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
372 {
373 struct nforce2_smbus *smbuses;
374 int res1, res2;
375
376 /* we support 2 SMBus adapters */
377 if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
378 return -ENOMEM;
379 pci_set_drvdata(dev, smbuses);
380
381 switch(dev->device) {
382 case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
383 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
384 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
385 smbuses[0].blockops = 1;
386 smbuses[1].blockops = 1;
387 smbuses[0].can_abort = 1;
388 smbuses[1].can_abort = 1;
389 }
390
391 /* SMBus adapter 1 */
392 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
393 if (res1 < 0) {
394 dev_err(&dev->dev, "Error probing SMB1.\n");
395 smbuses[0].base = 0; /* to have a check value */
396 }
397 /* SMBus adapter 2 */
398 if (dmi_check_system(nforce2_dmi_blacklist2)) {
399 dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
400 res2 = -EPERM;
401 smbuses[1].base = 0;
402 } else {
403 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
404 "SMB2");
405 if (res2 < 0) {
406 dev_err(&dev->dev, "Error probing SMB2.\n");
407 smbuses[1].base = 0; /* to have a check value */
408 }
409 }
410 if ((res1 < 0) && (res2 < 0)) {
411 /* we did not find even one of the SMBuses, so we give up */
412 kfree(smbuses);
413 return -ENODEV;
414 }
415
416 nforce2_set_reference(&smbuses[0].adapter);
417 return 0;
418 }
419
420
421 static void __devexit nforce2_remove(struct pci_dev *dev)
422 {
423 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
424
425 nforce2_set_reference(NULL);
426 if (smbuses[0].base) {
427 i2c_del_adapter(&smbuses[0].adapter);
428 release_region(smbuses[0].base, smbuses[0].size);
429 }
430 if (smbuses[1].base) {
431 i2c_del_adapter(&smbuses[1].adapter);
432 release_region(smbuses[1].base, smbuses[1].size);
433 }
434 kfree(smbuses);
435 }
436
437 static struct pci_driver nforce2_driver = {
438 .name = "nForce2_smbus",
439 .id_table = nforce2_ids,
440 .probe = nforce2_probe,
441 .remove = __devexit_p(nforce2_remove),
442 };
443
444 static int __init nforce2_init(void)
445 {
446 return pci_register_driver(&nforce2_driver);
447 }
448
449 static void __exit nforce2_exit(void)
450 {
451 pci_unregister_driver(&nforce2_driver);
452 }
453
454 module_init(nforce2_init);
455 module_exit(nforce2_exit);
456