drivers/i2c/busses/i2c-pasemi.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2006-2007 PA Semi, Inc
   4  *
   5  * SMBus host driver for PA Semi PWRficient
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/pci.h>
  10 #include <linux/kernel.h>
  11 #include <linux/stddef.h>
  12 #include <linux/sched.h>
  13 #include <linux/i2c.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/io.h>
  17
  18 static struct pci_driver pasemi_smb_driver;
  19
  20 struct pasemi_smbus {
  21         struct pci_dev          *dev;
  22         struct i2c_adapter       adapter;
  23         unsigned long            base;
  24         int                      size;
  25 };
  26
  27 /* Register offsets */
  28 #define REG_MTXFIFO     0x00
  29 #define REG_MRXFIFO     0x04
  30 #define REG_SMSTA       0x14
  31 #define REG_CTL         0x1c
  32
  33 /* Register defs */
  34 #define MTXFIFO_READ    0x00000400
  35 #define MTXFIFO_STOP    0x00000200
  36 #define MTXFIFO_START   0x00000100
  37 #define MTXFIFO_DATA_M  0x000000ff
  38
  39 #define MRXFIFO_EMPTY   0x00000100
  40 #define MRXFIFO_DATA_M  0x000000ff
  41
  42 #define SMSTA_XEN       0x08000000
  43 #define SMSTA_MTN       0x00200000
  44
  45 #define CTL_MRR         0x00000400
  46 #define CTL_MTR         0x00000200
  47 #define CTL_CLK_M       0x000000ff
  48
  49 #define CLK_100K_DIV    84
  50 #define CLK_400K_DIV    21
  51
  52 static inline void reg_write(struct pasemi_smbus *smbus, int reg, int val)
  53 {
  54         dev_dbg(&smbus->dev->dev, "smbus write reg %lx val %08x\n",
  55                 smbus->base + reg, val);
  56         outl(val, smbus->base + reg);
  57 }
  58
  59 static inline int reg_read(struct pasemi_smbus *smbus, int reg)
  60 {
  61         int ret;
  62         ret = inl(smbus->base + reg);
  63         dev_dbg(&smbus->dev->dev, "smbus read reg %lx val %08x\n",
  64                 smbus->base + reg, ret);
  65         return ret;
  66 }
  67
  68 #define TXFIFO_WR(smbus, reg)   reg_write((smbus), REG_MTXFIFO, (reg))
  69 #define RXFIFO_RD(smbus)        reg_read((smbus), REG_MRXFIFO)
  70
  71 static void pasemi_smb_clear(struct pasemi_smbus *smbus)
  72 {
  73         unsigned int status;
  74
  75         status = reg_read(smbus, REG_SMSTA);
  76         reg_write(smbus, REG_SMSTA, status);
  77 }
  78
  79 static int pasemi_smb_waitready(struct pasemi_smbus *smbus)
  80 {
  81         int timeout = 10;
  82         unsigned int status;
  83
  84         status = reg_read(smbus, REG_SMSTA);
  85
  86         while (!(status & SMSTA_XEN) && timeout--) {
  87                 msleep(1);
  88                 status = reg_read(smbus, REG_SMSTA);
  89         }
  90
  91         /* Got NACK? */
  92         if (status & SMSTA_MTN)
  93                 return -ENXIO;
  94
  95         if (timeout < 0) {
  96                 dev_warn(&smbus->dev->dev, "Timeout, status 0x%08x\n", status);
  97                 reg_write(smbus, REG_SMSTA, status);
  98                 return -ETIME;
  99         }
 100
 101         /* Clear XEN */
 102         reg_write(smbus, REG_SMSTA, SMSTA_XEN);
 103
 104         return 0;
 105 }
 106
 107 static int pasemi_i2c_xfer_msg(struct i2c_adapter *adapter,
 108                                struct i2c_msg *msg, int stop)
 109 {
 110         struct pasemi_smbus *smbus = adapter->algo_data;
 111         int read, i, err;
 112         u32 rd;
 113
 114         read = msg->flags & I2C_M_RD ? 1 : 0;
 115
 116         TXFIFO_WR(smbus, MTXFIFO_START | i2c_8bit_addr_from_msg(msg));
 117
 118         if (read) {
 119                 TXFIFO_WR(smbus, msg->len | MTXFIFO_READ |
 120                                  (stop ? MTXFIFO_STOP : 0));
 121
 122                 err = pasemi_smb_waitready(smbus);
 123                 if (err)
 124                         goto reset_out;
 125
 126                 for (i = 0; i < msg->len; i++) {
 127                         rd = RXFIFO_RD(smbus);
 128                         if (rd & MRXFIFO_EMPTY) {
 129                                 err = -ENODATA;
 130                                 goto reset_out;
 131                         }
 132                         msg->buf[i] = rd & MRXFIFO_DATA_M;
 133                 }
 134         } else {
 135                 for (i = 0; i < msg->len - 1; i++)
 136                         TXFIFO_WR(smbus, msg->buf[i]);
 137
 138                 TXFIFO_WR(smbus, msg->buf[msg->len-1] |
 139                           (stop ? MTXFIFO_STOP : 0));
 140
 141                 if (stop) {
 142                         err = pasemi_smb_waitready(smbus);
 143                         if (err)
 144                                 goto reset_out;
 145                 }
 146         }
 147
 148         return 0;
 149
 150  reset_out:
 151         reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
 152                   (CLK_100K_DIV & CTL_CLK_M)));
 153         return err;
 154 }
 155
 156 static int pasemi_i2c_xfer(struct i2c_adapter *adapter,
 157                            struct i2c_msg *msgs, int num)
 158 {
 159         struct pasemi_smbus *smbus = adapter->algo_data;
 160         int ret, i;
 161
 162         pasemi_smb_clear(smbus);
 163
 164         ret = 0;
 165
 166         for (i = 0; i < num && !ret; i++)
 167                 ret = pasemi_i2c_xfer_msg(adapter, &msgs[i], (i == (num - 1)));
 168
 169         return ret ? ret : num;
 170 }
 171
 172 static int pasemi_smb_xfer(struct i2c_adapter *adapter,
 173                 u16 addr, unsigned short flags, char read_write, u8 command,
 174                 int size, union i2c_smbus_data *data)
 175 {
 176         struct pasemi_smbus *smbus = adapter->algo_data;
 177         unsigned int rd;
 178         int read_flag, err;
 179         int len = 0, i;
 180
 181         /* All our ops take 8-bit shifted addresses */
 182         addr <<= 1;
 183         read_flag = read_write == I2C_SMBUS_READ;
 184
 185         pasemi_smb_clear(smbus);
 186
 187         switch (size) {
 188         case I2C_SMBUS_QUICK:
 189                 TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START |
 190                           MTXFIFO_STOP);
 191                 break;
 192         case I2C_SMBUS_BYTE:
 193                 TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START);
 194                 if (read_write)
 195                         TXFIFO_WR(smbus, 1 | MTXFIFO_STOP | MTXFIFO_READ);
 196                 else
 197                         TXFIFO_WR(smbus, MTXFIFO_STOP | command);
 198                 break;
 199         case I2C_SMBUS_BYTE_DATA:
 200                 TXFIFO_WR(smbus, addr | MTXFIFO_START);
 201                 TXFIFO_WR(smbus, command);
 202                 if (read_write) {
 203                         TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
 204                         TXFIFO_WR(smbus, 1 | MTXFIFO_READ | MTXFIFO_STOP);
 205                 } else {
 206                         TXFIFO_WR(smbus, MTXFIFO_STOP | data->byte);
 207                 }
 208                 break;
 209         case I2C_SMBUS_WORD_DATA:
 210                 TXFIFO_WR(smbus, addr | MTXFIFO_START);
 211                 TXFIFO_WR(smbus, command);
 212                 if (read_write) {
 213                         TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
 214                         TXFIFO_WR(smbus, 2 | MTXFIFO_READ | MTXFIFO_STOP);
 215                 } else {
 216                         TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M);
 217                         TXFIFO_WR(smbus, MTXFIFO_STOP | (data->word >> 8));
 218                 }
 219                 break;
 220         case I2C_SMBUS_BLOCK_DATA:
 221                 TXFIFO_WR(smbus, addr | MTXFIFO_START);
 222                 TXFIFO_WR(smbus, command);
 223                 if (read_write) {
 224                         TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
 225                         TXFIFO_WR(smbus, 1 | MTXFIFO_READ);
 226                         rd = RXFIFO_RD(smbus);
 227                         len = min_t(u8, (rd & MRXFIFO_DATA_M),
 228                                     I2C_SMBUS_BLOCK_MAX);
 229                         TXFIFO_WR(smbus, len | MTXFIFO_READ |
 230                                          MTXFIFO_STOP);
 231                 } else {
 232                         len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX);
 233                         TXFIFO_WR(smbus, len);
 234                         for (i = 1; i < len; i++)
 235                                 TXFIFO_WR(smbus, data->block[i]);
 236                         TXFIFO_WR(smbus, data->block[len] | MTXFIFO_STOP);
 237                 }
 238                 break;
 239         case I2C_SMBUS_PROC_CALL:
 240                 read_write = I2C_SMBUS_READ;
 241                 TXFIFO_WR(smbus, addr | MTXFIFO_START);
 242                 TXFIFO_WR(smbus, command);
 243                 TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M);
 244                 TXFIFO_WR(smbus, (data->word >> 8) & MTXFIFO_DATA_M);
 245                 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
 246                 TXFIFO_WR(smbus, 2 | MTXFIFO_STOP | MTXFIFO_READ);
 247                 break;
 248         case I2C_SMBUS_BLOCK_PROC_CALL:
 249                 len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX - 1);
 250                 read_write = I2C_SMBUS_READ;
 251                 TXFIFO_WR(smbus, addr | MTXFIFO_START);
 252                 TXFIFO_WR(smbus, command);
 253                 TXFIFO_WR(smbus, len);
 254                 for (i = 1; i <= len; i++)
 255                         TXFIFO_WR(smbus, data->block[i]);
 256                 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ);
 257                 TXFIFO_WR(smbus, MTXFIFO_READ | 1);
 258                 rd = RXFIFO_RD(smbus);
 259                 len = min_t(u8, (rd & MRXFIFO_DATA_M),
 260                             I2C_SMBUS_BLOCK_MAX - len);
 261                 TXFIFO_WR(smbus, len | MTXFIFO_READ | MTXFIFO_STOP);
 262                 break;
 263
 264         default:
 265                 dev_warn(&adapter->dev, "Unsupported transaction %d\n", size);
 266                 return -EINVAL;
 267         }
 268
 269         err = pasemi_smb_waitready(smbus);
 270         if (err)
 271                 goto reset_out;
 272
 273         if (read_write == I2C_SMBUS_WRITE)
 274                 return 0;
 275
 276         switch (size) {
 277         case I2C_SMBUS_BYTE:
 278         case I2C_SMBUS_BYTE_DATA:
 279                 rd = RXFIFO_RD(smbus);
 280                 if (rd & MRXFIFO_EMPTY) {
 281                         err = -ENODATA;
 282                         goto reset_out;
 283                 }
 284                 data->byte = rd & MRXFIFO_DATA_M;
 285                 break;
 286         case I2C_SMBUS_WORD_DATA:
 287         case I2C_SMBUS_PROC_CALL:
 288                 rd = RXFIFO_RD(smbus);
 289                 if (rd & MRXFIFO_EMPTY) {
 290                         err = -ENODATA;
 291                         goto reset_out;
 292                 }
 293                 data->word = rd & MRXFIFO_DATA_M;
 294                 rd = RXFIFO_RD(smbus);
 295                 if (rd & MRXFIFO_EMPTY) {
 296                         err = -ENODATA;
 297                         goto reset_out;
 298                 }
 299                 data->word |= (rd & MRXFIFO_DATA_M) << 8;
 300                 break;
 301         case I2C_SMBUS_BLOCK_DATA:
 302         case I2C_SMBUS_BLOCK_PROC_CALL:
 303                 data->block[0] = len;
 304                 for (i = 1; i <= len; i ++) {
 305                         rd = RXFIFO_RD(smbus);
 306                         if (rd & MRXFIFO_EMPTY) {
 307                                 err = -ENODATA;
 308                                 goto reset_out;
 309                         }
 310                         data->block[i] = rd & MRXFIFO_DATA_M;
 311                 }
 312                 break;
 313         }
 314
 315         return 0;
 316
 317  reset_out:
 318         reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
 319                   (CLK_100K_DIV & CTL_CLK_M)));
 320         return err;
 321 }
 322
 323 static u32 pasemi_smb_func(struct i2c_adapter *adapter)
 324 {
 325         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 326                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 327                I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL |
 328                I2C_FUNC_SMBUS_BLOCK_PROC_CALL | I2C_FUNC_I2C;
 329 }
 330
 331 static const struct i2c_algorithm smbus_algorithm = {
 332         .master_xfer    = pasemi_i2c_xfer,
 333         .smbus_xfer     = pasemi_smb_xfer,
 334         .functionality  = pasemi_smb_func,
 335 };
 336
 337 static int pasemi_smb_probe(struct pci_dev *dev,
 338                                       const struct pci_device_id *id)
 339 {
 340         struct pasemi_smbus *smbus;
 341         int error;
 342
 343         if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO))
 344                 return -ENODEV;
 345
 346         smbus = kzalloc(sizeof(struct pasemi_smbus), GFP_KERNEL);
 347         if (!smbus)
 348                 return -ENOMEM;
 349
 350         smbus->dev = dev;
 351         smbus->base = pci_resource_start(dev, 0);
 352         smbus->size = pci_resource_len(dev, 0);
 353
 354         if (!request_region(smbus->base, smbus->size,
 355                             pasemi_smb_driver.name)) {
 356                 error = -EBUSY;
 357                 goto out_kfree;
 358         }
 359
 360         smbus->adapter.owner = THIS_MODULE;
 361         snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
 362                  "PA Semi SMBus adapter at 0x%lx", smbus->base);
 363         smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 364         smbus->adapter.algo = &smbus_algorithm;
 365         smbus->adapter.algo_data = smbus;
 366
 367         /* set up the sysfs linkage to our parent device */
 368         smbus->adapter.dev.parent = &dev->dev;
 369
 370         reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
 371                   (CLK_100K_DIV & CTL_CLK_M)));
 372
 373         error = i2c_add_adapter(&smbus->adapter);
 374         if (error)
 375                 goto out_release_region;
 376
 377         pci_set_drvdata(dev, smbus);
 378
 379         return 0;
 380
 381  out_release_region:
 382         release_region(smbus->base, smbus->size);
 383  out_kfree:
 384         kfree(smbus);
 385         return error;
 386 }
 387
 388 static void pasemi_smb_remove(struct pci_dev *dev)
 389 {
 390         struct pasemi_smbus *smbus = pci_get_drvdata(dev);
 391
 392         i2c_del_adapter(&smbus->adapter);
 393         release_region(smbus->base, smbus->size);
 394         kfree(smbus);
 395 }
 396
 397 static const struct pci_device_id pasemi_smb_ids[] = {
 398         { PCI_DEVICE(0x1959, 0xa003) },
 399         { 0, }
 400 };
 401
 402 MODULE_DEVICE_TABLE(pci, pasemi_smb_ids);
 403
 404 static struct pci_driver pasemi_smb_driver = {
 405         .name           = "i2c-pasemi",
 406         .id_table       = pasemi_smb_ids,
 407         .probe          = pasemi_smb_probe,
 408         .remove         = pasemi_smb_remove,
 409 };
 410
 411 module_pci_driver(pasemi_smb_driver);
 412
 413 MODULE_LICENSE("GPL");
 414 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
 415 MODULE_DESCRIPTION("PA Semi PWRficient SMBus driver");