drivers/i2c/busses/i2c-piix4.c

   1 /*
   2     Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
   3     Philip Edelbrock <phil@netroedge.com>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14 */
  15
  16 /*
  17    Supports:
  18         Intel PIIX4, 440MX
  19         Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
  20         ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800
  21         AMD Hudson-2, ML, CZ
  22         SMSC Victory66
  23
  24    Note: we assume there can only be one device, with one or more
  25    SMBus interfaces.
  26    The device can register multiple i2c_adapters (up to PIIX4_MAX_ADAPTERS).
  27    For devices supporting multiple ports the i2c_adapter should provide
  28    an i2c_algorithm to access them.
  29 */
  30
  31 #include <linux/module.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/pci.h>
  34 #include <linux/kernel.h>
  35 #include <linux/delay.h>
  36 #include <linux/stddef.h>
  37 #include <linux/ioport.h>
  38 #include <linux/i2c.h>
  39 #include <linux/slab.h>
  40 #include <linux/dmi.h>
  41 #include <linux/acpi.h>
  42 #include <linux/io.h>
  43 #include <linux/mutex.h>
  44
  45
  46 /* PIIX4 SMBus address offsets */
  47 #define SMBHSTSTS       (0 + piix4_smba)
  48 #define SMBHSLVSTS      (1 + piix4_smba)
  49 #define SMBHSTCNT       (2 + piix4_smba)
  50 #define SMBHSTCMD       (3 + piix4_smba)
  51 #define SMBHSTADD       (4 + piix4_smba)
  52 #define SMBHSTDAT0      (5 + piix4_smba)
  53 #define SMBHSTDAT1      (6 + piix4_smba)
  54 #define SMBBLKDAT       (7 + piix4_smba)
  55 #define SMBSLVCNT       (8 + piix4_smba)
  56 #define SMBSHDWCMD      (9 + piix4_smba)
  57 #define SMBSLVEVT       (0xA + piix4_smba)
  58 #define SMBSLVDAT       (0xC + piix4_smba)
  59
  60 /* count for request_region */
  61 #define SMBIOSIZE       8
  62
  63 /* PCI Address Constants */
  64 #define SMBBA           0x090
  65 #define SMBHSTCFG       0x0D2
  66 #define SMBSLVC         0x0D3
  67 #define SMBSHDW1        0x0D4
  68 #define SMBSHDW2        0x0D5
  69 #define SMBREV          0x0D6
  70
  71 /* Other settings */
  72 #define MAX_TIMEOUT     500
  73 #define  ENABLE_INT9    0
  74
  75 /* PIIX4 constants */
  76 #define PIIX4_QUICK             0x00
  77 #define PIIX4_BYTE              0x04
  78 #define PIIX4_BYTE_DATA         0x08
  79 #define PIIX4_WORD_DATA         0x0C
  80 #define PIIX4_BLOCK_DATA        0x14
  81
  82 /* Multi-port constants */
  83 #define PIIX4_MAX_ADAPTERS 4
  84
  85 /* SB800 constants */
  86 #define SB800_PIIX4_SMB_IDX             0xcd6
  87
  88 /* SB800 port is selected by bits 2:1 of the smb_en register (0x2c) */
  89 #define SB800_PIIX4_PORT_IDX            0x2c
  90 #define SB800_PIIX4_PORT_IDX_MASK       0x06
  91
  92 /* insmod parameters */
  93
  94 /* If force is set to anything different from 0, we forcibly enable the
  95    PIIX4. DANGEROUS! */
  96 static int force;
  97 module_param (force, int, 0);
  98 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
  99
 100 /* If force_addr is set to anything different from 0, we forcibly enable
 101    the PIIX4 at the given address. VERY DANGEROUS! */
 102 static int force_addr;
 103 module_param (force_addr, int, 0);
 104 MODULE_PARM_DESC(force_addr,
 105                  "Forcibly enable the PIIX4 at the given address. "
 106                  "EXTREMELY DANGEROUS!");
 107
 108 static int srvrworks_csb5_delay;
 109 static struct pci_driver piix4_driver;
 110
 111 static const struct dmi_system_id piix4_dmi_blacklist[] = {
 112         {
 113                 .ident = "Sapphire AM2RD790",
 114                 .matches = {
 115                         DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
 116                         DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
 117                 },
 118         },
 119         {
 120                 .ident = "DFI Lanparty UT 790FX",
 121                 .matches = {
 122                         DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
 123                         DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
 124                 },
 125         },
 126         { }
 127 };
 128
 129 /* The IBM entry is in a separate table because we only check it
 130    on Intel-based systems */
 131 static const struct dmi_system_id piix4_dmi_ibm[] = {
 132         {
 133                 .ident = "IBM",
 134                 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
 135         },
 136         { },
 137 };
 138
 139 /* SB800 globals */
 140 static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = {
 141         "SDA0", "SDA2", "SDA3", "SDA4"
 142 };
 143 static const char *piix4_aux_port_name_sb800 = "SDA1";
 144
 145 struct i2c_piix4_adapdata {
 146         unsigned short smba;
 147
 148         /* SB800 */
 149         bool sb800_main;
 150         unsigned short port;
 151         struct mutex *mutex;
 152 };
 153
 154 static int piix4_setup(struct pci_dev *PIIX4_dev,
 155                        const struct pci_device_id *id)
 156 {
 157         unsigned char temp;
 158         unsigned short piix4_smba;
 159
 160         if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
 161             (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
 162                 srvrworks_csb5_delay = 1;
 163
 164         /* On some motherboards, it was reported that accessing the SMBus
 165            caused severe hardware problems */
 166         if (dmi_check_system(piix4_dmi_blacklist)) {
 167                 dev_err(&PIIX4_dev->dev,
 168                         "Accessing the SMBus on this system is unsafe!\n");
 169                 return -EPERM;
 170         }
 171
 172         /* Don't access SMBus on IBM systems which get corrupted eeproms */
 173         if (dmi_check_system(piix4_dmi_ibm) &&
 174                         PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
 175                 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
 176                         "may corrupt your serial eeprom! Refusing to load "
 177                         "module!\n");
 178                 return -EPERM;
 179         }
 180
 181         /* Determine the address of the SMBus areas */
 182         if (force_addr) {
 183                 piix4_smba = force_addr & 0xfff0;
 184                 force = 0;
 185         } else {
 186                 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
 187                 piix4_smba &= 0xfff0;
 188                 if(piix4_smba == 0) {
 189                         dev_err(&PIIX4_dev->dev, "SMBus base address "
 190                                 "uninitialized - upgrade BIOS or use "
 191                                 "force_addr=0xaddr\n");
 192                         return -ENODEV;
 193                 }
 194         }
 195
 196         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 197                 return -ENODEV;
 198
 199         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 200                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
 201                         piix4_smba);
 202                 return -EBUSY;
 203         }
 204
 205         pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
 206
 207         /* If force_addr is set, we program the new address here. Just to make
 208            sure, we disable the PIIX4 first. */
 209         if (force_addr) {
 210                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
 211                 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
 212                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
 213                 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
 214                         "new address %04x!\n", piix4_smba);
 215         } else if ((temp & 1) == 0) {
 216                 if (force) {
 217                         /* This should never need to be done, but has been
 218                          * noted that many Dell machines have the SMBus
 219                          * interface on the PIIX4 disabled!? NOTE: This assumes
 220                          * I/O space and other allocations WERE done by the
 221                          * Bios!  Don't complain if your hardware does weird
 222                          * things after enabling this. :') Check for Bios
 223                          * updates before resorting to this.
 224                          */
 225                         pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
 226                                               temp | 1);
 227                         dev_notice(&PIIX4_dev->dev,
 228                                    "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n");
 229                 } else {
 230                         dev_err(&PIIX4_dev->dev,
 231                                 "SMBus Host Controller not enabled!\n");
 232                         release_region(piix4_smba, SMBIOSIZE);
 233                         return -ENODEV;
 234                 }
 235         }
 236
 237         if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
 238                 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
 239         else if ((temp & 0x0E) == 0)
 240                 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
 241         else
 242                 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
 243                         "(or code out of date)!\n");
 244
 245         pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
 246         dev_info(&PIIX4_dev->dev,
 247                  "SMBus Host Controller at 0x%x, revision %d\n",
 248                  piix4_smba, temp);
 249
 250         return piix4_smba;
 251 }
 252
 253 static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
 254                              const struct pci_device_id *id, u8 aux)
 255 {
 256         unsigned short piix4_smba;
 257         u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status;
 258         u8 i2ccfg, i2ccfg_offset = 0x10;
 259
 260         /* SB800 and later SMBus does not support forcing address */
 261         if (force || force_addr) {
 262                 dev_err(&PIIX4_dev->dev, "SMBus does not support "
 263                         "forcing address!\n");
 264                 return -EINVAL;
 265         }
 266
 267         /* Determine the address of the SMBus areas */
 268         if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
 269              PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
 270              PIIX4_dev->revision >= 0x41) ||
 271             (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
 272              PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
 273              PIIX4_dev->revision >= 0x49))
 274                 smb_en = 0x00;
 275         else
 276                 smb_en = (aux) ? 0x28 : 0x2c;
 277
 278         outb_p(smb_en, SB800_PIIX4_SMB_IDX);
 279         smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
 280         outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
 281         smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
 282
 283         if (!smb_en) {
 284                 smb_en_status = smba_en_lo & 0x10;
 285                 piix4_smba = smba_en_hi << 8;
 286                 if (aux)
 287                         piix4_smba |= 0x20;
 288         } else {
 289                 smb_en_status = smba_en_lo & 0x01;
 290                 piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
 291         }
 292
 293         if (!smb_en_status) {
 294                 dev_err(&PIIX4_dev->dev,
 295                         "SMBus Host Controller not enabled!\n");
 296                 return -ENODEV;
 297         }
 298
 299         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 300                 return -ENODEV;
 301
 302         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 303                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
 304                         piix4_smba);
 305                 return -EBUSY;
 306         }
 307
 308         /* Aux SMBus does not support IRQ information */
 309         if (aux) {
 310                 dev_info(&PIIX4_dev->dev,
 311                          "Auxiliary SMBus Host Controller at 0x%x\n",
 312                          piix4_smba);
 313                 return piix4_smba;
 314         }
 315
 316         /* Request the SMBus I2C bus config region */
 317         if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
 318                 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
 319                         "0x%x already in use!\n", piix4_smba + i2ccfg_offset);
 320                 release_region(piix4_smba, SMBIOSIZE);
 321                 return -EBUSY;
 322         }
 323         i2ccfg = inb_p(piix4_smba + i2ccfg_offset);
 324         release_region(piix4_smba + i2ccfg_offset, 1);
 325
 326         if (i2ccfg & 1)
 327                 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
 328         else
 329                 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
 330
 331         dev_info(&PIIX4_dev->dev,
 332                  "SMBus Host Controller at 0x%x, revision %d\n",
 333                  piix4_smba, i2ccfg >> 4);
 334
 335         return piix4_smba;
 336 }
 337
 338 static int piix4_setup_aux(struct pci_dev *PIIX4_dev,
 339                            const struct pci_device_id *id,
 340                            unsigned short base_reg_addr)
 341 {
 342         /* Set up auxiliary SMBus controllers found on some
 343          * AMD chipsets e.g. SP5100 (SB700 derivative) */
 344
 345         unsigned short piix4_smba;
 346
 347         /* Read address of auxiliary SMBus controller */
 348         pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba);
 349         if ((piix4_smba & 1) == 0) {
 350                 dev_dbg(&PIIX4_dev->dev,
 351                         "Auxiliary SMBus controller not enabled\n");
 352                 return -ENODEV;
 353         }
 354
 355         piix4_smba &= 0xfff0;
 356         if (piix4_smba == 0) {
 357                 dev_dbg(&PIIX4_dev->dev,
 358                         "Auxiliary SMBus base address uninitialized\n");
 359                 return -ENODEV;
 360         }
 361
 362         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 363                 return -ENODEV;
 364
 365         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 366                 dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x "
 367                         "already in use!\n", piix4_smba);
 368                 return -EBUSY;
 369         }
 370
 371         dev_info(&PIIX4_dev->dev,
 372                  "Auxiliary SMBus Host Controller at 0x%x\n",
 373                  piix4_smba);
 374
 375         return piix4_smba;
 376 }
 377
 378 static int piix4_transaction(struct i2c_adapter *piix4_adapter)
 379 {
 380         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter);
 381         unsigned short piix4_smba = adapdata->smba;
 382         int temp;
 383         int result = 0;
 384         int timeout = 0;
 385
 386         dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
 387                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 388                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 389                 inb_p(SMBHSTDAT1));
 390
 391         /* Make sure the SMBus host is ready to start transmitting */
 392         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 393                 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). "
 394                         "Resetting...\n", temp);
 395                 outb_p(temp, SMBHSTSTS);
 396                 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 397                         dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp);
 398                         return -EBUSY;
 399                 } else {
 400                         dev_dbg(&piix4_adapter->dev, "Successful!\n");
 401                 }
 402         }
 403
 404         /* start the transaction by setting bit 6 */
 405         outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
 406
 407         /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
 408         if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */
 409                 msleep(2);
 410         else
 411                 msleep(1);
 412
 413         while ((++timeout < MAX_TIMEOUT) &&
 414                ((temp = inb_p(SMBHSTSTS)) & 0x01))
 415                 msleep(1);
 416
 417         /* If the SMBus is still busy, we give up */
 418         if (timeout == MAX_TIMEOUT) {
 419                 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n");
 420                 result = -ETIMEDOUT;
 421         }
 422
 423         if (temp & 0x10) {
 424                 result = -EIO;
 425                 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n");
 426         }
 427
 428         if (temp & 0x08) {
 429                 result = -EIO;
 430                 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
 431                         "locked until next hard reset. (sorry!)\n");
 432                 /* Clock stops and slave is stuck in mid-transmission */
 433         }
 434
 435         if (temp & 0x04) {
 436                 result = -ENXIO;
 437                 dev_dbg(&piix4_adapter->dev, "Error: no response!\n");
 438         }
 439
 440         if (inb_p(SMBHSTSTS) != 0x00)
 441                 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
 442
 443         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 444                 dev_err(&piix4_adapter->dev, "Failed reset at end of "
 445                         "transaction (%02x)\n", temp);
 446         }
 447         dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, "
 448                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 449                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 450                 inb_p(SMBHSTDAT1));
 451         return result;
 452 }
 453
 454 /* Return negative errno on error. */
 455 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
 456                  unsigned short flags, char read_write,
 457                  u8 command, int size, union i2c_smbus_data * data)
 458 {
 459         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 460         unsigned short piix4_smba = adapdata->smba;
 461         int i, len;
 462         int status;
 463
 464         switch (size) {
 465         case I2C_SMBUS_QUICK:
 466                 outb_p((addr << 1) | read_write,
 467                        SMBHSTADD);
 468                 size = PIIX4_QUICK;
 469                 break;
 470         case I2C_SMBUS_BYTE:
 471                 outb_p((addr << 1) | read_write,
 472                        SMBHSTADD);
 473                 if (read_write == I2C_SMBUS_WRITE)
 474                         outb_p(command, SMBHSTCMD);
 475                 size = PIIX4_BYTE;
 476                 break;
 477         case I2C_SMBUS_BYTE_DATA:
 478                 outb_p((addr << 1) | read_write,
 479                        SMBHSTADD);
 480                 outb_p(command, SMBHSTCMD);
 481                 if (read_write == I2C_SMBUS_WRITE)
 482                         outb_p(data->byte, SMBHSTDAT0);
 483                 size = PIIX4_BYTE_DATA;
 484                 break;
 485         case I2C_SMBUS_WORD_DATA:
 486                 outb_p((addr << 1) | read_write,
 487                        SMBHSTADD);
 488                 outb_p(command, SMBHSTCMD);
 489                 if (read_write == I2C_SMBUS_WRITE) {
 490                         outb_p(data->word & 0xff, SMBHSTDAT0);
 491                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
 492                 }
 493                 size = PIIX4_WORD_DATA;
 494                 break;
 495         case I2C_SMBUS_BLOCK_DATA:
 496                 outb_p((addr << 1) | read_write,
 497                        SMBHSTADD);
 498                 outb_p(command, SMBHSTCMD);
 499                 if (read_write == I2C_SMBUS_WRITE) {
 500                         len = data->block[0];
 501                         if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
 502                                 return -EINVAL;
 503                         outb_p(len, SMBHSTDAT0);
 504                         inb_p(SMBHSTCNT);       /* Reset SMBBLKDAT */
 505                         for (i = 1; i <= len; i++)
 506                                 outb_p(data->block[i], SMBBLKDAT);
 507                 }
 508                 size = PIIX4_BLOCK_DATA;
 509                 break;
 510         default:
 511                 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
 512                 return -EOPNOTSUPP;
 513         }
 514
 515         outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
 516
 517         status = piix4_transaction(adap);
 518         if (status)
 519                 return status;
 520
 521         if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
 522                 return 0;
 523
 524
 525         switch (size) {
 526         case PIIX4_BYTE:
 527         case PIIX4_BYTE_DATA:
 528                 data->byte = inb_p(SMBHSTDAT0);
 529                 break;
 530         case PIIX4_WORD_DATA:
 531                 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
 532                 break;
 533         case PIIX4_BLOCK_DATA:
 534                 data->block[0] = inb_p(SMBHSTDAT0);
 535                 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
 536                         return -EPROTO;
 537                 inb_p(SMBHSTCNT);       /* Reset SMBBLKDAT */
 538                 for (i = 1; i <= data->block[0]; i++)
 539                         data->block[i] = inb_p(SMBBLKDAT);
 540                 break;
 541         }
 542         return 0;
 543 }
 544
 545 /*
 546  * Handles access to multiple SMBus ports on the SB800.
 547  * The port is selected by bits 2:1 of the smb_en register (0x2c).
 548  * Returns negative errno on error.
 549  *
 550  * Note: The selected port must be returned to the initial selection to avoid
 551  * problems on certain systems.
 552  */
 553 static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
 554                  unsigned short flags, char read_write,
 555                  u8 command, int size, union i2c_smbus_data *data)
 556 {
 557         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 558         u8 smba_en_lo;
 559         u8 port;
 560         int retval;
 561
 562         mutex_lock(adapdata->mutex);
 563
 564         outb_p(SB800_PIIX4_PORT_IDX, SB800_PIIX4_SMB_IDX);
 565         smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
 566
 567         port = adapdata->port;
 568         if ((smba_en_lo & SB800_PIIX4_PORT_IDX_MASK) != (port << 1))
 569                 outb_p((smba_en_lo & ~SB800_PIIX4_PORT_IDX_MASK) | (port << 1),
 570                        SB800_PIIX4_SMB_IDX + 1);
 571
 572         retval = piix4_access(adap, addr, flags, read_write,
 573                               command, size, data);
 574
 575         outb_p(smba_en_lo, SB800_PIIX4_SMB_IDX + 1);
 576
 577         mutex_unlock(adapdata->mutex);
 578
 579         return retval;
 580 }
 581
 582 static u32 piix4_func(struct i2c_adapter *adapter)
 583 {
 584         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 585             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 586             I2C_FUNC_SMBUS_BLOCK_DATA;
 587 }
 588
 589 static const struct i2c_algorithm smbus_algorithm = {
 590         .smbus_xfer     = piix4_access,
 591         .functionality  = piix4_func,
 592 };
 593
 594 static const struct i2c_algorithm piix4_smbus_algorithm_sb800 = {
 595         .smbus_xfer     = piix4_access_sb800,
 596         .functionality  = piix4_func,
 597 };
 598
 599 static const struct pci_device_id piix4_ids[] = {
 600         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
 601         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
 602         { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
 603         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
 604         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
 605         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
 606         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
 607         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
 608         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) },
 609         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 610                      PCI_DEVICE_ID_SERVERWORKS_OSB4) },
 611         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 612                      PCI_DEVICE_ID_SERVERWORKS_CSB5) },
 613         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 614                      PCI_DEVICE_ID_SERVERWORKS_CSB6) },
 615         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 616                      PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
 617         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 618                      PCI_DEVICE_ID_SERVERWORKS_HT1100LD) },
 619         { 0, }
 620 };
 621
 622 MODULE_DEVICE_TABLE (pci, piix4_ids);
 623
 624 static struct i2c_adapter *piix4_main_adapters[PIIX4_MAX_ADAPTERS];
 625 static struct i2c_adapter *piix4_aux_adapter;
 626
 627 static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
 628                              const char *name, struct i2c_adapter **padap)
 629 {
 630         struct i2c_adapter *adap;
 631         struct i2c_piix4_adapdata *adapdata;
 632         int retval;
 633
 634         adap = kzalloc(sizeof(*adap), GFP_KERNEL);
 635         if (adap == NULL) {
 636                 release_region(smba, SMBIOSIZE);
 637                 return -ENOMEM;
 638         }
 639
 640         adap->owner = THIS_MODULE;
 641         adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 642         adap->algo = &smbus_algorithm;
 643
 644         adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL);
 645         if (adapdata == NULL) {
 646                 kfree(adap);
 647                 release_region(smba, SMBIOSIZE);
 648                 return -ENOMEM;
 649         }
 650
 651         adapdata->smba = smba;
 652
 653         /* set up the sysfs linkage to our parent device */
 654         adap->dev.parent = &dev->dev;
 655
 656         snprintf(adap->name, sizeof(adap->name),
 657                 "SMBus PIIX4 adapter %s at %04x", name, smba);
 658
 659         i2c_set_adapdata(adap, adapdata);
 660
 661         retval = i2c_add_adapter(adap);
 662         if (retval) {
 663                 dev_err(&dev->dev, "Couldn't register adapter!\n");
 664                 kfree(adapdata);
 665                 kfree(adap);
 666                 release_region(smba, SMBIOSIZE);
 667                 return retval;
 668         }
 669
 670         *padap = adap;
 671         return 0;
 672 }
 673
 674 static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba)
 675 {
 676         struct mutex *mutex;
 677         struct i2c_piix4_adapdata *adapdata;
 678         int port;
 679         int retval;
 680
 681         mutex = kzalloc(sizeof(*mutex), GFP_KERNEL);
 682         if (mutex == NULL)
 683                 return -ENOMEM;
 684
 685         mutex_init(mutex);
 686
 687         for (port = 0; port < PIIX4_MAX_ADAPTERS; port++) {
 688                 retval = piix4_add_adapter(dev, smba,
 689                                            piix4_main_port_names_sb800[port],
 690                                            &piix4_main_adapters[port]);
 691                 if (retval < 0)
 692                         goto error;
 693
 694                 piix4_main_adapters[port]->algo = &piix4_smbus_algorithm_sb800;
 695
 696                 adapdata = i2c_get_adapdata(piix4_main_adapters[port]);
 697                 adapdata->sb800_main = true;
 698                 adapdata->port = port;
 699                 adapdata->mutex = mutex;
 700         }
 701
 702         return retval;
 703
 704 error:
 705         dev_err(&dev->dev,
 706                 "Error setting up SB800 adapters. Unregistering!\n");
 707         while (--port >= 0) {
 708                 adapdata = i2c_get_adapdata(piix4_main_adapters[port]);
 709                 if (adapdata->smba) {
 710                         i2c_del_adapter(piix4_main_adapters[port]);
 711                         kfree(adapdata);
 712                         kfree(piix4_main_adapters[port]);
 713                         piix4_main_adapters[port] = NULL;
 714                 }
 715         }
 716
 717         kfree(mutex);
 718
 719         return retval;
 720 }
 721
 722 static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
 723 {
 724         int retval;
 725
 726         if ((dev->vendor == PCI_VENDOR_ID_ATI &&
 727              dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
 728              dev->revision >= 0x40) ||
 729             dev->vendor == PCI_VENDOR_ID_AMD) {
 730                 if (!request_region(SB800_PIIX4_SMB_IDX, 2, "smba_idx")) {
 731                         dev_err(&dev->dev,
 732                         "SMBus base address index region 0x%x already in use!\n",
 733                         SB800_PIIX4_SMB_IDX);
 734                         return -EBUSY;
 735                 }
 736
 737                 /* base address location etc changed in SB800 */
 738                 retval = piix4_setup_sb800(dev, id, 0);
 739                 if (retval < 0) {
 740                         release_region(SB800_PIIX4_SMB_IDX, 2);
 741                         return retval;
 742                 }
 743
 744                 /*
 745                  * Try to register multiplexed main SMBus adapter,
 746                  * give up if we can't
 747                  */
 748                 retval = piix4_add_adapters_sb800(dev, retval);
 749                 if (retval < 0) {
 750                         release_region(SB800_PIIX4_SMB_IDX, 2);
 751                         return retval;
 752                 }
 753         } else {
 754                 retval = piix4_setup(dev, id);
 755                 if (retval < 0)
 756                         return retval;
 757
 758                 /* Try to register main SMBus adapter, give up if we can't */
 759                 retval = piix4_add_adapter(dev, retval, "main",
 760                                            &piix4_main_adapters[0]);
 761                 if (retval < 0)
 762                         return retval;
 763         }
 764
 765         /* Check for auxiliary SMBus on some AMD chipsets */
 766         retval = -ENODEV;
 767
 768         if (dev->vendor == PCI_VENDOR_ID_ATI &&
 769             dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) {
 770                 if (dev->revision < 0x40) {
 771                         retval = piix4_setup_aux(dev, id, 0x58);
 772                 } else {
 773                         /* SB800 added aux bus too */
 774                         retval = piix4_setup_sb800(dev, id, 1);
 775                 }
 776         }
 777
 778         if (dev->vendor == PCI_VENDOR_ID_AMD &&
 779             dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) {
 780                 retval = piix4_setup_sb800(dev, id, 1);
 781         }
 782
 783         if (retval > 0) {
 784                 /* Try to add the aux adapter if it exists,
 785                  * piix4_add_adapter will clean up if this fails */
 786                 piix4_add_adapter(dev, retval, piix4_aux_port_name_sb800,
 787                                   &piix4_aux_adapter);
 788         }
 789
 790         return 0;
 791 }
 792
 793 static void piix4_adap_remove(struct i2c_adapter *adap)
 794 {
 795         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 796
 797         if (adapdata->smba) {
 798                 i2c_del_adapter(adap);
 799                 if (adapdata->port == 0) {
 800                         release_region(adapdata->smba, SMBIOSIZE);
 801                         if (adapdata->sb800_main) {
 802                                 kfree(adapdata->mutex);
 803                                 release_region(SB800_PIIX4_SMB_IDX, 2);
 804                         }
 805                 }
 806                 kfree(adapdata);
 807                 kfree(adap);
 808         }
 809 }
 810
 811 static void piix4_remove(struct pci_dev *dev)
 812 {
 813         int port = PIIX4_MAX_ADAPTERS;
 814
 815         while (--port >= 0) {
 816                 if (piix4_main_adapters[port]) {
 817                         piix4_adap_remove(piix4_main_adapters[port]);
 818                         piix4_main_adapters[port] = NULL;
 819                 }
 820         }
 821
 822         if (piix4_aux_adapter) {
 823                 piix4_adap_remove(piix4_aux_adapter);
 824                 piix4_aux_adapter = NULL;
 825         }
 826 }
 827
 828 static struct pci_driver piix4_driver = {
 829         .name           = "piix4_smbus",
 830         .id_table       = piix4_ids,
 831         .probe          = piix4_probe,
 832         .remove         = piix4_remove,
 833 };
 834
 835 module_pci_driver(piix4_driver);
 836
 837 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
 838                 "Philip Edelbrock <phil@netroedge.com>");
 839 MODULE_DESCRIPTION("PIIX4 SMBus driver");
 840 MODULE_LICENSE("GPL");