1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
3 * Copyright (C) 2004,2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 I2C Controller
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/config.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c-id.h>
29 #include <linux/init.h>
30 #include <linux/time.h>
31 #include <linux/interrupt.h>
32 #include <linux/sched.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/err.h>
36 #include <linux/platform_device.h>
37 #include <linux/clk.h>
39 #include <asm/hardware.h>
43 #include <asm/arch/regs-gpio.h>
44 #include <asm/arch/regs-iic.h>
45 #include <asm/arch/iic.h>
47 /* i2c controller state */
49 enum s3c24xx_i2c_state
{
59 wait_queue_head_t wait
;
66 enum s3c24xx_i2c_state state
;
72 struct resource
*ioarea
;
73 struct i2c_adapter adap
;
76 /* default platform data to use if not supplied in the platform_device
79 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform
= {
84 .sda_delay
= S3C2410_IICLC_SDA_DELAY5
| S3C2410_IICLC_FILTER_ON
,
87 /* s3c24xx_i2c_is2440()
89 * return true is this is an s3c2440
92 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c
*i2c
)
94 struct platform_device
*pdev
= to_platform_device(i2c
->dev
);
96 return !strcmp(pdev
->name
, "s3c2440-i2c");
100 /* s3c24xx_i2c_get_platformdata
102 * get the platform data associated with the given device, or return
103 * the default if there is none
106 static inline struct s3c2410_platform_i2c
*s3c24xx_i2c_get_platformdata(struct device
*dev
)
108 if (dev
->platform_data
!= NULL
)
109 return (struct s3c2410_platform_i2c
*)dev
->platform_data
;
111 return &s3c24xx_i2c_default_platform
;
114 /* s3c24xx_i2c_master_complete
116 * complete the message and wake up the caller, using the given return code,
117 * or zero to mean ok.
120 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c
*i2c
, int ret
)
122 dev_dbg(i2c
->dev
, "master_complete %d\n", ret
);
134 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c
*i2c
)
138 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
139 writel(tmp
& ~S3C2410_IICCON_ACKEN
, i2c
->regs
+ S3C2410_IICCON
);
143 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c
*i2c
)
147 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
148 writel(tmp
| S3C2410_IICCON_ACKEN
, i2c
->regs
+ S3C2410_IICCON
);
152 /* irq enable/disable functions */
154 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c
*i2c
)
158 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
159 writel(tmp
& ~S3C2410_IICCON_IRQEN
, i2c
->regs
+ S3C2410_IICCON
);
162 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c
*i2c
)
166 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
167 writel(tmp
| S3C2410_IICCON_IRQEN
, i2c
->regs
+ S3C2410_IICCON
);
171 /* s3c24xx_i2c_message_start
173 * put the start of a message onto the bus
176 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c
*i2c
,
179 unsigned int addr
= (msg
->addr
& 0x7f) << 1;
181 unsigned long iiccon
;
184 stat
|= S3C2410_IICSTAT_TXRXEN
;
186 if (msg
->flags
& I2C_M_RD
) {
187 stat
|= S3C2410_IICSTAT_MASTER_RX
;
190 stat
|= S3C2410_IICSTAT_MASTER_TX
;
192 if (msg
->flags
& I2C_M_REV_DIR_ADDR
)
195 // todo - check for wether ack wanted or not
196 s3c24xx_i2c_enable_ack(i2c
);
198 iiccon
= readl(i2c
->regs
+ S3C2410_IICCON
);
199 writel(stat
, i2c
->regs
+ S3C2410_IICSTAT
);
201 dev_dbg(i2c
->dev
, "START: %08lx to IICSTAT, %02x to DS\n", stat
, addr
);
202 writeb(addr
, i2c
->regs
+ S3C2410_IICDS
);
204 // delay a bit and reset iiccon before setting start (per samsung)
206 dev_dbg(i2c
->dev
, "iiccon, %08lx\n", iiccon
);
207 writel(iiccon
, i2c
->regs
+ S3C2410_IICCON
);
209 stat
|= S3C2410_IICSTAT_START
;
210 writel(stat
, i2c
->regs
+ S3C2410_IICSTAT
);
213 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c
*i2c
, int ret
)
215 unsigned long iicstat
= readl(i2c
->regs
+ S3C2410_IICSTAT
);
217 dev_dbg(i2c
->dev
, "STOP\n");
219 /* stop the transfer */
220 iicstat
&= ~ S3C2410_IICSTAT_START
;
221 writel(iicstat
, i2c
->regs
+ S3C2410_IICSTAT
);
223 i2c
->state
= STATE_STOP
;
225 s3c24xx_i2c_master_complete(i2c
, ret
);
226 s3c24xx_i2c_disable_irq(i2c
);
229 /* helper functions to determine the current state in the set of
230 * messages we are sending */
234 * returns TRUE if the current message is the last in the set
237 static inline int is_lastmsg(struct s3c24xx_i2c
*i2c
)
239 return i2c
->msg_idx
>= (i2c
->msg_num
- 1);
244 * returns TRUE if we this is the last byte in the current message
247 static inline int is_msglast(struct s3c24xx_i2c
*i2c
)
249 return i2c
->msg_ptr
== i2c
->msg
->len
-1;
254 * returns TRUE if we reached the end of the current message
257 static inline int is_msgend(struct s3c24xx_i2c
*i2c
)
259 return i2c
->msg_ptr
>= i2c
->msg
->len
;
262 /* i2s_s3c_irq_nextbyte
264 * process an interrupt and work out what to do
267 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c
*i2c
, unsigned long iicstat
)
273 switch (i2c
->state
) {
276 dev_err(i2c
->dev
, "%s: called in STATE_IDLE\n", __FUNCTION__
);
281 dev_err(i2c
->dev
, "%s: called in STATE_STOP\n", __FUNCTION__
);
282 s3c24xx_i2c_disable_irq(i2c
);
286 /* last thing we did was send a start condition on the
287 * bus, or started a new i2c message
290 if (iicstat
& S3C2410_IICSTAT_LASTBIT
&&
291 !(i2c
->msg
->flags
& I2C_M_IGNORE_NAK
)) {
292 /* ack was not received... */
294 dev_dbg(i2c
->dev
, "ack was not received\n");
295 s3c24xx_i2c_stop(i2c
, -EREMOTEIO
);
299 if (i2c
->msg
->flags
& I2C_M_RD
)
300 i2c
->state
= STATE_READ
;
302 i2c
->state
= STATE_WRITE
;
304 /* terminate the transfer if there is nothing to do
305 * (used by the i2c probe to find devices */
307 if (is_lastmsg(i2c
) && i2c
->msg
->len
== 0) {
308 s3c24xx_i2c_stop(i2c
, 0);
312 if (i2c
->state
== STATE_READ
)
315 /* fall through to the write state, as we will need to
316 * send a byte as well */
319 /* we are writing data to the device... check for the
320 * end of the message, and if so, work out what to do
324 if (!is_msgend(i2c
)) {
325 byte
= i2c
->msg
->buf
[i2c
->msg_ptr
++];
326 writeb(byte
, i2c
->regs
+ S3C2410_IICDS
);
328 } else if (!is_lastmsg(i2c
)) {
329 /* we need to go to the next i2c message */
331 dev_dbg(i2c
->dev
, "WRITE: Next Message\n");
337 /* check to see if we need to do another message */
338 if (i2c
->msg
->flags
& I2C_M_NOSTART
) {
340 if (i2c
->msg
->flags
& I2C_M_RD
) {
341 /* cannot do this, the controller
342 * forces us to send a new START
343 * when we change direction */
345 s3c24xx_i2c_stop(i2c
, -EINVAL
);
351 /* send the new start */
352 s3c24xx_i2c_message_start(i2c
, i2c
->msg
);
353 i2c
->state
= STATE_START
;
359 s3c24xx_i2c_stop(i2c
, 0);
364 /* we have a byte of data in the data register, do
365 * something with it, and then work out wether we are
366 * going to do any more read/write
369 if (!(i2c
->msg
->flags
& I2C_M_IGNORE_NAK
) &&
370 !(is_msglast(i2c
) && is_lastmsg(i2c
))) {
372 if (iicstat
& S3C2410_IICSTAT_LASTBIT
) {
373 dev_dbg(i2c
->dev
, "READ: No Ack\n");
375 s3c24xx_i2c_stop(i2c
, -ECONNREFUSED
);
380 byte
= readb(i2c
->regs
+ S3C2410_IICDS
);
381 i2c
->msg
->buf
[i2c
->msg_ptr
++] = byte
;
384 if (is_msglast(i2c
)) {
385 /* last byte of buffer */
388 s3c24xx_i2c_disable_ack(i2c
);
390 } else if (is_msgend(i2c
)) {
391 /* ok, we've read the entire buffer, see if there
392 * is anything else we need to do */
394 if (is_lastmsg(i2c
)) {
395 /* last message, send stop and complete */
396 dev_dbg(i2c
->dev
, "READ: Send Stop\n");
398 s3c24xx_i2c_stop(i2c
, 0);
400 /* go to the next transfer */
401 dev_dbg(i2c
->dev
, "READ: Next Transfer\n");
412 /* acknowlegde the IRQ and get back on with the work */
415 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
416 tmp
&= ~S3C2410_IICCON_IRQPEND
;
417 writel(tmp
, i2c
->regs
+ S3C2410_IICCON
);
424 * top level IRQ servicing routine
427 static irqreturn_t
s3c24xx_i2c_irq(int irqno
, void *dev_id
,
428 struct pt_regs
*regs
)
430 struct s3c24xx_i2c
*i2c
= dev_id
;
431 unsigned long status
;
434 status
= readl(i2c
->regs
+ S3C2410_IICSTAT
);
436 if (status
& S3C2410_IICSTAT_ARBITR
) {
437 // deal with arbitration loss
438 dev_err(i2c
->dev
, "deal with arbitration loss\n");
441 if (i2c
->state
== STATE_IDLE
) {
442 dev_dbg(i2c
->dev
, "IRQ: error i2c->state == IDLE\n");
444 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
445 tmp
&= ~S3C2410_IICCON_IRQPEND
;
446 writel(tmp
, i2c
->regs
+ S3C2410_IICCON
);
450 /* pretty much this leaves us with the fact that we've
451 * transmitted or received whatever byte we last sent */
453 i2s_s3c_irq_nextbyte(i2c
, status
);
460 /* s3c24xx_i2c_set_master
462 * get the i2c bus for a master transaction
465 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c
*i2c
)
467 unsigned long iicstat
;
470 while (timeout
-- > 0) {
471 iicstat
= readl(i2c
->regs
+ S3C2410_IICSTAT
);
473 if (!(iicstat
& S3C2410_IICSTAT_BUSBUSY
))
479 dev_dbg(i2c
->dev
, "timeout: GPEDAT is %08x\n",
480 __raw_readl(S3C2410_GPEDAT
));
485 /* s3c24xx_i2c_doxfer
487 * this starts an i2c transfer
490 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c
*i2c
, struct i2c_msg
*msgs
, int num
)
492 unsigned long timeout
;
495 ret
= s3c24xx_i2c_set_master(i2c
);
497 dev_err(i2c
->dev
, "cannot get bus (error %d)\n", ret
);
502 spin_lock_irq(&i2c
->lock
);
508 i2c
->state
= STATE_START
;
510 s3c24xx_i2c_enable_irq(i2c
);
511 s3c24xx_i2c_message_start(i2c
, msgs
);
512 spin_unlock_irq(&i2c
->lock
);
514 timeout
= wait_event_timeout(i2c
->wait
, i2c
->msg_num
== 0, HZ
* 5);
518 /* having these next two as dev_err() makes life very
519 * noisy when doing an i2cdetect */
522 dev_dbg(i2c
->dev
, "timeout\n");
524 dev_dbg(i2c
->dev
, "incomplete xfer (%d)\n", ret
);
526 /* ensure the stop has been through the bus */
536 * first port of call from the i2c bus code when an message needs
537 * transferring across the i2c bus.
540 static int s3c24xx_i2c_xfer(struct i2c_adapter
*adap
,
541 struct i2c_msg
*msgs
, int num
)
543 struct s3c24xx_i2c
*i2c
= (struct s3c24xx_i2c
*)adap
->algo_data
;
547 for (retry
= 0; retry
< adap
->retries
; retry
++) {
549 ret
= s3c24xx_i2c_doxfer(i2c
, msgs
, num
);
554 dev_dbg(i2c
->dev
, "Retrying transmission (%d)\n", retry
);
562 /* declare our i2c functionality */
563 static u32
s3c24xx_i2c_func(struct i2c_adapter
*adap
)
565 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
| I2C_FUNC_PROTOCOL_MANGLING
;
568 /* i2c bus registration info */
570 static struct i2c_algorithm s3c24xx_i2c_algorithm
= {
571 .master_xfer
= s3c24xx_i2c_xfer
,
572 .functionality
= s3c24xx_i2c_func
,
575 static struct s3c24xx_i2c s3c24xx_i2c
= {
576 .lock
= SPIN_LOCK_UNLOCKED
,
577 .wait
= __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c
.wait
),
579 .name
= "s3c2410-i2c",
580 .owner
= THIS_MODULE
,
581 .algo
= &s3c24xx_i2c_algorithm
,
583 .class = I2C_CLASS_HWMON
,
587 /* s3c24xx_i2c_calcdivisor
589 * return the divisor settings for a given frequency
592 static int s3c24xx_i2c_calcdivisor(unsigned long clkin
, unsigned int wanted
,
593 unsigned int *div1
, unsigned int *divs
)
595 unsigned int calc_divs
= clkin
/ wanted
;
596 unsigned int calc_div1
;
598 if (calc_divs
> (16*16))
603 calc_divs
+= calc_div1
-1;
604 calc_divs
/= calc_div1
;
614 return clkin
/ (calc_divs
* calc_div1
);
619 * test wether a frequency is within the acceptable range of error
622 static inline int freq_acceptable(unsigned int freq
, unsigned int wanted
)
624 int diff
= freq
- wanted
;
626 return (diff
>= -2 && diff
<= 2);
629 /* s3c24xx_i2c_getdivisor
631 * work out a divisor for the user requested frequency setting,
632 * either by the requested frequency, or scanning the acceptable
633 * range of frequencies until something is found
636 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c
*i2c
,
637 struct s3c2410_platform_i2c
*pdata
,
638 unsigned long *iicon
,
641 unsigned long clkin
= clk_get_rate(i2c
->clk
);
643 unsigned int divs
, div1
;
647 clkin
/= 1000; /* clkin now in KHz */
649 dev_dbg(i2c
->dev
, "pdata %p, freq %lu %lu..%lu\n",
650 pdata
, pdata
->bus_freq
, pdata
->min_freq
, pdata
->max_freq
);
652 if (pdata
->bus_freq
!= 0) {
653 freq
= s3c24xx_i2c_calcdivisor(clkin
, pdata
->bus_freq
/1000,
655 if (freq_acceptable(freq
, pdata
->bus_freq
/1000))
659 /* ok, we may have to search for something suitable... */
661 start
= (pdata
->max_freq
== 0) ? pdata
->bus_freq
: pdata
->max_freq
;
662 end
= pdata
->min_freq
;
669 for (; start
> end
; start
--) {
670 freq
= s3c24xx_i2c_calcdivisor(clkin
, start
, &div1
, &divs
);
671 if (freq_acceptable(freq
, start
))
675 /* cannot find frequency spec */
682 *iicon
|= (div1
== 512) ? S3C2410_IICCON_TXDIV_512
: 0;
688 * initialise the controller, set the IO lines and frequency
691 static int s3c24xx_i2c_init(struct s3c24xx_i2c
*i2c
)
693 unsigned long iicon
= S3C2410_IICCON_IRQEN
| S3C2410_IICCON_ACKEN
;
694 struct s3c2410_platform_i2c
*pdata
;
697 /* get the plafrom data */
699 pdata
= s3c24xx_i2c_get_platformdata(i2c
->adap
.dev
.parent
);
701 /* inititalise the gpio */
703 s3c2410_gpio_cfgpin(S3C2410_GPE15
, S3C2410_GPE15_IICSDA
);
704 s3c2410_gpio_cfgpin(S3C2410_GPE14
, S3C2410_GPE14_IICSCL
);
706 /* write slave address */
708 writeb(pdata
->slave_addr
, i2c
->regs
+ S3C2410_IICADD
);
710 dev_info(i2c
->dev
, "slave address 0x%02x\n", pdata
->slave_addr
);
712 /* we need to work out the divisors for the clock... */
714 if (s3c24xx_i2c_getdivisor(i2c
, pdata
, &iicon
, &freq
) != 0) {
715 dev_err(i2c
->dev
, "cannot meet bus frequency required\n");
719 /* todo - check that the i2c lines aren't being dragged anywhere */
721 dev_info(i2c
->dev
, "bus frequency set to %d KHz\n", freq
);
722 dev_dbg(i2c
->dev
, "S3C2410_IICCON=0x%02lx\n", iicon
);
724 writel(iicon
, i2c
->regs
+ S3C2410_IICCON
);
726 /* check for s3c2440 i2c controller */
728 if (s3c24xx_i2c_is2440(i2c
)) {
729 dev_dbg(i2c
->dev
, "S3C2440_IICLC=%08x\n", pdata
->sda_delay
);
731 writel(pdata
->sda_delay
, i2c
->regs
+ S3C2440_IICLC
);
737 static void s3c24xx_i2c_free(struct s3c24xx_i2c
*i2c
)
739 if (i2c
->clk
!= NULL
&& !IS_ERR(i2c
->clk
)) {
740 clk_disable(i2c
->clk
);
745 if (i2c
->regs
!= NULL
) {
750 if (i2c
->ioarea
!= NULL
) {
751 release_resource(i2c
->ioarea
);
759 * called by the bus driver when a suitable device is found
762 static int s3c24xx_i2c_probe(struct platform_device
*pdev
)
764 struct s3c24xx_i2c
*i2c
= &s3c24xx_i2c
;
765 struct resource
*res
;
768 /* find the clock and enable it */
770 i2c
->dev
= &pdev
->dev
;
771 i2c
->clk
= clk_get(&pdev
->dev
, "i2c");
772 if (IS_ERR(i2c
->clk
)) {
773 dev_err(&pdev
->dev
, "cannot get clock\n");
778 dev_dbg(&pdev
->dev
, "clock source %p\n", i2c
->clk
);
780 clk_enable(i2c
->clk
);
782 /* map the registers */
784 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
786 dev_err(&pdev
->dev
, "cannot find IO resource\n");
791 i2c
->ioarea
= request_mem_region(res
->start
, (res
->end
-res
->start
)+1,
794 if (i2c
->ioarea
== NULL
) {
795 dev_err(&pdev
->dev
, "cannot request IO\n");
800 i2c
->regs
= ioremap(res
->start
, (res
->end
-res
->start
)+1);
802 if (i2c
->regs
== NULL
) {
803 dev_err(&pdev
->dev
, "cannot map IO\n");
808 dev_dbg(&pdev
->dev
, "registers %p (%p, %p)\n", i2c
->regs
, i2c
->ioarea
, res
);
810 /* setup info block for the i2c core */
812 i2c
->adap
.algo_data
= i2c
;
813 i2c
->adap
.dev
.parent
= &pdev
->dev
;
815 /* initialise the i2c controller */
817 ret
= s3c24xx_i2c_init(i2c
);
821 /* find the IRQ for this unit (note, this relies on the init call to
822 * ensure no current IRQs pending
825 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
827 dev_err(&pdev
->dev
, "cannot find IRQ\n");
832 ret
= request_irq(res
->start
, s3c24xx_i2c_irq
, SA_INTERRUPT
,
836 dev_err(&pdev
->dev
, "cannot claim IRQ\n");
842 dev_dbg(&pdev
->dev
, "irq resource %p (%ld)\n", res
, res
->start
);
844 ret
= i2c_add_adapter(&i2c
->adap
);
846 dev_err(&pdev
->dev
, "failed to add bus to i2c core\n");
850 platform_set_drvdata(pdev
, i2c
);
852 dev_info(&pdev
->dev
, "%s: S3C I2C adapter\n", i2c
->adap
.dev
.bus_id
);
856 s3c24xx_i2c_free(i2c
);
861 /* s3c24xx_i2c_remove
863 * called when device is removed from the bus
866 static int s3c24xx_i2c_remove(struct platform_device
*pdev
)
868 struct s3c24xx_i2c
*i2c
= platform_get_drvdata(pdev
);
871 s3c24xx_i2c_free(i2c
);
872 platform_set_drvdata(pdev
, NULL
);
879 static int s3c24xx_i2c_resume(struct platform_device
*dev
)
881 struct s3c24xx_i2c
*i2c
= platform_get_drvdata(dev
);
884 s3c24xx_i2c_init(i2c
);
890 #define s3c24xx_i2c_resume NULL
893 /* device driver for platform bus bits */
895 static struct platform_driver s3c2410_i2c_driver
= {
896 .probe
= s3c24xx_i2c_probe
,
897 .remove
= s3c24xx_i2c_remove
,
898 .resume
= s3c24xx_i2c_resume
,
900 .owner
= THIS_MODULE
,
901 .name
= "s3c2410-i2c",
905 static struct platform_driver s3c2440_i2c_driver
= {
906 .probe
= s3c24xx_i2c_probe
,
907 .remove
= s3c24xx_i2c_remove
,
908 .resume
= s3c24xx_i2c_resume
,
910 .owner
= THIS_MODULE
,
911 .name
= "s3c2440-i2c",
915 static int __init
i2c_adap_s3c_init(void)
919 ret
= platform_driver_register(&s3c2410_i2c_driver
);
921 ret
= platform_driver_register(&s3c2440_i2c_driver
);
923 platform_driver_unregister(&s3c2410_i2c_driver
);
929 static void __exit
i2c_adap_s3c_exit(void)
931 platform_driver_unregister(&s3c2410_i2c_driver
);
932 platform_driver_unregister(&s3c2440_i2c_driver
);
935 module_init(i2c_adap_s3c_init
);
936 module_exit(i2c_adap_s3c_exit
);
938 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
939 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
940 MODULE_LICENSE("GPL");