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i2c-pnx: Fix interrupt handler, get rid of EARLY config option
[mirror_ubuntu-zesty-kernel.git] / drivers / i2c / busses / i2c-sis96x.c
1 /*
2 sis96x.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4
5 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 /*
23 This module must be considered BETA unless and until
24 the chipset manufacturer releases a datasheet.
25 The register definitions are based on the SiS630.
26
27 This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
28 for just about every machine for which users have reported.
29 If this module isn't detecting your 96x south bridge, have a
30 look there.
31
32 We assume there can only be one SiS96x with one SMBus interface.
33 */
34
35 #include <linux/module.h>
36 #include <linux/pci.h>
37 #include <linux/kernel.h>
38 #include <linux/delay.h>
39 #include <linux/stddef.h>
40 #include <linux/sched.h>
41 #include <linux/ioport.h>
42 #include <linux/i2c.h>
43 #include <linux/init.h>
44 #include <asm/io.h>
45
46 /* base address register in PCI config space */
47 #define SIS96x_BAR 0x04
48
49 /* SiS96x SMBus registers */
50 #define SMB_STS 0x00
51 #define SMB_EN 0x01
52 #define SMB_CNT 0x02
53 #define SMB_HOST_CNT 0x03
54 #define SMB_ADDR 0x04
55 #define SMB_CMD 0x05
56 #define SMB_PCOUNT 0x06
57 #define SMB_COUNT 0x07
58 #define SMB_BYTE 0x08
59 #define SMB_DEV_ADDR 0x10
60 #define SMB_DB0 0x11
61 #define SMB_DB1 0x12
62 #define SMB_SAA 0x13
63
64 /* register count for request_region */
65 #define SMB_IOSIZE 0x20
66
67 /* Other settings */
68 #define MAX_TIMEOUT 500
69
70 /* SiS96x SMBus constants */
71 #define SIS96x_QUICK 0x00
72 #define SIS96x_BYTE 0x01
73 #define SIS96x_BYTE_DATA 0x02
74 #define SIS96x_WORD_DATA 0x03
75 #define SIS96x_PROC_CALL 0x04
76 #define SIS96x_BLOCK_DATA 0x05
77
78 static struct pci_driver sis96x_driver;
79 static struct i2c_adapter sis96x_adapter;
80 static u16 sis96x_smbus_base;
81
82 static inline u8 sis96x_read(u8 reg)
83 {
84 return inb(sis96x_smbus_base + reg) ;
85 }
86
87 static inline void sis96x_write(u8 reg, u8 data)
88 {
89 outb(data, sis96x_smbus_base + reg) ;
90 }
91
92 /* Execute a SMBus transaction.
93 int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
94 */
95 static int sis96x_transaction(int size)
96 {
97 int temp;
98 int result = 0;
99 int timeout = 0;
100
101 dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
102
103 /* Make sure the SMBus host is ready to start transmitting */
104 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
105
106 dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
107 "Resetting...\n", temp);
108
109 /* kill the transaction */
110 sis96x_write(SMB_HOST_CNT, 0x20);
111
112 /* check it again */
113 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
114 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
115 return -1;
116 } else {
117 dev_dbg(&sis96x_adapter.dev, "Successful\n");
118 }
119 }
120
121 /* Turn off timeout interrupts, set fast host clock */
122 sis96x_write(SMB_CNT, 0x20);
123
124 /* clear all (sticky) status flags */
125 temp = sis96x_read(SMB_STS);
126 sis96x_write(SMB_STS, temp & 0x1e);
127
128 /* start the transaction by setting bit 4 and size bits */
129 sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));
130
131 /* We will always wait for a fraction of a second! */
132 do {
133 msleep(1);
134 temp = sis96x_read(SMB_STS);
135 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
136
137 /* If the SMBus is still busy, we give up */
138 if (timeout >= MAX_TIMEOUT) {
139 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
140 result = -1;
141 }
142
143 /* device error - probably missing ACK */
144 if (temp & 0x02) {
145 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
146 result = -1;
147 }
148
149 /* bus collision */
150 if (temp & 0x04) {
151 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
152 result = -1;
153 }
154
155 /* Finish up by resetting the bus */
156 sis96x_write(SMB_STS, temp);
157 if ((temp = sis96x_read(SMB_STS))) {
158 dev_dbg(&sis96x_adapter.dev, "Failed reset at "
159 "end of transaction! (0x%02x)\n", temp);
160 }
161
162 return result;
163 }
164
165 /* Return -1 on error. */
166 static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
167 unsigned short flags, char read_write,
168 u8 command, int size, union i2c_smbus_data * data)
169 {
170
171 switch (size) {
172 case I2C_SMBUS_QUICK:
173 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
174 size = SIS96x_QUICK;
175 break;
176
177 case I2C_SMBUS_BYTE:
178 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
179 if (read_write == I2C_SMBUS_WRITE)
180 sis96x_write(SMB_CMD, command);
181 size = SIS96x_BYTE;
182 break;
183
184 case I2C_SMBUS_BYTE_DATA:
185 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
186 sis96x_write(SMB_CMD, command);
187 if (read_write == I2C_SMBUS_WRITE)
188 sis96x_write(SMB_BYTE, data->byte);
189 size = SIS96x_BYTE_DATA;
190 break;
191
192 case I2C_SMBUS_PROC_CALL:
193 case I2C_SMBUS_WORD_DATA:
194 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
195 sis96x_write(SMB_CMD, command);
196 if (read_write == I2C_SMBUS_WRITE) {
197 sis96x_write(SMB_BYTE, data->word & 0xff);
198 sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
199 }
200 size = (size == I2C_SMBUS_PROC_CALL ?
201 SIS96x_PROC_CALL : SIS96x_WORD_DATA);
202 break;
203
204 case I2C_SMBUS_BLOCK_DATA:
205 /* TO DO: */
206 dev_info(&adap->dev, "SMBus block not implemented!\n");
207 return -1;
208 break;
209
210 default:
211 dev_info(&adap->dev, "Unsupported I2C size\n");
212 return -1;
213 break;
214 }
215
216 if (sis96x_transaction(size))
217 return -1;
218
219 if ((size != SIS96x_PROC_CALL) &&
220 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
221 return 0;
222
223 switch (size) {
224 case SIS96x_BYTE:
225 case SIS96x_BYTE_DATA:
226 data->byte = sis96x_read(SMB_BYTE);
227 break;
228
229 case SIS96x_WORD_DATA:
230 case SIS96x_PROC_CALL:
231 data->word = sis96x_read(SMB_BYTE) +
232 (sis96x_read(SMB_BYTE + 1) << 8);
233 break;
234 }
235 return 0;
236 }
237
238 static u32 sis96x_func(struct i2c_adapter *adapter)
239 {
240 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
241 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
242 I2C_FUNC_SMBUS_PROC_CALL;
243 }
244
245 static const struct i2c_algorithm smbus_algorithm = {
246 .smbus_xfer = sis96x_access,
247 .functionality = sis96x_func,
248 };
249
250 static struct i2c_adapter sis96x_adapter = {
251 .owner = THIS_MODULE,
252 .class = I2C_CLASS_HWMON,
253 .algo = &smbus_algorithm,
254 };
255
256 static struct pci_device_id sis96x_ids[] = {
257 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
258 { 0, }
259 };
260
261 MODULE_DEVICE_TABLE (pci, sis96x_ids);
262
263 static int __devinit sis96x_probe(struct pci_dev *dev,
264 const struct pci_device_id *id)
265 {
266 u16 ww = 0;
267 int retval;
268
269 if (sis96x_smbus_base) {
270 dev_err(&dev->dev, "Only one device supported.\n");
271 return -EBUSY;
272 }
273
274 pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
275 if (PCI_CLASS_SERIAL_SMBUS != ww) {
276 dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
277 return -ENODEV;
278 }
279
280 sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
281 if (!sis96x_smbus_base) {
282 dev_err(&dev->dev, "SiS96x SMBus base address "
283 "not initialized!\n");
284 return -EINVAL;
285 }
286 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
287 sis96x_smbus_base);
288
289 /* Everything is happy, let's grab the memory and set things up. */
290 if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
291 sis96x_driver.name)) {
292 dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
293 "already in use!\n", sis96x_smbus_base,
294 sis96x_smbus_base + SMB_IOSIZE - 1);
295
296 sis96x_smbus_base = 0;
297 return -EINVAL;
298 }
299
300 /* set up the driverfs linkage to our parent device */
301 sis96x_adapter.dev.parent = &dev->dev;
302
303 snprintf(sis96x_adapter.name, I2C_NAME_SIZE,
304 "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
305
306 if ((retval = i2c_add_adapter(&sis96x_adapter))) {
307 dev_err(&dev->dev, "Couldn't register adapter!\n");
308 release_region(sis96x_smbus_base, SMB_IOSIZE);
309 sis96x_smbus_base = 0;
310 }
311
312 return retval;
313 }
314
315 static void __devexit sis96x_remove(struct pci_dev *dev)
316 {
317 if (sis96x_smbus_base) {
318 i2c_del_adapter(&sis96x_adapter);
319 release_region(sis96x_smbus_base, SMB_IOSIZE);
320 sis96x_smbus_base = 0;
321 }
322 }
323
324 static struct pci_driver sis96x_driver = {
325 .name = "sis96x_smbus",
326 .id_table = sis96x_ids,
327 .probe = sis96x_probe,
328 .remove = __devexit_p(sis96x_remove),
329 };
330
331 static int __init i2c_sis96x_init(void)
332 {
333 return pci_register_driver(&sis96x_driver);
334 }
335
336 static void __exit i2c_sis96x_exit(void)
337 {
338 pci_unregister_driver(&sis96x_driver);
339 }
340
341 MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
342 MODULE_DESCRIPTION("SiS96x SMBus driver");
343 MODULE_LICENSE("GPL");
344
345 /* Register initialization functions using helper macros */
346 module_init(i2c_sis96x_init);
347 module_exit(i2c_sis96x_exit);
348