drivers/ide/pci/atiixp.c

   1 /*
   2  *  linux/drivers/ide/pci/atiixp.c      Version 0.01-bart2      Feb. 26, 2004
   3  *
   4  *  Copyright (C) 2003 ATI Inc. <hyu@ati.com>
   5  *  Copyright (C) 2004 Bartlomiej Zolnierkiewicz
   6  *
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/module.h>
  11 #include <linux/kernel.h>
  12 #include <linux/ioport.h>
  13 #include <linux/pci.h>
  14 #include <linux/hdreg.h>
  15 #include <linux/ide.h>
  16 #include <linux/delay.h>
  17 #include <linux/init.h>
  18
  19 #include <asm/io.h>
  20
  21 #define ATIIXP_IDE_PIO_TIMING           0x40
  22 #define ATIIXP_IDE_MDMA_TIMING          0x44
  23 #define ATIIXP_IDE_PIO_CONTROL          0x48
  24 #define ATIIXP_IDE_PIO_MODE             0x4a
  25 #define ATIIXP_IDE_UDMA_CONTROL         0x54
  26 #define ATIIXP_IDE_UDMA_MODE            0x56
  27
  28 typedef struct {
  29         u8 command_width;
  30         u8 recover_width;
  31 } atiixp_ide_timing;
  32
  33 static atiixp_ide_timing pio_timing[] = {
  34         { 0x05, 0x0d },
  35         { 0x04, 0x07 },
  36         { 0x03, 0x04 },
  37         { 0x02, 0x02 },
  38         { 0x02, 0x00 },
  39 };
  40
  41 static atiixp_ide_timing mdma_timing[] = {
  42         { 0x07, 0x07 },
  43         { 0x02, 0x01 },
  44         { 0x02, 0x00 },
  45 };
  46
  47 static int save_mdma_mode[4];
  48
  49 /**
  50  *      atiixp_ratemask         -       compute rate mask for ATIIXP IDE
  51  *      @drive: IDE drive to compute for
  52  *
  53  *      Returns the available modes for the ATIIXP IDE controller.
  54  */
  55
  56 static u8 atiixp_ratemask(ide_drive_t *drive)
  57 {
  58         u8 mode = 3;
  59
  60         if (!eighty_ninty_three(drive))
  61                 mode = min(mode, (u8)1);
  62         return mode;
  63 }
  64
  65 /**
  66  *      atiixp_dma_2_pio                -       return the PIO mode matching DMA
  67  *      @xfer_rate: transfer speed
  68  *
  69  *      Returns the nearest equivalent PIO timing for the PIO or DMA
  70  *      mode requested by the controller.
  71  */
  72
  73 static u8 atiixp_dma_2_pio(u8 xfer_rate) {
  74         switch(xfer_rate) {
  75                 case XFER_UDMA_6:
  76                 case XFER_UDMA_5:
  77                 case XFER_UDMA_4:
  78                 case XFER_UDMA_3:
  79                 case XFER_UDMA_2:
  80                 case XFER_UDMA_1:
  81                 case XFER_UDMA_0:
  82                 case XFER_MW_DMA_2:
  83                 case XFER_PIO_4:
  84                         return 4;
  85                 case XFER_MW_DMA_1:
  86                 case XFER_PIO_3:
  87                         return 3;
  88                 case XFER_SW_DMA_2:
  89                 case XFER_PIO_2:
  90                         return 2;
  91                 case XFER_MW_DMA_0:
  92                 case XFER_SW_DMA_1:
  93                 case XFER_SW_DMA_0:
  94                 case XFER_PIO_1:
  95                 case XFER_PIO_0:
  96                 case XFER_PIO_SLOW:
  97                 default:
  98                         return 0;
  99         }
 100 }
 101
 102 static int atiixp_ide_dma_host_on(ide_drive_t *drive)
 103 {
 104         struct pci_dev *dev = drive->hwif->pci_dev;
 105         unsigned long flags;
 106         u16 tmp16;
 107
 108         spin_lock_irqsave(&ide_lock, flags);
 109
 110         pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 111         if (save_mdma_mode[drive->dn])
 112                 tmp16 &= ~(1 << drive->dn);
 113         else
 114                 tmp16 |= (1 << drive->dn);
 115         pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 116
 117         spin_unlock_irqrestore(&ide_lock, flags);
 118
 119         return __ide_dma_host_on(drive);
 120 }
 121
 122 static int atiixp_ide_dma_host_off(ide_drive_t *drive)
 123 {
 124         struct pci_dev *dev = drive->hwif->pci_dev;
 125         unsigned long flags;
 126         u16 tmp16;
 127
 128         spin_lock_irqsave(&ide_lock, flags);
 129
 130         pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 131         tmp16 &= ~(1 << drive->dn);
 132         pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 133
 134         spin_unlock_irqrestore(&ide_lock, flags);
 135
 136         return __ide_dma_host_off(drive);
 137 }
 138
 139 /**
 140  *      atiixp_tune_drive               -       tune a drive attached to a ATIIXP
 141  *      @drive: drive to tune
 142  *      @pio: desired PIO mode
 143  *
 144  *      Set the interface PIO mode.
 145  */
 146
 147 static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
 148 {
 149         struct pci_dev *dev = drive->hwif->pci_dev;
 150         unsigned long flags;
 151         int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
 152         u32 pio_timing_data;
 153         u16 pio_mode_data;
 154
 155         spin_lock_irqsave(&ide_lock, flags);
 156
 157         pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
 158         pio_mode_data &= ~(0x07 << (drive->dn * 4));
 159         pio_mode_data |= (pio << (drive->dn * 4));
 160         pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
 161
 162         pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
 163         pio_timing_data &= ~(0xff << timing_shift);
 164         pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
 165                  (pio_timing[pio].command_width << (timing_shift + 4));
 166         pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
 167
 168         spin_unlock_irqrestore(&ide_lock, flags);
 169 }
 170
 171 /**
 172  *      atiixp_tune_chipset     -       tune a ATIIXP interface
 173  *      @drive: IDE drive to tune
 174  *      @xferspeed: speed to configure
 175  *
 176  *      Set a ATIIXP interface channel to the desired speeds. This involves
 177  *      requires the right timing data into the ATIIXP configuration space
 178  *      then setting the drive parameters appropriately
 179  */
 180
 181 static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
 182 {
 183         struct pci_dev *dev = drive->hwif->pci_dev;
 184         unsigned long flags;
 185         int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
 186         u32 tmp32;
 187         u16 tmp16;
 188         u8 speed, pio;
 189
 190         speed = ide_rate_filter(atiixp_ratemask(drive), xferspeed);
 191
 192         spin_lock_irqsave(&ide_lock, flags);
 193
 194         save_mdma_mode[drive->dn] = 0;
 195         if (speed >= XFER_UDMA_0) {
 196                 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
 197                 tmp16 &= ~(0x07 << (drive->dn * 4));
 198                 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
 199                 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
 200         } else {
 201                 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
 202                         save_mdma_mode[drive->dn] = speed;
 203                         pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
 204                         tmp32 &= ~(0xff << timing_shift);
 205                         tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
 206                                 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
 207                         pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
 208                 }
 209         }
 210
 211         spin_unlock_irqrestore(&ide_lock, flags);
 212
 213         if (speed >= XFER_SW_DMA_0)
 214                 pio = atiixp_dma_2_pio(speed);
 215         else
 216                 pio = speed - XFER_PIO_0;
 217
 218         atiixp_tuneproc(drive, pio);
 219
 220         return ide_config_drive_speed(drive, speed);
 221 }
 222
 223 /**
 224  *      atiixp_config_drive_for_dma     -       configure drive for DMA
 225  *      @drive: IDE drive to configure
 226  *
 227  *      Set up a ATIIXP interface channel for the best available speed.
 228  *      We prefer UDMA if it is available and then MWDMA. If DMA is
 229  *      not available we switch to PIO and return 0.
 230  */
 231
 232 static int atiixp_config_drive_for_dma(ide_drive_t *drive)
 233 {
 234         u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive));
 235
 236         /* If no DMA speed was available then disable DMA and use PIO. */
 237         if (!speed) {
 238                 u8 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
 239                 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
 240         }
 241
 242         (void) atiixp_speedproc(drive, speed);
 243         return ide_dma_enable(drive);
 244 }
 245
 246 /**
 247  *      atiixp_dma_check        -       set up an IDE device
 248  *      @drive: IDE drive to configure
 249  *
 250  *      Set up the ATIIXP interface for the best available speed on this
 251  *      interface, preferring DMA to PIO.
 252  */
 253
 254 static int atiixp_dma_check(ide_drive_t *drive)
 255 {
 256         ide_hwif_t *hwif        = HWIF(drive);
 257         struct hd_driveid *id   = drive->id;
 258         u8 tspeed, speed;
 259
 260         drive->init_speed = 0;
 261
 262         if ((id->capability & 1) && drive->autodma) {
 263
 264                 if (ide_use_dma(drive)) {
 265                         if (atiixp_config_drive_for_dma(drive))
 266                                 return hwif->ide_dma_on(drive);
 267                 }
 268
 269                 goto fast_ata_pio;
 270
 271         } else if ((id->capability & 8) || (id->field_valid & 2)) {
 272 fast_ata_pio:
 273                 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
 274                 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
 275                 hwif->speedproc(drive, speed);
 276                 return hwif->ide_dma_off_quietly(drive);
 277         }
 278         /* IORDY not supported */
 279         return 0;
 280 }
 281
 282 /**
 283  *      init_hwif_atiixp                -       fill in the hwif for the ATIIXP
 284  *      @hwif: IDE interface
 285  *
 286  *      Set up the ide_hwif_t for the ATIIXP interface according to the
 287  *      capabilities of the hardware.
 288  */
 289
 290 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
 291 {
 292         if (!hwif->irq)
 293                 hwif->irq = hwif->channel ? 15 : 14;
 294
 295         hwif->autodma = 0;
 296         hwif->tuneproc = &atiixp_tuneproc;
 297         hwif->speedproc = &atiixp_speedproc;
 298         hwif->drives[0].autotune = 1;
 299         hwif->drives[1].autotune = 1;
 300
 301         if (!hwif->dma_base)
 302                 return;
 303
 304         hwif->atapi_dma = 1;
 305         hwif->ultra_mask = 0x3f;
 306         hwif->mwdma_mask = 0x06;
 307         hwif->swdma_mask = 0x04;
 308
 309         /* FIXME: proper cable detection needed */
 310         hwif->udma_four = 1;
 311         hwif->ide_dma_host_on = &atiixp_ide_dma_host_on;
 312         hwif->ide_dma_host_off = &atiixp_ide_dma_host_off;
 313         hwif->ide_dma_check = &atiixp_dma_check;
 314         if (!noautodma)
 315                 hwif->autodma = 1;
 316
 317         hwif->drives[1].autodma = hwif->autodma;
 318         hwif->drives[0].autodma = hwif->autodma;
 319 }
 320
 321 static void __devinit init_hwif_sb600_legacy(ide_hwif_t *hwif)
 322 {
 323
 324         hwif->atapi_dma = 1;
 325         hwif->ultra_mask = 0x7f;
 326         hwif->mwdma_mask = 0x07;
 327         hwif->swdma_mask = 0x07;
 328
 329         if (!noautodma)
 330                 hwif->autodma = 1;
 331         hwif->drives[0].autodma = hwif->autodma;
 332         hwif->drives[1].autodma = hwif->autodma;
 333 }
 334
 335 static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
 336         {       /* 0 */
 337                 .name           = "ATIIXP",
 338                 .init_hwif      = init_hwif_atiixp,
 339                 .channels       = 2,
 340                 .autodma        = AUTODMA,
 341                 .enablebits     = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
 342                 .bootable       = ON_BOARD,
 343         },{     /* 1 */
 344                 .name           = "ATI SB600 SATA Legacy IDE",
 345                 .init_hwif      = init_hwif_sb600_legacy,
 346                 .channels       = 2,
 347                 .autodma        = AUTODMA,
 348                 .bootable       = ON_BOARD,
 349         }
 350 };
 351
 352 /**
 353  *      atiixp_init_one -       called when a ATIIXP is found
 354  *      @dev: the atiixp device
 355  *      @id: the matching pci id
 356  *
 357  *      Called when the PCI registration layer (or the IDE initialization)
 358  *      finds a device matching our IDE device tables.
 359  */
 360
 361 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 362 {
 363         return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
 364 }
 365
 366 static struct pci_device_id atiixp_pci_tbl[] = {
 367         { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 368         { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 369         { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 370         { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 371         { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, PCI_ANY_ID, PCI_ANY_ID, (PCI_CLASS_STORAGE_IDE<<8)|0x8a, 0xffff05, 1},
 372         { 0, },
 373 };
 374 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
 375
 376 static struct pci_driver driver = {
 377         .name           = "ATIIXP_IDE",
 378         .id_table       = atiixp_pci_tbl,
 379         .probe          = atiixp_init_one,
 380 };
 381
 382 static int atiixp_ide_init(void)
 383 {
 384         return ide_pci_register_driver(&driver);
 385 }
 386
 387 module_init(atiixp_ide_init);
 388
 389 MODULE_AUTHOR("HUI YU");
 390 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
 391 MODULE_LICENSE("GPL");