2 * Copyright (C) 1995-1996 Linus Torvalds & authors (see below)
6 * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov)
7 * mlord@pobox.com (Mark Lord)
9 * See linux/MAINTAINERS for address of current maintainer.
11 * This file provides support for the advanced features and bugs
12 * of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
14 * These chips are basically fucked by design, and getting this driver
15 * to work on every motherboard design that uses this screwed chip seems
16 * bloody well impossible. However, we're still trying.
18 * Version 0.97 worked for everybody.
20 * User feedback is essential. Many thanks to the beta test team:
22 * A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
23 * bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
24 * chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
25 * derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
26 * flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
27 * j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
28 * kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
29 * peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
30 * s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
31 * steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
32 * liug@mama.indstate.edu, and others.
34 * Version 0.01 Initial version, hacked out of ide.c,
35 * and #include'd rather than compiled separately.
36 * This will get cleaned up in a subsequent release.
38 * Version 0.02 Fixes for vlb initialization code, enable prefetch
39 * for versions 'B' and 'C' of chip by default,
42 * Version 0.03 Added reset of secondary interface,
43 * and black list for devices which are not compatible
44 * with prefetch mode. Separate function for setting
45 * prefetch is added, possibly it will be called some
46 * day from ioctl processing code.
48 * Version 0.04 Now configs/compiles separate from ide.c
50 * Version 0.05 Major rewrite of interface timing code.
51 * Added new function cmd640_set_mode to set PIO mode
52 * from ioctl call. New drives added to black list.
54 * Version 0.06 More code cleanup. Prefetch is enabled only for
55 * detected hard drives, not included in prefetch
58 * Version 0.07 Changed to more conservative drive tuning policy.
59 * Unknown drives, which report PIO < 4 are set to
60 * (reported_PIO - 1) if it is supported, or to PIO0.
61 * List of known drives extended by info provided by
62 * CMD at their ftp site.
64 * Version 0.08 Added autotune/noautotune support.
66 * Version 0.09 Try to be smarter about 2nd port enabling.
67 * Version 0.10 Be nice and don't reset 2nd port.
68 * Version 0.11 Try to handle more weird situations.
70 * Version 0.12 Lots of bug fixes from Laszlo Peter
71 * irq unmasking disabled for reliability.
72 * try to be even smarter about the second port.
73 * tidy up source code formatting.
74 * Version 0.13 permit irq unmasking again.
75 * Version 0.90 massive code cleanup, some bugs fixed.
76 * defaults all drives to PIO mode0, prefetch off.
77 * autotune is OFF by default, with compile time flag.
78 * prefetch can be turned OFF/ON using "hdparm -p8/-p9"
79 * (requires hdparm-3.1 or newer)
80 * Version 0.91 first release to linux-kernel list.
81 * Version 0.92 move initial reg dump to separate callable function
82 * change "readahead" to "prefetch" to avoid confusion
83 * Version 0.95 respect original BIOS timings unless autotuning.
84 * tons of code cleanup and rearrangement.
85 * added CONFIG_BLK_DEV_CMD640_ENHANCED option
86 * prevent use of unmask when prefetch is on
87 * Version 0.96 prevent use of io_32bit when prefetch is off
88 * Version 0.97 fix VLB secondary interface for sjd@slip.net
89 * other minor tune-ups: 0.96 was very good.
90 * Version 0.98 ignore PCI version when disabled by BIOS
91 * Version 0.99 display setup/active/recovery clocks with PIO mode
92 * Version 1.00 Mmm.. cannot depend on PCMD_ENA in all systems
93 * Version 1.01 slow/fast devsel can be selected with "hdparm -p6/-p7"
94 * ("fast" is necessary for 32bit I/O in some systems)
95 * Version 1.02 fix bug that resulted in slow "setup times"
96 * (patch courtesy of Zoltan Hidvegi)
99 #define CMD640_PREFETCH_MASKS 1
101 /*#define CMD640_DUMP_REGS */
103 #include <linux/types.h>
104 #include <linux/kernel.h>
105 #include <linux/delay.h>
106 #include <linux/hdreg.h>
107 #include <linux/ide.h>
108 #include <linux/init.h>
112 #define DRV_NAME "cmd640"
114 static int cmd640_vlb
;
117 * CMD640 specific registers definition.
123 #define PCMD_ENA 0x01
137 #define CFR_DEVREV 0x03
138 #define CFR_IDE01INTR 0x04
139 #define CFR_DEVID 0x18
140 #define CFR_AT_VESA_078h 0x20
141 #define CFR_DSA1 0x40
142 #define CFR_DSA0 0x80
145 #define CNTRL_DIS_RA0 0x40
146 #define CNTRL_DIS_RA1 0x80
147 #define CNTRL_ENA_2ND 0x08
154 #define ARTTIM23 0x57
155 #define ARTTIM23_DIS_RA2 0x04
156 #define ARTTIM23_DIS_RA3 0x08
157 #define DRWTIM23 0x58
161 * Registers and masks for easy access by drive index:
163 static u8 prefetch_regs
[4] = {CNTRL
, CNTRL
, ARTTIM23
, ARTTIM23
};
164 static u8 prefetch_masks
[4] = {CNTRL_DIS_RA0
, CNTRL_DIS_RA1
, ARTTIM23_DIS_RA2
, ARTTIM23_DIS_RA3
};
166 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
168 static u8 arttim_regs
[4] = {ARTTIM0
, ARTTIM1
, ARTTIM23
, ARTTIM23
};
169 static u8 drwtim_regs
[4] = {DRWTIM0
, DRWTIM1
, DRWTIM23
, DRWTIM23
};
172 * Current cmd640 timing values for each drive.
173 * The defaults for each are the slowest possible timings.
175 static u8 setup_counts
[4] = {4, 4, 4, 4}; /* Address setup count (in clocks) */
176 static u8 active_counts
[4] = {16, 16, 16, 16}; /* Active count (encoded) */
177 static u8 recovery_counts
[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
179 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
181 static DEFINE_SPINLOCK(cmd640_lock
);
184 * These are initialized to point at the devices we control
186 static ide_hwif_t
*cmd_hwif0
, *cmd_hwif1
;
189 * Interface to access cmd640x registers
191 static unsigned int cmd640_key
;
192 static void (*__put_cmd640_reg
)(u16 reg
, u8 val
);
193 static u8 (*__get_cmd640_reg
)(u16 reg
);
196 * This is read from the CFR reg, and is used in several places.
198 static unsigned int cmd640_chip_version
;
201 * The CMD640x chip does not support DWORD config write cycles, but some
202 * of the BIOSes use them to implement the config services.
203 * Therefore, we must use direct IO instead.
206 /* PCI method 1 access */
208 static void put_cmd640_reg_pci1(u16 reg
, u8 val
)
210 outl_p((reg
& 0xfc) | cmd640_key
, 0xcf8);
211 outb_p(val
, (reg
& 3) | 0xcfc);
214 static u8
get_cmd640_reg_pci1(u16 reg
)
216 outl_p((reg
& 0xfc) | cmd640_key
, 0xcf8);
217 return inb_p((reg
& 3) | 0xcfc);
220 /* PCI method 2 access (from CMD datasheet) */
222 static void put_cmd640_reg_pci2(u16 reg
, u8 val
)
225 outb_p(val
, cmd640_key
+ reg
);
229 static u8
get_cmd640_reg_pci2(u16 reg
)
234 b
= inb_p(cmd640_key
+ reg
);
241 static void put_cmd640_reg_vlb(u16 reg
, u8 val
)
243 outb_p(reg
, cmd640_key
);
244 outb_p(val
, cmd640_key
+ 4);
247 static u8
get_cmd640_reg_vlb(u16 reg
)
249 outb_p(reg
, cmd640_key
);
250 return inb_p(cmd640_key
+ 4);
253 static u8
get_cmd640_reg(u16 reg
)
258 spin_lock_irqsave(&cmd640_lock
, flags
);
259 b
= __get_cmd640_reg(reg
);
260 spin_unlock_irqrestore(&cmd640_lock
, flags
);
264 static void put_cmd640_reg(u16 reg
, u8 val
)
268 spin_lock_irqsave(&cmd640_lock
, flags
);
269 __put_cmd640_reg(reg
, val
);
270 spin_unlock_irqrestore(&cmd640_lock
, flags
);
273 static int __init
match_pci_cmd640_device(void)
275 const u8 ven_dev
[4] = {0x95, 0x10, 0x40, 0x06};
277 for (i
= 0; i
< 4; i
++) {
278 if (get_cmd640_reg(i
) != ven_dev
[i
])
281 #ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
282 if ((get_cmd640_reg(PCMD
) & PCMD_ENA
) == 0) {
283 printk("ide: cmd640 on PCI disabled by BIOS\n");
286 #endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
287 return 1; /* success */
291 * Probe for CMD640x -- pci method 1
293 static int __init
probe_for_cmd640_pci1(void)
295 __get_cmd640_reg
= get_cmd640_reg_pci1
;
296 __put_cmd640_reg
= put_cmd640_reg_pci1
;
297 for (cmd640_key
= 0x80000000;
298 cmd640_key
<= 0x8000f800;
299 cmd640_key
+= 0x800) {
300 if (match_pci_cmd640_device())
301 return 1; /* success */
307 * Probe for CMD640x -- pci method 2
309 static int __init
probe_for_cmd640_pci2(void)
311 __get_cmd640_reg
= get_cmd640_reg_pci2
;
312 __put_cmd640_reg
= put_cmd640_reg_pci2
;
313 for (cmd640_key
= 0xc000; cmd640_key
<= 0xcf00; cmd640_key
+= 0x100) {
314 if (match_pci_cmd640_device())
315 return 1; /* success */
321 * Probe for CMD640x -- vlb
323 static int __init
probe_for_cmd640_vlb(void)
327 __get_cmd640_reg
= get_cmd640_reg_vlb
;
328 __put_cmd640_reg
= put_cmd640_reg_vlb
;
330 b
= get_cmd640_reg(CFR
);
331 if (b
== 0xff || b
== 0x00 || (b
& CFR_AT_VESA_078h
)) {
333 b
= get_cmd640_reg(CFR
);
334 if (b
== 0xff || b
== 0x00 || !(b
& CFR_AT_VESA_078h
))
337 return 1; /* success */
341 * Returns 1 if an IDE interface/drive exists at 0x170,
342 * Returns 0 otherwise.
344 static int __init
secondary_port_responding(void)
348 spin_lock_irqsave(&cmd640_lock
, flags
);
350 outb_p(0x0a, 0x176); /* select drive0 */
352 if ((inb_p(0x176) & 0x1f) != 0x0a) {
353 outb_p(0x1a, 0x176); /* select drive1 */
355 if ((inb_p(0x176) & 0x1f) != 0x1a) {
356 spin_unlock_irqrestore(&cmd640_lock
, flags
);
357 return 0; /* nothing responded */
360 spin_unlock_irqrestore(&cmd640_lock
, flags
);
361 return 1; /* success */
364 #ifdef CMD640_DUMP_REGS
366 * Dump out all cmd640 registers. May be called from ide.c
368 static void cmd640_dump_regs(void)
370 unsigned int reg
= cmd640_vlb
? 0x50 : 0x00;
372 /* Dump current state of chip registers */
373 printk("ide: cmd640 internal register dump:");
374 for (; reg
<= 0x59; reg
++) {
376 printk("\n%04x:", reg
);
377 printk(" %02x", get_cmd640_reg(reg
));
383 #ifndef CONFIG_BLK_DEV_CMD640_ENHANCED
385 * Check whether prefetch is on for a drive,
386 * and initialize the unmask flags for safe operation.
388 static void __init
check_prefetch(ide_drive_t
*drive
, unsigned int index
)
390 u8 b
= get_cmd640_reg(prefetch_regs
[index
]);
392 if (b
& prefetch_masks
[index
]) { /* is prefetch off? */
393 drive
->no_unmask
= 0;
394 drive
->no_io_32bit
= 1;
397 #if CMD640_PREFETCH_MASKS
398 drive
->no_unmask
= 1;
401 drive
->no_io_32bit
= 0;
406 * Sets prefetch mode for a drive.
408 static void set_prefetch_mode(ide_drive_t
*drive
, unsigned int index
, int mode
)
411 int reg
= prefetch_regs
[index
];
414 spin_lock_irqsave(&cmd640_lock
, flags
);
415 b
= __get_cmd640_reg(reg
);
416 if (mode
) { /* want prefetch on? */
417 #if CMD640_PREFETCH_MASKS
418 drive
->no_unmask
= 1;
421 drive
->no_io_32bit
= 0;
422 b
&= ~prefetch_masks
[index
]; /* enable prefetch */
424 drive
->no_unmask
= 0;
425 drive
->no_io_32bit
= 1;
427 b
|= prefetch_masks
[index
]; /* disable prefetch */
429 __put_cmd640_reg(reg
, b
);
430 spin_unlock_irqrestore(&cmd640_lock
, flags
);
434 * Dump out current drive clocks settings
436 static void display_clocks(unsigned int index
)
438 u8 active_count
, recovery_count
;
440 active_count
= active_counts
[index
];
441 if (active_count
== 1)
443 recovery_count
= recovery_counts
[index
];
444 if (active_count
> 3 && recovery_count
== 1)
446 if (cmd640_chip_version
> 1)
447 recovery_count
+= 1; /* cmd640b uses (count + 1)*/
448 printk(", clocks=%d/%d/%d\n", setup_counts
[index
], active_count
, recovery_count
);
452 * Pack active and recovery counts into single byte representation
455 static inline u8
pack_nibbles(u8 upper
, u8 lower
)
457 return ((upper
& 0x0f) << 4) | (lower
& 0x0f);
461 * This routine writes the prepared setup/active/recovery counts
462 * for a drive into the cmd640 chipset registers to active them.
464 static void program_drive_counts(ide_drive_t
*drive
, unsigned int index
)
467 u8 setup_count
= setup_counts
[index
];
468 u8 active_count
= active_counts
[index
];
469 u8 recovery_count
= recovery_counts
[index
];
472 * Set up address setup count and drive read/write timing registers.
473 * Primary interface has individual count/timing registers for
474 * each drive. Secondary interface has one common set of registers,
475 * so we merge the timings, using the slowest value for each timing.
478 ide_hwif_t
*hwif
= drive
->hwif
;
479 ide_drive_t
*peer
= &hwif
->drives
[!drive
->select
.b
.unit
];
480 unsigned int mate
= index
^ 1;
483 if (setup_count
< setup_counts
[mate
])
484 setup_count
= setup_counts
[mate
];
485 if (active_count
< active_counts
[mate
])
486 active_count
= active_counts
[mate
];
487 if (recovery_count
< recovery_counts
[mate
])
488 recovery_count
= recovery_counts
[mate
];
493 * Convert setup_count to internal chipset representation
495 switch (setup_count
) {
496 case 4: setup_count
= 0x00; break;
497 case 3: setup_count
= 0x80; break;
499 case 2: setup_count
= 0x40; break;
500 default: setup_count
= 0xc0; /* case 5 */
504 * Now that everything is ready, program the new timings
506 spin_lock_irqsave(&cmd640_lock
, flags
);
508 * Program the address_setup clocks into ARTTIM reg,
509 * and then the active/recovery counts into the DRWTIM reg
510 * (this converts counts of 16 into counts of zero -- okay).
512 setup_count
|= __get_cmd640_reg(arttim_regs
[index
]) & 0x3f;
513 __put_cmd640_reg(arttim_regs
[index
], setup_count
);
514 __put_cmd640_reg(drwtim_regs
[index
], pack_nibbles(active_count
, recovery_count
));
515 spin_unlock_irqrestore(&cmd640_lock
, flags
);
519 * Set a specific pio_mode for a drive
521 static void cmd640_set_mode(ide_drive_t
*drive
, unsigned int index
,
522 u8 pio_mode
, unsigned int cycle_time
)
524 struct ide_timing
*t
;
525 int setup_time
, active_time
, recovery_time
, clock_time
;
526 u8 setup_count
, active_count
, recovery_count
, recovery_count2
, cycle_count
;
530 bus_speed
= ide_vlb_clk
? ide_vlb_clk
: 50;
532 bus_speed
= ide_pci_clk
? ide_pci_clk
: 33;
537 t
= ide_timing_find_mode(XFER_PIO_0
+ pio_mode
);
538 setup_time
= t
->setup
;
539 active_time
= t
->active
;
541 recovery_time
= cycle_time
- (setup_time
+ active_time
);
542 clock_time
= 1000 / bus_speed
;
543 cycle_count
= DIV_ROUND_UP(cycle_time
, clock_time
);
545 setup_count
= DIV_ROUND_UP(setup_time
, clock_time
);
547 active_count
= DIV_ROUND_UP(active_time
, clock_time
);
548 if (active_count
< 2)
549 active_count
= 2; /* minimum allowed by cmd640 */
551 recovery_count
= DIV_ROUND_UP(recovery_time
, clock_time
);
552 recovery_count2
= cycle_count
- (setup_count
+ active_count
);
553 if (recovery_count2
> recovery_count
)
554 recovery_count
= recovery_count2
;
555 if (recovery_count
< 2)
556 recovery_count
= 2; /* minimum allowed by cmd640 */
557 if (recovery_count
> 17) {
558 active_count
+= recovery_count
- 17;
561 if (active_count
> 16)
562 active_count
= 16; /* maximum allowed by cmd640 */
563 if (cmd640_chip_version
> 1)
564 recovery_count
-= 1; /* cmd640b uses (count + 1)*/
565 if (recovery_count
> 16)
566 recovery_count
= 16; /* maximum allowed by cmd640 */
568 setup_counts
[index
] = setup_count
;
569 active_counts
[index
] = active_count
;
570 recovery_counts
[index
] = recovery_count
;
573 * In a perfect world, we might set the drive pio mode here
574 * (using WIN_SETFEATURE) before continuing.
576 * But we do not, because:
577 * 1) this is the wrong place to do it (proper is do_special() in ide.c)
578 * 2) in practice this is rarely, if ever, necessary
580 program_drive_counts(drive
, index
);
583 static void cmd640_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
585 unsigned int index
= 0, cycle_time
;
589 case 6: /* set fast-devsel off */
590 case 7: /* set fast-devsel on */
591 b
= get_cmd640_reg(CNTRL
) & ~0x27;
594 put_cmd640_reg(CNTRL
, b
);
595 printk("%s: %sabled cmd640 fast host timing (devsel)\n",
596 drive
->name
, (pio
& 1) ? "en" : "dis");
598 case 8: /* set prefetch off */
599 case 9: /* set prefetch on */
600 set_prefetch_mode(drive
, index
, pio
& 1);
601 printk("%s: %sabled cmd640 prefetch\n",
602 drive
->name
, (pio
& 1) ? "en" : "dis");
606 cycle_time
= ide_pio_cycle_time(drive
, pio
);
607 cmd640_set_mode(drive
, index
, pio
, cycle_time
);
609 printk("%s: selected cmd640 PIO mode%d (%dns)",
610 drive
->name
, pio
, cycle_time
);
612 display_clocks(index
);
614 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
616 static void cmd640_init_dev(ide_drive_t
*drive
)
618 unsigned int i
= drive
->hwif
->channel
* 2 + drive
->select
.b
.unit
;
620 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
622 * Reset timing to the slowest speed and turn off prefetch.
623 * This way, the drive identify code has a better chance.
625 setup_counts
[i
] = 4; /* max possible */
626 active_counts
[i
] = 16; /* max possible */
627 recovery_counts
[i
] = 16; /* max possible */
628 program_drive_counts(drive
, i
);
629 set_prefetch_mode(drive
, i
, 0);
630 printk(KERN_INFO DRV_NAME
": drive%d timings/prefetch cleared\n", i
);
633 * Set the drive unmask flags to match the prefetch setting.
635 check_prefetch(drive
, i
);
636 printk(KERN_INFO DRV_NAME
": drive%d timings/prefetch(%s) preserved\n",
637 i
, drive
->no_io_32bit
? "off" : "on");
638 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
642 static const struct ide_port_ops cmd640_port_ops
= {
643 .init_dev
= cmd640_init_dev
,
644 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
645 .set_pio_mode
= cmd640_set_pio_mode
,
649 static int pci_conf1(void)
654 spin_lock_irqsave(&cmd640_lock
, flags
);
657 outl(0x80000000, 0xCF8);
658 if (inl(0xCF8) == 0x80000000) {
660 spin_unlock_irqrestore(&cmd640_lock
, flags
);
664 spin_unlock_irqrestore(&cmd640_lock
, flags
);
668 static int pci_conf2(void)
672 spin_lock_irqsave(&cmd640_lock
, flags
);
676 if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
677 spin_unlock_irqrestore(&cmd640_lock
, flags
);
680 spin_unlock_irqrestore(&cmd640_lock
, flags
);
684 static const struct ide_port_info cmd640_port_info __initdata
= {
685 .chipset
= ide_cmd640
,
686 .host_flags
= IDE_HFLAG_SERIALIZE
|
688 IDE_HFLAG_ABUSE_PREFETCH
|
689 IDE_HFLAG_ABUSE_FAST_DEVSEL
,
690 .port_ops
= &cmd640_port_ops
,
691 .pio_mask
= ATA_PIO5
,
694 static int cmd640x_init_one(unsigned long base
, unsigned long ctl
)
696 if (!request_region(base
, 8, DRV_NAME
)) {
697 printk(KERN_ERR
"%s: I/O resource 0x%lX-0x%lX not free.\n",
698 DRV_NAME
, base
, base
+ 7);
702 if (!request_region(ctl
, 1, DRV_NAME
)) {
703 printk(KERN_ERR
"%s: I/O resource 0x%lX not free.\n",
705 release_region(base
, 8);
713 * Probe for a cmd640 chipset, and initialize it if found.
715 static int __init
cmd640x_init(void)
717 int second_port_cmd640
= 0, rc
;
718 const char *bus_type
, *port2
;
720 u8 idx
[4] = { 0xff, 0xff, 0xff, 0xff };
723 if (cmd640_vlb
&& probe_for_cmd640_vlb()) {
727 /* Find out what kind of PCI probing is supported otherwise
728 Justin Gibbs will sulk.. */
729 if (pci_conf1() && probe_for_cmd640_pci1())
730 bus_type
= "PCI (type1)";
731 else if (pci_conf2() && probe_for_cmd640_pci2())
732 bus_type
= "PCI (type2)";
737 * Undocumented magic (there is no 0x5b reg in specs)
739 put_cmd640_reg(0x5b, 0xbd);
740 if (get_cmd640_reg(0x5b) != 0xbd) {
741 printk(KERN_ERR
"ide: cmd640 init failed: wrong value in reg 0x5b\n");
744 put_cmd640_reg(0x5b, 0);
746 #ifdef CMD640_DUMP_REGS
751 * Documented magic begins here
753 cfr
= get_cmd640_reg(CFR
);
754 cmd640_chip_version
= cfr
& CFR_DEVREV
;
755 if (cmd640_chip_version
== 0) {
756 printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version
);
760 rc
= cmd640x_init_one(0x1f0, 0x3f6);
764 rc
= cmd640x_init_one(0x170, 0x376);
766 release_region(0x3f6, 1);
767 release_region(0x1f0, 8);
771 memset(&hw
, 0, sizeof(hw
));
773 ide_std_init_ports(&hw
[0], 0x1f0, 0x3f6);
775 hw
[0].chipset
= ide_cmd640
;
777 ide_std_init_ports(&hw
[1], 0x170, 0x376);
779 hw
[1].chipset
= ide_cmd640
;
781 printk(KERN_INFO
"cmd640: buggy cmd640%c interface on %s, config=0x%02x"
782 "\n", 'a' + cmd640_chip_version
- 1, bus_type
, cfr
);
784 cmd_hwif0
= ide_find_port();
787 * Initialize data for primary port
790 ide_init_port_hw(cmd_hwif0
, &hw
[0]);
791 idx
[0] = cmd_hwif0
->index
;
795 * Ensure compatibility by always using the slowest timings
796 * for access to the drive's command register block,
797 * and reset the prefetch burstsize to default (512 bytes).
799 * Maybe we need a way to NOT do these on *some* systems?
801 put_cmd640_reg(CMDTIM
, 0);
802 put_cmd640_reg(BRST
, 0x40);
804 b
= get_cmd640_reg(CNTRL
);
807 * Try to enable the secondary interface, if not already enabled
809 if (secondary_port_responding()) {
810 if ((b
& CNTRL_ENA_2ND
)) {
811 second_port_cmd640
= 1;
813 } else if (cmd640_vlb
) {
814 second_port_cmd640
= 1;
817 port2
= "not cmd640";
819 put_cmd640_reg(CNTRL
, b
^ CNTRL_ENA_2ND
); /* toggle the bit */
820 if (secondary_port_responding()) {
821 second_port_cmd640
= 1;
824 put_cmd640_reg(CNTRL
, b
); /* restore original setting */
825 port2
= "not responding";
830 * Initialize data for secondary cmd640 port, if enabled
832 if (second_port_cmd640
) {
833 cmd_hwif1
= ide_find_port();
835 ide_init_port_hw(cmd_hwif1
, &hw
[1]);
836 idx
[1] = cmd_hwif1
->index
;
839 printk(KERN_INFO
"cmd640: %sserialized, secondary interface %s\n",
840 second_port_cmd640
? "" : "not ", port2
);
842 #ifdef CMD640_DUMP_REGS
846 ide_device_add(idx
, &cmd640_port_info
);
851 module_param_named(probe_vlb
, cmd640_vlb
, bool, 0);
852 MODULE_PARM_DESC(probe_vlb
, "probe for VLB version of CMD640 chipset");
854 module_init(cmd640x_init
);
856 MODULE_LICENSE("GPL");