drivers/ide/pci/cs5520.c

   1 /*
   2  *      IDE tuning and bus mastering support for the CS5510/CS5520
   3  *      chipsets
   4  *
   5  *      The CS5510/CS5520 are slightly unusual devices. Unlike the
   6  *      typical IDE controllers they do bus mastering with the drive in
   7  *      PIO mode and smarter silicon.
   8  *
   9  *      The practical upshot of this is that we must always tune the
  10  *      drive for the right PIO mode. We must also ignore all the blacklists
  11  *      and the drive bus mastering DMA information.
  12  *
  13  *      *** This driver is strictly experimental ***
  14  *
  15  *      (c) Copyright Red Hat Inc 2002
  16  *
  17  * This program is free software; you can redistribute it and/or modify it
  18  * under the terms of the GNU General Public License as published by the
  19  * Free Software Foundation; either version 2, or (at your option) any
  20  * later version.
  21  *
  22  * This program is distributed in the hope that it will be useful, but
  23  * WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  25  * General Public License for more details.
  26  *
  27  * For the avoidance of doubt the "preferred form" of this code is one which
  28  * is in an open non patent encumbered format. Where cryptographic key signing
  29  * forms part of the process of creating an executable the information
  30  * including keys needed to generate an equivalently functional executable
  31  * are deemed to be part of the source code.
  32  *
  33  */
  34
  35 #include <linux/module.h>
  36 #include <linux/types.h>
  37 #include <linux/kernel.h>
  38 #include <linux/hdreg.h>
  39 #include <linux/init.h>
  40 #include <linux/pci.h>
  41 #include <linux/ide.h>
  42 #include <linux/dma-mapping.h>
  43
  44 struct pio_clocks
  45 {
  46         int address;
  47         int assert;
  48         int recovery;
  49 };
  50
  51 static struct pio_clocks cs5520_pio_clocks[]={
  52         {3, 6, 11},
  53         {2, 5, 6},
  54         {1, 4, 3},
  55         {1, 3, 2},
  56         {1, 2, 1}
  57 };
  58
  59 static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
  60 {
  61         ide_hwif_t *hwif = HWIF(drive);
  62         struct pci_dev *pdev = to_pci_dev(hwif->dev);
  63         int controller = drive->dn > 1 ? 1 : 0;
  64
  65         /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
  66
  67         /* 8bit CAT/CRT - 8bit command timing for channel */
  68         pci_write_config_byte(pdev, 0x62 + controller,
  69                 (cs5520_pio_clocks[pio].recovery << 4) |
  70                 (cs5520_pio_clocks[pio].assert));
  71
  72         /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
  73
  74         /* FIXME: should these use address ? */
  75         /* Data read timing */
  76         pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
  77                 (cs5520_pio_clocks[pio].recovery << 4) |
  78                 (cs5520_pio_clocks[pio].assert));
  79         /* Write command timing */
  80         pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
  81                 (cs5520_pio_clocks[pio].recovery << 4) |
  82                 (cs5520_pio_clocks[pio].assert));
  83 }
  84
  85 static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
  86 {
  87         printk(KERN_ERR "cs55x0: bad ide timing.\n");
  88
  89         cs5520_set_pio_mode(drive, 0);
  90 }
  91
  92 /*
  93  *      We wrap the DMA activate to set the vdma flag. This is needed
  94  *      so that the IDE DMA layer issues PIO not DMA commands over the
  95  *      DMA channel
  96  *
  97  *      ATAPI is harder so disable it for now using IDE_HFLAG_NO_ATAPI_DMA
  98  */
  99
 100 static void cs5520_dma_host_set(ide_drive_t *drive, int on)
 101 {
 102         drive->vdma = on;
 103         ide_dma_host_set(drive, on);
 104 }
 105
 106 static const struct ide_port_ops cs5520_port_ops = {
 107         .set_pio_mode           = cs5520_set_pio_mode,
 108         .set_dma_mode           = cs5520_set_dma_mode,
 109 };
 110
 111 static const struct ide_dma_ops cs5520_dma_ops = {
 112         .dma_host_set           = cs5520_dma_host_set,
 113         .dma_setup              = ide_dma_setup,
 114         .dma_exec_cmd           = ide_dma_exec_cmd,
 115         .dma_start              = ide_dma_start,
 116         .dma_end                = __ide_dma_end,
 117         .dma_test_irq           = ide_dma_test_irq,
 118         .dma_lost_irq           = ide_dma_lost_irq,
 119         .dma_timeout            = ide_dma_timeout,
 120 };
 121
 122 /* FIXME: VDMA is disabled because it caused system hangs */
 123 #define DECLARE_CS_DEV(name_str)                                \
 124         {                                                       \
 125                 .name           = name_str,                     \
 126                 .port_ops       = &cs5520_port_ops,             \
 127                 .dma_ops        = &cs5520_dma_ops,              \
 128                 .host_flags     = IDE_HFLAG_ISA_PORTS |         \
 129                                   IDE_HFLAG_CS5520 |            \
 130                                   IDE_HFLAG_NO_ATAPI_DMA |      \
 131                                   IDE_HFLAG_ABUSE_SET_DMA_MODE, \
 132                 .pio_mask       = ATA_PIO4,                     \
 133         }
 134
 135 static const struct ide_port_info cyrix_chipsets[] __devinitdata = {
 136         /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
 137         /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
 138 };
 139
 140 /*
 141  *      The 5510/5520 are a bit weird. They don't quite set up the way
 142  *      the PCI helper layer expects so we must do much of the set up
 143  *      work longhand.
 144  */
 145
 146 static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 147 {
 148         const struct ide_port_info *d = &cyrix_chipsets[id->driver_data];
 149         u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
 150
 151         ide_setup_pci_noise(dev, d);
 152
 153         /* We must not grab the entire device, it has 'ISA' space in its
 154          * BARS too and we will freak out other bits of the kernel
 155          */
 156         if (pci_enable_device_io(dev)) {
 157                 printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name);
 158                 return -ENODEV;
 159         }
 160         pci_set_master(dev);
 161         if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
 162                 printk(KERN_WARNING "cs5520: No suitable DMA available.\n");
 163                 return -ENODEV;
 164         }
 165
 166         /*
 167          *      Now the chipset is configured we can let the core
 168          *      do all the device setup for us
 169          */
 170
 171         ide_pci_setup_ports(dev, d, 14, &idx[0]);
 172
 173         ide_device_add(idx, d);
 174
 175         return 0;
 176 }
 177
 178 static const struct pci_device_id cs5520_pci_tbl[] = {
 179         { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 },
 180         { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 },
 181         { 0, },
 182 };
 183 MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl);
 184
 185 static struct pci_driver driver = {
 186         .name           = "Cyrix_IDE",
 187         .id_table       = cs5520_pci_tbl,
 188         .probe          = cs5520_init_one,
 189 };
 190
 191 static int __init cs5520_ide_init(void)
 192 {
 193         return ide_pci_register_driver(&driver);
 194 }
 195
 196 module_init(cs5520_ide_init);
 197
 198 MODULE_AUTHOR("Alan Cox");
 199 MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
 200 MODULE_LICENSE("GPL");