2 * Copyright (C) 1997-1998 Mark Lord <mlord@pobox.com>
3 * Copyright (C) 1998 Eddie C. Dost <ecd@skynet.be>
4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2004 Grant Grundler <grundler at parisc-linux.org>
7 * Inspired by an earlier effort from David S. Miller <davem@redhat.com>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/interrupt.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/ide.h>
17 #include <linux/init.h>
21 #define DRV_NAME "ns87415"
24 /* SUPERIO 87560 is a PoS chip that NatSem denies exists.
25 * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
26 * which use the integrated NS87514 cell for CD-ROM support.
27 * i.e we have to support for CD-ROM installs.
28 * See drivers/parisc/superio.c for more gory details.
30 #include <asm/superio.h>
32 #define SUPERIO_IDE_MAX_RETRIES 25
34 /* Because of a defect in Super I/O, all reads of the PCI DMA status
35 * registers, IDE status register and the IDE select register need to be
38 static u8
superio_ide_inb (unsigned long port
)
41 int retries
= SUPERIO_IDE_MAX_RETRIES
;
43 /* printk(" [ reading port 0x%x with retry ] ", port); */
49 } while (tmp
== 0 && retries
-- > 0);
54 static u8
superio_read_status(ide_hwif_t
*hwif
)
56 return superio_ide_inb(hwif
->io_ports
.status_addr
);
59 static u8
superio_read_sff_dma_status(ide_hwif_t
*hwif
)
61 return superio_ide_inb(hwif
->dma_base
+ ATA_DMA_STATUS
);
64 static void superio_tf_read(ide_drive_t
*drive
, ide_task_t
*task
)
66 struct ide_io_ports
*io_ports
= &drive
->hwif
->io_ports
;
67 struct ide_taskfile
*tf
= &task
->tf
;
69 if (task
->tf_flags
& IDE_TFLAG_IN_DATA
) {
70 u16 data
= inw(io_ports
->data_addr
);
72 tf
->data
= data
& 0xff;
73 tf
->hob_data
= (data
>> 8) & 0xff;
76 /* be sure we're looking at the low order bits */
77 outb(ATA_DEVCTL_OBS
& ~0x80, io_ports
->ctl_addr
);
79 if (task
->tf_flags
& IDE_TFLAG_IN_FEATURE
)
80 tf
->feature
= inb(io_ports
->feature_addr
);
81 if (task
->tf_flags
& IDE_TFLAG_IN_NSECT
)
82 tf
->nsect
= inb(io_ports
->nsect_addr
);
83 if (task
->tf_flags
& IDE_TFLAG_IN_LBAL
)
84 tf
->lbal
= inb(io_ports
->lbal_addr
);
85 if (task
->tf_flags
& IDE_TFLAG_IN_LBAM
)
86 tf
->lbam
= inb(io_ports
->lbam_addr
);
87 if (task
->tf_flags
& IDE_TFLAG_IN_LBAH
)
88 tf
->lbah
= inb(io_ports
->lbah_addr
);
89 if (task
->tf_flags
& IDE_TFLAG_IN_DEVICE
)
90 tf
->device
= superio_ide_inb(io_ports
->device_addr
);
92 if (task
->tf_flags
& IDE_TFLAG_LBA48
) {
93 outb(ATA_DEVCTL_OBS
| 0x80, io_ports
->ctl_addr
);
95 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_FEATURE
)
96 tf
->hob_feature
= inb(io_ports
->feature_addr
);
97 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_NSECT
)
98 tf
->hob_nsect
= inb(io_ports
->nsect_addr
);
99 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_LBAL
)
100 tf
->hob_lbal
= inb(io_ports
->lbal_addr
);
101 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_LBAM
)
102 tf
->hob_lbam
= inb(io_ports
->lbam_addr
);
103 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_LBAH
)
104 tf
->hob_lbah
= inb(io_ports
->lbah_addr
);
108 static const struct ide_tp_ops superio_tp_ops
= {
109 .exec_command
= ide_exec_command
,
110 .read_status
= superio_read_status
,
111 .read_altstatus
= ide_read_altstatus
,
112 .read_sff_dma_status
= superio_read_sff_dma_status
,
114 .set_irq
= ide_set_irq
,
116 .tf_load
= ide_tf_load
,
117 .tf_read
= superio_tf_read
,
119 .input_data
= ide_input_data
,
120 .output_data
= ide_output_data
,
123 static void __devinit
superio_init_iops(struct hwif_s
*hwif
)
125 struct pci_dev
*pdev
= to_pci_dev(hwif
->dev
);
127 u8 port
= hwif
->channel
, tmp
;
129 dma_stat
= (pci_resource_start(pdev
, 4) & ~3) + (!port
? 2 : 0xa);
131 /* Clear error/interrupt, enable dma */
132 tmp
= superio_ide_inb(dma_stat
);
133 outb(tmp
| 0x66, dma_stat
);
137 static unsigned int ns87415_count
= 0, ns87415_control
[MAX_HWIFS
] = { 0 };
140 * This routine either enables/disables (according to drive->present)
141 * the IRQ associated with the port (HWIF(drive)),
142 * and selects either PIO or DMA handshaking for the next I/O operation.
144 static void ns87415_prepare_drive (ide_drive_t
*drive
, unsigned int use_dma
)
146 ide_hwif_t
*hwif
= HWIF(drive
);
147 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
148 unsigned int bit
, other
, new, *old
= (unsigned int *) hwif
->select_data
;
151 local_irq_save(flags
);
154 /* Adjust IRQ enable bit */
155 bit
= 1 << (8 + hwif
->channel
);
156 new = drive
->present
? (new & ~bit
) : (new | bit
);
158 /* Select PIO or DMA, DMA may only be selected for one drive/channel. */
159 bit
= 1 << (20 + drive
->select
.b
.unit
+ (hwif
->channel
<< 1));
160 other
= 1 << (20 + (1 - drive
->select
.b
.unit
) + (hwif
->channel
<< 1));
161 new = use_dma
? ((new & ~other
) | bit
) : (new & ~bit
);
167 * Don't change DMA engine settings while Write Buffers
170 (void) pci_read_config_byte(dev
, 0x43, &stat
);
171 while (stat
& 0x03) {
173 (void) pci_read_config_byte(dev
, 0x43, &stat
);
177 (void) pci_write_config_dword(dev
, 0x40, new);
180 * And let things settle...
185 local_irq_restore(flags
);
188 static void ns87415_selectproc (ide_drive_t
*drive
)
190 ns87415_prepare_drive (drive
, drive
->using_dma
);
193 static int ns87415_dma_end(ide_drive_t
*drive
)
195 ide_hwif_t
*hwif
= HWIF(drive
);
196 u8 dma_stat
= 0, dma_cmd
= 0;
198 drive
->waiting_for_dma
= 0;
199 dma_stat
= hwif
->tp_ops
->read_sff_dma_status(hwif
);
200 /* get DMA command mode */
201 dma_cmd
= inb(hwif
->dma_base
+ ATA_DMA_CMD
);
203 outb(dma_cmd
& ~1, hwif
->dma_base
+ ATA_DMA_CMD
);
204 /* from ERRATA: clear the INTR & ERROR bits */
205 dma_cmd
= inb(hwif
->dma_base
+ ATA_DMA_CMD
);
206 outb(dma_cmd
| 6, hwif
->dma_base
+ ATA_DMA_CMD
);
207 /* and free any DMA resources */
208 ide_destroy_dmatable(drive
);
209 /* verify good DMA status */
210 return (dma_stat
& 7) != 4;
213 static int ns87415_dma_setup(ide_drive_t
*drive
)
215 /* select DMA xfer */
216 ns87415_prepare_drive(drive
, 1);
217 if (!ide_dma_setup(drive
))
219 /* DMA failed: select PIO xfer */
220 ns87415_prepare_drive(drive
, 0);
224 static void __devinit
init_hwif_ns87415 (ide_hwif_t
*hwif
)
226 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
227 unsigned int ctrl
, using_inta
;
235 * We cannot probe for IRQ: both ports share common IRQ on INTA.
236 * Also, leave IRQ masked during drive probing, to prevent infinite
237 * interrupts from a potentially floating INTA..
239 * IRQs get unmasked in selectproc when drive is first used.
241 (void) pci_read_config_dword(dev
, 0x40, &ctrl
);
242 (void) pci_read_config_byte(dev
, 0x09, &progif
);
243 /* is irq in "native" mode? */
244 using_inta
= progif
& (1 << (hwif
->channel
<< 1));
246 using_inta
= ctrl
& (1 << (4 + hwif
->channel
));
248 hwif
->select_data
= hwif
->mate
->select_data
;
250 hwif
->select_data
= (unsigned long)
251 &ns87415_control
[ns87415_count
++];
252 ctrl
|= (1 << 8) | (1 << 9); /* mask both IRQs */
254 ctrl
&= ~(1 << 6); /* unmask INTA */
255 *((unsigned int *)hwif
->select_data
) = ctrl
;
256 (void) pci_write_config_dword(dev
, 0x40, ctrl
);
259 * Set prefetch size to 512 bytes for both ports,
260 * but don't turn on/off prefetching here.
262 pci_write_config_byte(dev
, 0x55, 0xee);
266 * XXX: Reset the device, if we don't it will not respond to
267 * SELECT_DRIVE() properly during first ide_probe_port().
270 outb(12, hwif
->io_ports
.ctl_addr
);
272 outb(8, hwif
->io_ports
.ctl_addr
);
275 stat
= hwif
->tp_ops
->read_status(hwif
);
278 } while ((stat
& ATA_BUSY
) && --timeout
);
283 hwif
->irq
= __ide_default_irq(hwif
->io_ports
.data_addr
);
284 else if (!hwif
->irq
&& hwif
->mate
&& hwif
->mate
->irq
)
285 hwif
->irq
= hwif
->mate
->irq
; /* share IRQ with mate */
290 outb(0x60, hwif
->dma_base
+ ATA_DMA_STATUS
);
293 static const struct ide_port_ops ns87415_port_ops
= {
294 .selectproc
= ns87415_selectproc
,
297 static const struct ide_dma_ops ns87415_dma_ops
= {
298 .dma_host_set
= ide_dma_host_set
,
299 .dma_setup
= ns87415_dma_setup
,
300 .dma_exec_cmd
= ide_dma_exec_cmd
,
301 .dma_start
= ide_dma_start
,
302 .dma_end
= ns87415_dma_end
,
303 .dma_test_irq
= ide_dma_test_irq
,
304 .dma_lost_irq
= ide_dma_lost_irq
,
305 .dma_timeout
= ide_dma_timeout
,
308 static const struct ide_port_info ns87415_chipset __devinitdata
= {
310 .init_hwif
= init_hwif_ns87415
,
311 .port_ops
= &ns87415_port_ops
,
312 .dma_ops
= &ns87415_dma_ops
,
313 .host_flags
= IDE_HFLAG_TRUST_BIOS_FOR_DMA
|
314 IDE_HFLAG_NO_ATAPI_DMA
,
317 static int __devinit
ns87415_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
319 struct ide_port_info d
= ns87415_chipset
;
321 #ifdef CONFIG_SUPERIO
322 if (PCI_SLOT(dev
->devfn
) == 0xE) {
323 /* Built-in - assume it's under superio. */
324 d
.init_iops
= superio_init_iops
;
325 d
.tp_ops
= &superio_tp_ops
;
328 return ide_pci_init_one(dev
, &d
, NULL
);
331 static const struct pci_device_id ns87415_pci_tbl
[] = {
332 { PCI_VDEVICE(NS
, PCI_DEVICE_ID_NS_87415
), 0 },
335 MODULE_DEVICE_TABLE(pci
, ns87415_pci_tbl
);
337 static struct pci_driver driver
= {
338 .name
= "NS87415_IDE",
339 .id_table
= ns87415_pci_tbl
,
340 .probe
= ns87415_init_one
,
341 .remove
= ide_pci_remove
,
342 .suspend
= ide_pci_suspend
,
343 .resume
= ide_pci_resume
,
346 static int __init
ns87415_ide_init(void)
348 return ide_pci_register_driver(&driver
);
351 static void __exit
ns87415_ide_exit(void)
353 pci_unregister_driver(&driver
);
356 module_init(ns87415_ide_init
);
357 module_exit(ns87415_ide_exit
);
359 MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick");
360 MODULE_DESCRIPTION("PCI driver module for NS87415 IDE");
361 MODULE_LICENSE("GPL");