drivers/ide/pci/tc86c001.c

   1 /*
   2  * drivers/ide/pci/tc86c001.c   Version 1.00    Dec 12, 2006
   3  *
   4  * Copyright (C) 2002 Toshiba Corporation
   5  * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This file is licensed under the terms of the GNU General Public
   8  * License version 2.  This program is licensed "as is" without any
   9  * warranty of any kind, whether express or implied.
  10  */
  11
  12 #include <linux/types.h>
  13 #include <linux/pci.h>
  14 #include <linux/ide.h>
  15
  16 static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
  17 {
  18         ide_hwif_t *hwif        = HWIF(drive);
  19         unsigned long scr_port  = hwif->config_data + (drive->dn ? 0x02 : 0x00);
  20         u16 mode, scr           = hwif->INW(scr_port);
  21
  22         speed = ide_rate_filter(drive, speed);
  23
  24         switch (speed) {
  25                 case XFER_UDMA_4:       mode = 0x00c0; break;
  26                 case XFER_UDMA_3:       mode = 0x00b0; break;
  27                 case XFER_UDMA_2:       mode = 0x00a0; break;
  28                 case XFER_UDMA_1:       mode = 0x0090; break;
  29                 case XFER_UDMA_0:       mode = 0x0080; break;
  30                 case XFER_MW_DMA_2:     mode = 0x0070; break;
  31                 case XFER_MW_DMA_1:     mode = 0x0060; break;
  32                 case XFER_MW_DMA_0:     mode = 0x0050; break;
  33                 case XFER_PIO_4:        mode = 0x0400; break;
  34                 case XFER_PIO_3:        mode = 0x0300; break;
  35                 case XFER_PIO_2:        mode = 0x0200; break;
  36                 case XFER_PIO_1:        mode = 0x0100; break;
  37                 case XFER_PIO_0:
  38                 default:                mode = 0x0000; break;
  39         }
  40
  41         scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
  42         scr |= mode;
  43         outw(scr, scr_port);
  44
  45         return ide_config_drive_speed(drive, speed);
  46 }
  47
  48 static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio)
  49 {
  50         pio =  ide_get_best_pio_mode(drive, pio, 4, NULL);
  51         (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio);
  52 }
  53
  54 /*
  55  * HACKITY HACK
  56  *
  57  * This is a workaround for the limitation 5 of the TC86C001 IDE controller:
  58  * if a DMA transfer terminates prematurely, the controller leaves the device's
  59  * interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
  60  * set the interrupt bit in the DMA status register), thus no PCI interrupt
  61  * will occur until a DMA transfer has been successfully completed.
  62  *
  63  * We work around this by initiating dummy, zero-length DMA transfer on
  64  * a DMA timeout expiration. I found no better way to do this with the current
  65  * IDE core than to temporarily replace a higher level driver's timer expiry
  66  * handler with our own backing up to that handler in case our recovery fails.
  67  */
  68 static int tc86c001_timer_expiry(ide_drive_t *drive)
  69 {
  70         ide_hwif_t *hwif        = HWIF(drive);
  71         ide_expiry_t *expiry    = ide_get_hwifdata(hwif);
  72         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
  73         u8 dma_stat             = hwif->INB(hwif->dma_status);
  74
  75         /* Restore a higher level driver's expiry handler first. */
  76         hwgroup->expiry = expiry;
  77
  78         if ((dma_stat & 5) == 1) {      /* DMA active and no interrupt */
  79                 unsigned long sc_base   = hwif->config_data;
  80                 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
  81                 u8 dma_cmd              = hwif->INB(hwif->dma_command);
  82
  83                 printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
  84                        "attempting recovery...\n", drive->name);
  85
  86                 /* Stop DMA */
  87                 outb(dma_cmd & ~0x01, hwif->dma_command);
  88
  89                 /* Setup the dummy DMA transfer */
  90                 outw(0, sc_base + 0x0a);        /* Sector Count */
  91                 outw(0, twcr_port);     /* Transfer Word Count 1 or 2 */
  92
  93                 /* Start the dummy DMA transfer */
  94                 outb(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
  95                 outb(0x01, hwif->dma_command); /* set START_STOPBM */
  96
  97                 /*
  98                  * If an interrupt was pending, it should come thru shortly.
  99                  * If not, a higher level driver's expiry handler should
 100                  * eventually cause some kind of recovery from the DMA stall.
 101                  */
 102                 return WAIT_MIN_SLEEP;
 103         }
 104
 105         /* Chain to the restored expiry handler if DMA wasn't active. */
 106         if (likely(expiry != NULL))
 107                 return expiry(drive);
 108
 109         /* If there was no handler, "emulate" that for ide_timer_expiry()... */
 110         return -1;
 111 }
 112
 113 static void tc86c001_dma_start(ide_drive_t *drive)
 114 {
 115         ide_hwif_t *hwif        = HWIF(drive);
 116         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 117         unsigned long sc_base   = hwif->config_data;
 118         unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
 119         unsigned long nsectors  = hwgroup->rq->nr_sectors;
 120
 121         /*
 122          * We have to manually load the sector count and size into
 123          * the appropriate system control registers for DMA to work
 124          * with LBA48 and ATAPI devices...
 125          */
 126         outw(nsectors, sc_base + 0x0a); /* Sector Count */
 127         outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
 128
 129         /* Install our timeout expiry hook, saving the current handler... */
 130         ide_set_hwifdata(hwif, hwgroup->expiry);
 131         hwgroup->expiry = &tc86c001_timer_expiry;
 132
 133         ide_dma_start(drive);
 134 }
 135
 136 static int tc86c001_busproc(ide_drive_t *drive, int state)
 137 {
 138         ide_hwif_t *hwif        = HWIF(drive);
 139         unsigned long sc_base   = hwif->config_data;
 140         u16 scr1;
 141
 142         /* System Control 1 Register bit 11 (ATA Hard Reset) read */
 143         scr1 = hwif->INW(sc_base + 0x00);
 144
 145         switch (state) {
 146                 case BUSSTATE_ON:
 147                         if (!(scr1 & 0x0800))
 148                                 return 0;
 149                         scr1 &= ~0x0800;
 150
 151                         hwif->drives[0].failures = hwif->drives[1].failures = 0;
 152                         break;
 153                 case BUSSTATE_OFF:
 154                         if (scr1 & 0x0800)
 155                                 return 0;
 156                         scr1 |= 0x0800;
 157
 158                         hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
 159                         hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
 160                         break;
 161                 default:
 162                         return -EINVAL;
 163         }
 164
 165         /* System Control 1 Register bit 11 (ATA Hard Reset) write */
 166         outw(scr1, sc_base + 0x00);
 167         return 0;
 168 }
 169
 170 static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
 171 {
 172         if (ide_tune_dma(drive))
 173                 return 0;
 174
 175         if (ide_use_fast_pio(drive))
 176                 tc86c001_tune_drive(drive, 255);
 177
 178         return -1;
 179 }
 180
 181 static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
 182 {
 183         unsigned long sc_base   = pci_resource_start(hwif->pci_dev, 5);
 184         u16 scr1                = hwif->INW(sc_base + 0x00);;
 185
 186         /* System Control 1 Register bit 15 (Soft Reset) set */
 187         outw(scr1 |  0x8000, sc_base + 0x00);
 188
 189         /* System Control 1 Register bit 14 (FIFO Reset) set */
 190         outw(scr1 |  0x4000, sc_base + 0x00);
 191
 192         /* System Control 1 Register: reset clear */
 193         outw(scr1 & ~0xc000, sc_base + 0x00);
 194
 195         /* Store the system control register base for convenience... */
 196         hwif->config_data = sc_base;
 197
 198         hwif->tuneproc  = &tc86c001_tune_drive;
 199         hwif->speedproc = &tc86c001_tune_chipset;
 200         hwif->busproc   = &tc86c001_busproc;
 201
 202         hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
 203
 204         if (!hwif->dma_base)
 205                 return;
 206
 207         /*
 208          * Sector Count Control Register bits 0 and 1 set:
 209          * software sets Sector Count Register for master and slave device
 210          */
 211         outw(0x0003, sc_base + 0x0c);
 212
 213         /* Sector Count Register limit */
 214         hwif->rqsize     = 0xffff;
 215
 216         hwif->atapi_dma  = 1;
 217         hwif->ultra_mask = 0x1f;
 218         hwif->mwdma_mask = 0x07;
 219
 220         hwif->ide_dma_check     = &tc86c001_config_drive_xfer_rate;
 221         hwif->dma_start         = &tc86c001_dma_start;
 222
 223         if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
 224                 /*
 225                  * System Control  1 Register bit 13 (PDIAGN):
 226                  * 0=80-pin cable, 1=40-pin cable
 227                  */
 228                 scr1 = hwif->INW(sc_base + 0x00);
 229                 hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
 230         }
 231
 232         if (!noautodma)
 233                 hwif->autodma = 1;
 234         hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
 235 }
 236
 237 static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
 238                                                         const char *name)
 239 {
 240         int err = pci_request_region(dev, 5, name);
 241
 242         if (err)
 243                 printk(KERN_ERR "%s: system control regs already in use", name);
 244         return err;
 245 }
 246
 247 static ide_pci_device_t tc86c001_chipset __devinitdata = {
 248         .name           = "TC86C001",
 249         .init_chipset   = init_chipset_tc86c001,
 250         .init_hwif      = init_hwif_tc86c001,
 251         .autodma        = AUTODMA,
 252         .bootable       = OFF_BOARD,
 253         .host_flags     = IDE_HFLAG_SINGLE,
 254 };
 255
 256 static int __devinit tc86c001_init_one(struct pci_dev *dev,
 257                                        const struct pci_device_id *id)
 258 {
 259         return ide_setup_pci_device(dev, &tc86c001_chipset);
 260 }
 261
 262 static struct pci_device_id tc86c001_pci_tbl[] = {
 263         { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE,
 264           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 265         { 0, }
 266 };
 267 MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
 268
 269 static struct pci_driver driver = {
 270         .name           = "TC86C001",
 271         .id_table       = tc86c001_pci_tbl,
 272         .probe          = tc86c001_init_one
 273 };
 274
 275 static int __init tc86c001_ide_init(void)
 276 {
 277         return ide_pci_register_driver(&driver);
 278 }
 279 module_init(tc86c001_ide_init);
 280
 281 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
 282 MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
 283 MODULE_LICENSE("GPL");