5 * VIA IDE driver for Linux. Supported southbridges:
7 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
8 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
9 * vt8235, vt8237, vt8237a
11 * Copyright (c) 2000-2002 Vojtech Pavlik
12 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
14 * Based on the work of:
20 * Obsolete device documentation publically available from via.com.tw
21 * Current device documentation available under NDA only
25 * This program is free software; you can redistribute it and/or modify it
26 * under the terms of the GNU General Public License version 2 as published by
27 * the Free Software Foundation.
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/blkdev.h>
34 #include <linux/pci.h>
35 #include <linux/init.h>
36 #include <linux/ide.h>
37 #include <linux/dmi.h>
41 #ifdef CONFIG_PPC_CHRP
42 #include <asm/processor.h>
45 #include "ide-timing.h"
47 #define VIA_IDE_ENABLE 0x40
48 #define VIA_IDE_CONFIG 0x41
49 #define VIA_FIFO_CONFIG 0x43
50 #define VIA_MISC_1 0x44
51 #define VIA_MISC_2 0x45
52 #define VIA_MISC_3 0x46
53 #define VIA_DRIVE_TIMING 0x48
54 #define VIA_8BIT_TIMING 0x4e
55 #define VIA_ADDRESS_SETUP 0x4c
56 #define VIA_UDMA_TIMING 0x50
58 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
59 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
60 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
61 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
62 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
63 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
66 * VIA SouthBridge chips.
69 static struct via_isa_bridge
{
76 } via_isa_bridges
[] = {
77 { "cx700", PCI_DEVICE_ID_VIA_CX700
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
78 { "vt8237s", PCI_DEVICE_ID_VIA_8237S
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
79 { "vt6410", PCI_DEVICE_ID_VIA_6410
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
80 { "vt8251", PCI_DEVICE_ID_VIA_8251
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
81 { "vt8237", PCI_DEVICE_ID_VIA_8237
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
82 { "vt8237a", PCI_DEVICE_ID_VIA_8237A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
83 { "vt8235", PCI_DEVICE_ID_VIA_8235
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
84 { "vt8233a", PCI_DEVICE_ID_VIA_8233A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
85 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0
, 0x00, 0x2f, ATA_UDMA5
, },
86 { "vt8233", PCI_DEVICE_ID_VIA_8233_0
, 0x00, 0x2f, ATA_UDMA5
, },
87 { "vt8231", PCI_DEVICE_ID_VIA_8231
, 0x00, 0x2f, ATA_UDMA5
, },
88 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686
, 0x40, 0x4f, ATA_UDMA5
, },
89 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686
, 0x10, 0x2f, ATA_UDMA4
, },
90 { "vt82c686", PCI_DEVICE_ID_VIA_82C686
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
91 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596
, 0x10, 0x2f, ATA_UDMA4
, },
92 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
93 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x47, 0x4f, ATA_UDMA2
, VIA_SET_FIFO
},
94 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x40, 0x46, ATA_UDMA2
, VIA_SET_FIFO
| VIA_BAD_PREQ
},
95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x30, 0x3f, ATA_UDMA2
, VIA_SET_FIFO
},
96 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0
, 0x20, 0x2f, ATA_UDMA2
, VIA_SET_FIFO
},
97 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0
, 0x00, 0x0f, 0x00, VIA_SET_FIFO
},
98 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
},
99 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
| VIA_BAD_ID
},
103 static unsigned int via_clock
;
104 static char *via_dma
[] = { "16", "25", "33", "44", "66", "100", "133" };
108 struct via_isa_bridge
*via_config
;
109 unsigned int via_80w
;
113 * via_set_speed - write timing registers
116 * @timing: IDE timing data to use
118 * via_set_speed writes timing values to the chipset registers
121 static void via_set_speed(ide_hwif_t
*hwif
, u8 dn
, struct ide_timing
*timing
)
123 struct pci_dev
*dev
= hwif
->pci_dev
;
124 struct via82cxxx_dev
*vdev
= pci_get_drvdata(hwif
->pci_dev
);
127 if (~vdev
->via_config
->flags
& VIA_BAD_AST
) {
128 pci_read_config_byte(dev
, VIA_ADDRESS_SETUP
, &t
);
129 t
= (t
& ~(3 << ((3 - dn
) << 1))) | ((FIT(timing
->setup
, 1, 4) - 1) << ((3 - dn
) << 1));
130 pci_write_config_byte(dev
, VIA_ADDRESS_SETUP
, t
);
133 pci_write_config_byte(dev
, VIA_8BIT_TIMING
+ (1 - (dn
>> 1)),
134 ((FIT(timing
->act8b
, 1, 16) - 1) << 4) | (FIT(timing
->rec8b
, 1, 16) - 1));
136 pci_write_config_byte(dev
, VIA_DRIVE_TIMING
+ (3 - dn
),
137 ((FIT(timing
->active
, 1, 16) - 1) << 4) | (FIT(timing
->recover
, 1, 16) - 1));
139 switch (vdev
->via_config
->udma_mask
) {
140 case ATA_UDMA2
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 5) - 2)) : 0x03; break;
141 case ATA_UDMA4
: t
= timing
->udma
? (0xe8 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x0f; break;
142 case ATA_UDMA5
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x07; break;
143 case ATA_UDMA6
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x07; break;
147 pci_write_config_byte(dev
, VIA_UDMA_TIMING
+ (3 - dn
), t
);
151 * via_set_drive - configure transfer mode
152 * @drive: Drive to set up
153 * @speed: desired speed
155 * via_set_drive() computes timing values configures the drive and
156 * the chipset to a desired transfer mode. It also can be called
160 static int via_set_drive(ide_drive_t
*drive
, u8 speed
)
162 ide_drive_t
*peer
= HWIF(drive
)->drives
+ (~drive
->dn
& 1);
163 struct via82cxxx_dev
*vdev
= pci_get_drvdata(drive
->hwif
->pci_dev
);
164 struct ide_timing t
, p
;
167 if (speed
!= XFER_PIO_SLOW
)
168 ide_config_drive_speed(drive
, speed
);
170 T
= 1000000000 / via_clock
;
172 switch (vdev
->via_config
->udma_mask
) {
173 case ATA_UDMA2
: UT
= T
; break;
174 case ATA_UDMA4
: UT
= T
/2; break;
175 case ATA_UDMA5
: UT
= T
/3; break;
176 case ATA_UDMA6
: UT
= T
/4; break;
180 ide_timing_compute(drive
, speed
, &t
, T
, UT
);
183 ide_timing_compute(peer
, peer
->current_speed
, &p
, T
, UT
);
184 ide_timing_merge(&p
, &t
, &t
, IDE_TIMING_8BIT
);
187 via_set_speed(HWIF(drive
), drive
->dn
, &t
);
189 if (!drive
->init_speed
)
190 drive
->init_speed
= speed
;
191 drive
->current_speed
= speed
;
197 * via82cxxx_tune_drive - PIO setup
198 * @drive: drive to set up
199 * @pio: mode to use (255 for 'best possible')
201 * A callback from the upper layers for PIO-only tuning.
204 static void via82cxxx_tune_drive(ide_drive_t
*drive
, u8 pio
)
207 pio
= ide_get_best_pio_mode(drive
, 255, 5);
209 via_set_drive(drive
, XFER_PIO_0
+ min_t(u8
, pio
, 5));
213 * via82cxxx_ide_dma_check - set up for DMA if possible
214 * @drive: IDE drive to set up
216 * Set up the drive for the highest supported speed considering the
217 * driver, controller and cable
220 static int via82cxxx_ide_dma_check (ide_drive_t
*drive
)
222 u8 speed
= ide_max_dma_mode(drive
);
225 via82cxxx_tune_drive(drive
, 255);
229 via_set_drive(drive
, speed
);
237 static struct via_isa_bridge
*via_config_find(struct pci_dev
**isa
)
239 struct via_isa_bridge
*via_config
;
241 for (via_config
= via_isa_bridges
; via_config
->id
; via_config
++)
242 if ((*isa
= pci_get_device(PCI_VENDOR_ID_VIA
+
243 !!(via_config
->flags
& VIA_BAD_ID
),
244 via_config
->id
, NULL
))) {
246 if ((*isa
)->revision
>= via_config
->rev_min
&&
247 (*isa
)->revision
<= via_config
->rev_max
)
256 * Check and handle 80-wire cable presence
258 static void __devinit
via_cable_detect(struct via82cxxx_dev
*vdev
, u32 u
)
262 switch (vdev
->via_config
->udma_mask
) {
264 for (i
= 24; i
>= 0; i
-= 8)
265 if (((u
>> (i
& 16)) & 8) &&
267 (((u
>> i
) & 7) < 2)) {
272 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
277 for (i
= 24; i
>= 0; i
-= 8)
278 if (((u
>> i
) & 0x10) ||
279 (((u
>> i
) & 0x20) &&
280 (((u
>> i
) & 7) < 4))) {
281 /* BIOS 80-wire bit or
282 * UDMA w/ < 60ns/cycle
284 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
289 for (i
= 24; i
>= 0; i
-= 8)
290 if (((u
>> i
) & 0x10) ||
291 (((u
>> i
) & 0x20) &&
292 (((u
>> i
) & 7) < 6))) {
293 /* BIOS 80-wire bit or
294 * UDMA w/ < 60ns/cycle
296 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
303 * init_chipset_via82cxxx - initialization handler
305 * @name: Name of interface
307 * The initialization callback. Here we determine the IDE chip type
308 * and initialize its drive independent registers.
311 static unsigned int __devinit
init_chipset_via82cxxx(struct pci_dev
*dev
, const char *name
)
313 struct pci_dev
*isa
= NULL
;
314 struct via82cxxx_dev
*vdev
;
315 struct via_isa_bridge
*via_config
;
319 vdev
= kzalloc(sizeof(*vdev
), GFP_KERNEL
);
321 printk(KERN_ERR
"VP_IDE: out of memory :(\n");
324 pci_set_drvdata(dev
, vdev
);
327 * Find the ISA bridge to see how good the IDE is.
329 vdev
->via_config
= via_config
= via_config_find(&isa
);
331 /* We checked this earlier so if it fails here deeep badness
334 BUG_ON(!via_config
->id
);
337 * Detect cable and configure Clk66
339 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
341 via_cable_detect(vdev
, u
);
343 if (via_config
->udma_mask
== ATA_UDMA4
) {
345 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
|0x80008);
346 } else if (via_config
->flags
& VIA_BAD_CLK66
) {
347 /* Would cause trouble on 596a and 686 */
348 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
& ~0x80008);
352 * Check whether interfaces are enabled.
355 pci_read_config_byte(dev
, VIA_IDE_ENABLE
, &v
);
358 * Set up FIFO sizes and thresholds.
361 pci_read_config_byte(dev
, VIA_FIFO_CONFIG
, &t
);
363 /* Disable PREQ# till DDACK# */
364 if (via_config
->flags
& VIA_BAD_PREQ
) {
365 /* Would crash on 586b rev 41 */
369 /* Fix FIFO split between channels */
370 if (via_config
->flags
& VIA_SET_FIFO
) {
373 case 2: t
|= 0x00; break; /* 16 on primary */
374 case 1: t
|= 0x60; break; /* 16 on secondary */
375 case 3: t
|= 0x20; break; /* 8 pri 8 sec */
379 pci_write_config_byte(dev
, VIA_FIFO_CONFIG
, t
);
382 * Determine system bus clock.
385 via_clock
= system_bus_clock() * 1000;
388 case 33000: via_clock
= 33333; break;
389 case 37000: via_clock
= 37500; break;
390 case 41000: via_clock
= 41666; break;
393 if (via_clock
< 20000 || via_clock
> 50000) {
394 printk(KERN_WARNING
"VP_IDE: User given PCI clock speed "
395 "impossible (%d), using 33 MHz instead.\n", via_clock
);
396 printk(KERN_WARNING
"VP_IDE: Use ide0=ata66 if you want "
397 "to assume 80-wire cable.\n");
402 * Print the boot message.
405 printk(KERN_INFO
"VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
406 "controller on pci%s\n",
407 via_config
->name
, isa
->revision
,
408 via_config
->udma_mask
? "U" : "MW",
409 via_dma
[via_config
->udma_mask
?
410 (fls(via_config
->udma_mask
) - 1) : 0],
418 * Cable special cases
421 static struct dmi_system_id cable_dmi_table
[] = {
423 .ident
= "Acer Ferrari 3400",
425 DMI_MATCH(DMI_BOARD_VENDOR
, "Acer,Inc."),
426 DMI_MATCH(DMI_BOARD_NAME
, "Ferrari 3400"),
432 static int via_cable_override(void)
435 if (dmi_check_system(cable_dmi_table
))
440 static u8 __devinit
via82cxxx_cable_detect(ide_hwif_t
*hwif
)
442 struct via82cxxx_dev
*vdev
= pci_get_drvdata(hwif
->pci_dev
);
444 if (via_cable_override())
445 return ATA_CBL_PATA40_SHORT
;
447 if ((vdev
->via_80w
>> hwif
->channel
) & 1)
448 return ATA_CBL_PATA80
;
450 return ATA_CBL_PATA40
;
453 static void __devinit
init_hwif_via82cxxx(ide_hwif_t
*hwif
)
455 struct via82cxxx_dev
*vdev
= pci_get_drvdata(hwif
->pci_dev
);
460 hwif
->tuneproc
= &via82cxxx_tune_drive
;
461 hwif
->speedproc
= &via_set_drive
;
464 #ifdef CONFIG_PPC_CHRP
465 if(machine_is(chrp
) && _chrp_type
== _CHRP_Pegasos
) {
466 hwif
->irq
= hwif
->channel
? 15 : 14;
470 for (i
= 0; i
< 2; i
++) {
471 hwif
->drives
[i
].io_32bit
= 1;
472 hwif
->drives
[i
].unmask
= (vdev
->via_config
->flags
& VIA_NO_UNMASK
) ? 0 : 1;
473 hwif
->drives
[i
].autotune
= 1;
474 hwif
->drives
[i
].dn
= hwif
->channel
* 2 + i
;
482 hwif
->ultra_mask
= vdev
->via_config
->udma_mask
;
483 hwif
->mwdma_mask
= 0x07;
484 hwif
->swdma_mask
= 0x07;
486 if (hwif
->cbl
!= ATA_CBL_PATA40_SHORT
)
487 hwif
->cbl
= via82cxxx_cable_detect(hwif
);
489 hwif
->ide_dma_check
= &via82cxxx_ide_dma_check
;
492 hwif
->drives
[0].autodma
= hwif
->autodma
;
493 hwif
->drives
[1].autodma
= hwif
->autodma
;
496 static ide_pci_device_t via82cxxx_chipsets
[] __devinitdata
= {
499 .init_chipset
= init_chipset_via82cxxx
,
500 .init_hwif
= init_hwif_via82cxxx
,
501 .autodma
= NOAUTODMA
,
502 .enablebits
= {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
503 .bootable
= ON_BOARD
,
504 .host_flags
= IDE_HFLAG_PIO_NO_BLACKLIST
505 | IDE_HFLAG_PIO_NO_DOWNGRADE
,
506 .pio_mask
= ATA_PIO5
,
509 .init_chipset
= init_chipset_via82cxxx
,
510 .init_hwif
= init_hwif_via82cxxx
,
512 .enablebits
= {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
513 .bootable
= ON_BOARD
,
514 .host_flags
= IDE_HFLAG_PIO_NO_BLACKLIST
515 | IDE_HFLAG_PIO_NO_DOWNGRADE
,
516 .pio_mask
= ATA_PIO5
,
520 static int __devinit
via_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
522 struct pci_dev
*isa
= NULL
;
523 struct via_isa_bridge
*via_config
;
525 * Find the ISA bridge and check we know what it is.
527 via_config
= via_config_find(&isa
);
529 if (!via_config
->id
) {
530 printk(KERN_WARNING
"VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
533 return ide_setup_pci_device(dev
, &via82cxxx_chipsets
[id
->driver_data
]);
536 static struct pci_device_id via_pci_tbl
[] = {
537 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_82C576_1
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
538 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_82C586_1
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
539 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_6410
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 1},
540 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_SATA_EIDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 1},
543 MODULE_DEVICE_TABLE(pci
, via_pci_tbl
);
545 static struct pci_driver driver
= {
547 .id_table
= via_pci_tbl
,
548 .probe
= via_init_one
,
551 static int __init
via_ide_init(void)
553 return ide_pci_register_driver(&driver
);
556 module_init(via_ide_init
);
558 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
559 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
560 MODULE_LICENSE("GPL");