2 * Copyright (C) 2000, 2001 Wolfgang Denk, wd@denx.de
3 * Modified for direct IDE interface
4 * by Thomas Lange, thomas@corelatus.com
5 * Modified for direct IDE interface on 8xx without using the PCMCIA
7 * by Steven.Scholz@imc-berlin.de
8 * Moved out of arch/ppc/kernel/m8xx_setup.c, other minor cleanups
9 * by Mathew Locke <mattl@mvista.com>
12 #include <linux/errno.h>
13 #include <linux/kernel.h>
15 #include <linux/stddef.h>
16 #include <linux/unistd.h>
17 #include <linux/ptrace.h>
18 #include <linux/slab.h>
19 #include <linux/user.h>
20 #include <linux/tty.h>
21 #include <linux/major.h>
22 #include <linux/interrupt.h>
23 #include <linux/reboot.h>
24 #include <linux/init.h>
25 #include <linux/ioport.h>
26 #include <linux/ide.h>
27 #include <linux/bootmem.h>
29 #include <asm/mpc8xx.h>
31 #include <asm/processor.h>
33 #include <asm/pgtable.h>
35 #include <asm/8xx_immap.h>
36 #include <asm/machdep.h>
39 static int identify (volatile u8
*p
);
40 static void print_fixed (volatile u8
*p
);
41 static void print_funcid (int func
);
42 static int check_ide_device (unsigned long base
);
44 static void ide_interrupt_ack (void *dev
);
45 static void m8xx_ide_set_pio_mode(ide_drive_t
*drive
, const u8 pio
);
47 typedef struct ide_ioport_desc
{
48 unsigned long base_off
; /* Offset to PCMCIA memory */
49 unsigned long reg_off
[IDE_NR_PORTS
]; /* controller register offsets */
53 ide_ioport_desc_t ioport_dsc
[MAX_HWIFS
] = {
54 #ifdef IDE0_BASE_OFFSET
58 IDE0_ERROR_REG_OFFSET
,
59 IDE0_NSECTOR_REG_OFFSET
,
60 IDE0_SECTOR_REG_OFFSET
,
63 IDE0_SELECT_REG_OFFSET
,
64 IDE0_STATUS_REG_OFFSET
,
65 IDE0_CONTROL_REG_OFFSET
,
70 #ifdef IDE1_BASE_OFFSET
74 IDE1_ERROR_REG_OFFSET
,
75 IDE1_NSECTOR_REG_OFFSET
,
76 IDE1_SECTOR_REG_OFFSET
,
79 IDE1_SELECT_REG_OFFSET
,
80 IDE1_STATUS_REG_OFFSET
,
81 IDE1_CONTROL_REG_OFFSET
,
86 #endif /* IDE1_BASE_OFFSET */
87 #endif /* IDE0_BASE_OFFSET */
90 ide_pio_timings_t ide_pio_clocks
[6];
91 int hold_time
[6] = {30, 20, 15, 10, 10, 10 }; /* PIO Mode 5 with IORDY (nonstandard) */
94 * Warning: only 1 (ONE) PCMCIA slot supported here,
95 * which must be correctly initialized by the firmware (PPCBoot).
97 static int _slot_
= -1; /* will be read from PCMCIA registers */
99 /* Make clock cycles and always round up */
100 #define PCMCIA_MK_CLKS( t, T ) (( (t) * ((T)/1000000) + 999U ) / 1000U )
102 #define M8XX_PCMCIA_CD2(slot) (0x10000000 >> (slot << 4))
103 #define M8XX_PCMCIA_CD1(slot) (0x08000000 >> (slot << 4))
106 * The TQM850L hardware has two pins swapped! Grrrrgh!
108 #ifdef CONFIG_TQM850L
109 #define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXOE
110 #define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXRESET
112 #define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXRESET
113 #define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXOE
116 #if defined(CONFIG_BLK_DEV_MPC8xx_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
117 #define PCMCIA_SCHLVL IDE0_INTERRUPT /* Status Change Interrupt Level */
118 static int pcmcia_schlvl
= PCMCIA_SCHLVL
;
122 * See include/linux/ide.h for definition of hw_regs_t (p, base)
126 * m8xx_ide_init_ports() for a direct IDE interface _using_
127 * MPC8xx's internal PCMCIA interface
129 #if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
130 static void __init
m8xx_ide_init_ports(hw_regs_t
*hw
, unsigned long data_port
)
132 unsigned long *p
= hw
->io_ports
;
139 volatile pcmcia_win_t
*win
;
140 volatile pcmconf8xx_t
*pcmp
;
145 static unsigned long pcmcia_base
= 0;
150 pcmp
= (pcmconf8xx_t
*)(&(((immap_t
*)IMAP_ADDR
)->im_pcmcia
));
154 * Read out PCMCIA registers. Since the reset values
155 * are undefined, we sure hope that they have been
159 /* Scan all registers for valid settings */
160 pcmcia_phy_base
= 0xFFFFFFFF;
162 /* br0 is start of brX and orX regs */
163 win
= (pcmcia_win_t
*) \
164 (&(((immap_t
*)IMAP_ADDR
)->im_pcmcia
.pcmc_pbr0
));
165 for (i
= 0; i
< 8; i
++) {
166 if (win
->or & 1) { /* This bank is marked as valid */
167 if (win
->br
< pcmcia_phy_base
) {
168 pcmcia_phy_base
= win
->br
;
170 if ((win
->br
+ PCMCIA_MEM_SIZE
) > pcmcia_phy_end
) {
171 pcmcia_phy_end
= win
->br
+ PCMCIA_MEM_SIZE
;
173 /* Check which slot that has been defined */
174 _slot_
= (win
->or >> 2) & 1;
180 printk ("PCMCIA slot %c: phys mem %08x...%08x (size %08x)\n",
182 pcmcia_phy_base
, pcmcia_phy_end
,
183 pcmcia_phy_end
- pcmcia_phy_base
);
185 pcmcia_base
=(unsigned long)ioremap(pcmcia_phy_base
,
186 pcmcia_phy_end
-pcmcia_phy_base
);
189 printk ("PCMCIA virt base: %08lx\n", pcmcia_base
);
191 /* Compute clock cycles for PIO timings */
192 for (i
=0; i
<6; ++i
) {
193 bd_t
*binfo
= (bd_t
*)__res
;
196 PCMCIA_MK_CLKS (hold_time
[i
],
198 ide_pio_clocks
[i
].setup_time
=
199 PCMCIA_MK_CLKS (ide_pio_timings
[i
].setup_time
,
201 ide_pio_clocks
[i
].active_time
=
202 PCMCIA_MK_CLKS (ide_pio_timings
[i
].active_time
,
204 ide_pio_clocks
[i
].cycle_time
=
205 PCMCIA_MK_CLKS (ide_pio_timings
[i
].cycle_time
,
208 printk ("PIO mode %d timings: %d/%d/%d => %d/%d/%d\n",
210 ide_pio_clocks
[i
].setup_time
,
211 ide_pio_clocks
[i
].active_time
,
212 ide_pio_clocks
[i
].hold_time
,
213 ide_pio_clocks
[i
].cycle_time
,
214 ide_pio_timings
[i
].setup_time
,
215 ide_pio_timings
[i
].active_time
,
216 ide_pio_timings
[i
].hold_time
,
217 ide_pio_timings
[i
].cycle_time
);
223 printk ("PCMCIA slot has not been defined! Using A as default\n");
227 #ifdef CONFIG_IDE_8xx_PCCARD
230 printk ("PIPR = 0x%08X slot %c ==> mask = 0x%X\n",
233 M8XX_PCMCIA_CD1(_slot_
) | M8XX_PCMCIA_CD2(_slot_
) );
236 if (pcmp
->pcmc_pipr
& (M8XX_PCMCIA_CD1(_slot_
)|M8XX_PCMCIA_CD2(_slot_
))) {
237 printk ("No card in slot %c: PIPR=%08x\n",
238 'A' + _slot_
, (u32
) pcmp
->pcmc_pipr
);
239 return; /* No card in slot */
242 check_ide_device (pcmcia_base
);
244 #endif /* CONFIG_IDE_8xx_PCCARD */
246 base
= pcmcia_base
+ ioport_dsc
[data_port
].base_off
;
248 printk ("base: %08x + %08x = %08x\n",
249 pcmcia_base
, ioport_dsc
[data_port
].base_off
, base
);
252 for (i
= 0; i
< IDE_NR_PORTS
; ++i
) {
254 printk ("port[%d]: %08x + %08x = %08x\n",
257 ioport_dsc
[data_port
].reg_off
[i
],
258 i
, base
+ ioport_dsc
[data_port
].reg_off
[i
]);
260 *p
++ = base
+ ioport_dsc
[data_port
].reg_off
[i
];
263 hw
->irq
= ioport_dsc
[data_port
].irq
;
264 hw
->ack_intr
= (ide_ack_intr_t
*)ide_interrupt_ack
;
266 #ifdef CONFIG_IDE_8xx_PCCARD
271 pgcrx
= &((immap_t
*) IMAP_ADDR
)->im_pcmcia
.pcmc_pgcrb
;
273 pgcrx
= &((immap_t
*) IMAP_ADDR
)->im_pcmcia
.pcmc_pgcra
;
276 reg
|= mk_int_int_mask (pcmcia_schlvl
) << 24;
277 reg
|= mk_int_int_mask (pcmcia_schlvl
) << 16;
280 #endif /* CONFIG_IDE_8xx_PCCARD */
282 ide_hwifs
[data_port
].pio_mask
= ATA_PIO4
;
283 ide_hwifs
[data_port
].set_pio_mode
= m8xx_ide_set_pio_mode
;
285 /* Enable Harddisk Interrupt,
286 * and make it edge sensitive
288 /* (11-18) Set edge detect for irq, no wakeup from low power mode */
289 ((immap_t
*)IMAP_ADDR
)->im_siu_conf
.sc_siel
|=
290 (0x80000000 >> ioport_dsc
[data_port
].irq
);
292 #ifdef CONFIG_IDE_8xx_PCCARD
293 /* Make sure we don't get garbage irq */
294 ((immap_t
*) IMAP_ADDR
)->im_pcmcia
.pcmc_pscr
= 0xFFFF;
296 /* Enable falling edge irq */
297 pcmp
->pcmc_per
= 0x100000 >> (16 * _slot_
);
298 #endif /* CONFIG_IDE_8xx_PCCARD */
300 #endif /* CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT */
303 * m8xx_ide_init_ports() for a direct IDE interface _not_ using
304 * MPC8xx's internal PCMCIA interface
306 #if defined(CONFIG_IDE_EXT_DIRECT)
307 static void __init
m8xx_ide_init_ports(hw_regs_t
*hw
, unsigned long data_port
)
309 unsigned long *p
= hw
->io_ports
;
314 static unsigned long ide_base
= 0;
322 * - add code to read ORx, BRx
324 ide_phy_base
= CFG_ATA_BASE_ADDR
;
325 ide_phy_end
= CFG_ATA_BASE_ADDR
+ 0x200;
327 printk ("IDE phys mem : %08x...%08x (size %08x)\n",
328 ide_phy_base
, ide_phy_end
,
329 ide_phy_end
- ide_phy_base
);
331 ide_base
=(unsigned long)ioremap(ide_phy_base
,
332 ide_phy_end
-ide_phy_base
);
335 printk ("IDE virt base: %08lx\n", ide_base
);
339 base
= ide_base
+ ioport_dsc
[data_port
].base_off
;
341 printk ("base: %08x + %08x = %08x\n",
342 ide_base
, ioport_dsc
[data_port
].base_off
, base
);
345 for (i
= 0; i
< IDE_NR_PORTS
; ++i
) {
347 printk ("port[%d]: %08x + %08x = %08x\n",
350 ioport_dsc
[data_port
].reg_off
[i
],
351 i
, base
+ ioport_dsc
[data_port
].reg_off
[i
]);
353 *p
++ = base
+ ioport_dsc
[data_port
].reg_off
[i
];
356 /* direct connected IDE drive, i.e. external IRQ */
357 hw
->irq
= ioport_dsc
[data_port
].irq
;
358 hw
->ack_intr
= (ide_ack_intr_t
*)ide_interrupt_ack
;
360 ide_hwifs
[data_port
].pio_mask
= ATA_PIO4
;
361 ide_hwifs
[data_port
].set_pio_mode
= m8xx_ide_set_pio_mode
;
363 /* Enable Harddisk Interrupt,
364 * and make it edge sensitive
366 /* (11-18) Set edge detect for irq, no wakeup from low power mode */
367 ((immap_t
*) IMAP_ADDR
)->im_siu_conf
.sc_siel
|=
368 (0x80000000 >> ioport_dsc
[data_port
].irq
);
370 #endif /* CONFIG_IDE_8xx_DIRECT */
373 /* -------------------------------------------------------------------- */
378 #define PCMCIA_SHT(t) ((t & 0x0F)<<16) /* Strobe Hold Time */
379 #define PCMCIA_SST(t) ((t & 0x0F)<<12) /* Strobe Setup Time */
380 #define PCMCIA_SL(t) ((t==32) ? 0 : ((t & 0x1F)<<7)) /* Strobe Length */
383 /* Calculate PIO timings */
384 static void m8xx_ide_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
386 #if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
387 volatile pcmconf8xx_t
*pcmp
;
388 ulong timing
, mask
, reg
;
390 pcmp
= (pcmconf8xx_t
*)(&(((immap_t
*)IMAP_ADDR
)->im_pcmcia
));
392 mask
= ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF));
394 timing
= PCMCIA_SHT(hold_time
[pio
] )
395 | PCMCIA_SST(ide_pio_clocks
[pio
].setup_time
)
396 | PCMCIA_SL (ide_pio_clocks
[pio
].active_time
)
400 printk ("Setting timing bits 0x%08lx in PCMCIA controller\n", timing
);
402 if ((reg
= pcmp
->pcmc_por0
& mask
) != 0)
403 pcmp
->pcmc_por0
= reg
| timing
;
405 if ((reg
= pcmp
->pcmc_por1
& mask
) != 0)
406 pcmp
->pcmc_por1
= reg
| timing
;
408 if ((reg
= pcmp
->pcmc_por2
& mask
) != 0)
409 pcmp
->pcmc_por2
= reg
| timing
;
411 if ((reg
= pcmp
->pcmc_por3
& mask
) != 0)
412 pcmp
->pcmc_por3
= reg
| timing
;
414 if ((reg
= pcmp
->pcmc_por4
& mask
) != 0)
415 pcmp
->pcmc_por4
= reg
| timing
;
417 if ((reg
= pcmp
->pcmc_por5
& mask
) != 0)
418 pcmp
->pcmc_por5
= reg
| timing
;
420 if ((reg
= pcmp
->pcmc_por6
& mask
) != 0)
421 pcmp
->pcmc_por6
= reg
| timing
;
423 if ((reg
= pcmp
->pcmc_por7
& mask
) != 0)
424 pcmp
->pcmc_por7
= reg
| timing
;
426 #elif defined(CONFIG_IDE_EXT_DIRECT)
428 printk("%s[%d] %s: not implemented yet!\n",
429 __FILE__
,__LINE__
,__FUNCTION__
);
430 #endif /* defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_PCMCIA */
434 ide_interrupt_ack (void *dev
)
436 #ifdef CONFIG_IDE_8xx_PCCARD
439 #if (PCMCIA_SOCKETS_NO == 2)
443 /* get interrupt sources */
445 pscr
= ((volatile immap_t
*)IMAP_ADDR
)->im_pcmcia
.pcmc_pscr
;
446 pipr
= ((volatile immap_t
*)IMAP_ADDR
)->im_pcmcia
.pcmc_pipr
;
449 * report only if both card detect signals are the same
451 * we depend on that CD2 is the bit to the left of CD1...
455 printk("PCMCIA slot has not been defined! Using A as default\n");
459 if(((pipr
& M8XX_PCMCIA_CD2(_slot_
)) >> 1) ^
460 (pipr
& M8XX_PCMCIA_CD1(_slot_
)) ) {
461 printk ("card detect interrupt\n");
463 /* clear the interrupt sources */
464 ((immap_t
*)IMAP_ADDR
)->im_pcmcia
.pcmc_pscr
= pscr
;
466 #else /* ! CONFIG_IDE_8xx_PCCARD */
468 * Only CONFIG_IDE_8xx_PCCARD is using the interrupt of the
469 * MPC8xx's PCMCIA controller, so there is nothing to be done here
470 * for CONFIG_IDE_8xx_DIRECT and CONFIG_IDE_EXT_DIRECT.
471 * The interrupt is handled somewhere else. -- Steven
473 #endif /* CONFIG_IDE_8xx_PCCARD */
481 #define CISTPL_NULL 0x00
482 #define CISTPL_DEVICE 0x01
483 #define CISTPL_LONGLINK_CB 0x02
484 #define CISTPL_INDIRECT 0x03
485 #define CISTPL_CONFIG_CB 0x04
486 #define CISTPL_CFTABLE_ENTRY_CB 0x05
487 #define CISTPL_LONGLINK_MFC 0x06
488 #define CISTPL_BAR 0x07
489 #define CISTPL_PWR_MGMNT 0x08
490 #define CISTPL_EXTDEVICE 0x09
491 #define CISTPL_CHECKSUM 0x10
492 #define CISTPL_LONGLINK_A 0x11
493 #define CISTPL_LONGLINK_C 0x12
494 #define CISTPL_LINKTARGET 0x13
495 #define CISTPL_NO_LINK 0x14
496 #define CISTPL_VERS_1 0x15
497 #define CISTPL_ALTSTR 0x16
498 #define CISTPL_DEVICE_A 0x17
499 #define CISTPL_JEDEC_C 0x18
500 #define CISTPL_JEDEC_A 0x19
501 #define CISTPL_CONFIG 0x1a
502 #define CISTPL_CFTABLE_ENTRY 0x1b
503 #define CISTPL_DEVICE_OC 0x1c
504 #define CISTPL_DEVICE_OA 0x1d
505 #define CISTPL_DEVICE_GEO 0x1e
506 #define CISTPL_DEVICE_GEO_A 0x1f
507 #define CISTPL_MANFID 0x20
508 #define CISTPL_FUNCID 0x21
509 #define CISTPL_FUNCE 0x22
510 #define CISTPL_SWIL 0x23
511 #define CISTPL_END 0xff
514 * CIS Function ID codes
516 #define CISTPL_FUNCID_MULTI 0x00
517 #define CISTPL_FUNCID_MEMORY 0x01
518 #define CISTPL_FUNCID_SERIAL 0x02
519 #define CISTPL_FUNCID_PARALLEL 0x03
520 #define CISTPL_FUNCID_FIXED 0x04
521 #define CISTPL_FUNCID_VIDEO 0x05
522 #define CISTPL_FUNCID_NETWORK 0x06
523 #define CISTPL_FUNCID_AIMS 0x07
524 #define CISTPL_FUNCID_SCSI 0x08
527 * Fixed Disk FUNCE codes
529 #define CISTPL_IDE_INTERFACE 0x01
531 #define CISTPL_FUNCE_IDE_IFACE 0x01
532 #define CISTPL_FUNCE_IDE_MASTER 0x02
533 #define CISTPL_FUNCE_IDE_SLAVE 0x03
535 /* First feature byte */
536 #define CISTPL_IDE_SILICON 0x04
537 #define CISTPL_IDE_UNIQUE 0x08
538 #define CISTPL_IDE_DUAL 0x10
540 /* Second feature byte */
541 #define CISTPL_IDE_HAS_SLEEP 0x01
542 #define CISTPL_IDE_HAS_STANDBY 0x02
543 #define CISTPL_IDE_HAS_IDLE 0x04
544 #define CISTPL_IDE_LOW_POWER 0x08
545 #define CISTPL_IDE_REG_INHIBIT 0x10
546 #define CISTPL_IDE_HAS_INDEX 0x20
547 #define CISTPL_IDE_IOIS16 0x40
550 /* -------------------------------------------------------------------- */
553 #define MAX_TUPEL_SZ 512
554 #define MAX_FEATURES 4
556 static int check_ide_device (unsigned long base
)
558 volatile u8
*ident
= NULL
;
559 volatile u8
*feature_p
[MAX_FEATURES
];
560 volatile u8
*p
, *start
;
564 unsigned short config_base
= 0;
569 printk ("PCMCIA MEM: %08lX\n", base
);
571 start
= p
= (volatile u8
*) base
;
573 while ((p
- start
) < MAX_TUPEL_SZ
) {
577 if (code
== 0xFF) { /* End of chain */
583 { volatile u8
*q
= p
;
584 printk ("\nTuple code %02x length %d\n\tData:",
587 for (i
= 0; i
< len
; ++i
) {
588 printk (" %02x", *q
);
592 #endif /* DEBUG_PCMCIA */
601 if (n_features
< MAX_FEATURES
)
602 feature_p
[n_features
++] = p
;
605 config_base
= (*(p
+6) << 8) + (*(p
+4));
612 found
= identify (ident
);
614 if (func_id
!= ((u8
)~0)) {
615 print_funcid (func_id
);
617 if (func_id
== CISTPL_FUNCID_FIXED
)
620 return (1); /* no disk drive */
623 for (i
=0; i
<n_features
; ++i
) {
624 print_fixed (feature_p
[i
]);
628 printk ("unknown card type\n");
632 /* set level mode irq and I/O mapped device in config reg*/
633 *((u8
*)(base
+ config_base
)) = 0x41;
638 /* ------------------------------------------------------------------------- */
640 static void print_funcid (int func
)
643 case CISTPL_FUNCID_MULTI
:
644 printk (" Multi-Function");
646 case CISTPL_FUNCID_MEMORY
:
649 case CISTPL_FUNCID_SERIAL
:
650 printk (" Serial Port");
652 case CISTPL_FUNCID_PARALLEL
:
653 printk (" Parallel Port");
655 case CISTPL_FUNCID_FIXED
:
656 printk (" Fixed Disk");
658 case CISTPL_FUNCID_VIDEO
:
659 printk (" Video Adapter");
661 case CISTPL_FUNCID_NETWORK
:
662 printk (" Network Adapter");
664 case CISTPL_FUNCID_AIMS
:
665 printk (" AIMS Card");
667 case CISTPL_FUNCID_SCSI
:
668 printk (" SCSI Adapter");
677 /* ------------------------------------------------------------------------- */
679 static void print_fixed (volatile u8
*p
)
685 case CISTPL_FUNCE_IDE_IFACE
:
688 printk ((iface
== CISTPL_IDE_INTERFACE
) ? " IDE" : " unknown");
689 printk (" interface ");
692 case CISTPL_FUNCE_IDE_MASTER
:
693 case CISTPL_FUNCE_IDE_SLAVE
:
697 printk ((f1
& CISTPL_IDE_SILICON
) ? " [silicon]" : " [rotating]");
699 if (f1
& CISTPL_IDE_UNIQUE
)
700 printk (" [unique]");
702 printk ((f1
& CISTPL_IDE_DUAL
) ? " [dual]" : " [single]");
704 if (f2
& CISTPL_IDE_HAS_SLEEP
)
707 if (f2
& CISTPL_IDE_HAS_STANDBY
)
708 printk (" [standby]");
710 if (f2
& CISTPL_IDE_HAS_IDLE
)
713 if (f2
& CISTPL_IDE_LOW_POWER
)
714 printk (" [low power]");
716 if (f2
& CISTPL_IDE_REG_INHIBIT
)
717 printk (" [reg inhibit]");
719 if (f2
& CISTPL_IDE_HAS_INDEX
)
722 if (f2
& CISTPL_IDE_IOIS16
)
723 printk (" [IOis16]");
731 /* ------------------------------------------------------------------------- */
734 #define MAX_IDENT_CHARS 64
735 #define MAX_IDENT_FIELDS 4
737 static u8
*known_cards
[] = {
742 static int identify (volatile u8
*p
)
744 u8 id_str
[MAX_IDENT_CHARS
];
751 return (0); /* Don't know */
756 for (i
=0; i
<=4 && !done
; ++i
, p
+=2) {
757 while ((data
= *p
) != '\0') {
763 if (t
== &id_str
[MAX_IDENT_CHARS
-1]) {
773 while (--t
> id_str
) {
779 printk ("Card ID: %s\n", id_str
);
781 for (card
=known_cards
; *card
; ++card
) {
782 if (strcmp(*card
, id_str
) == 0) { /* found! */
787 return (0); /* don't know */
790 static int __init
mpc8xx_ide_probe(void)
793 u8 idx
[4] = { 0xff, 0xff, 0xff, 0xff };
795 #ifdef IDE0_BASE_OFFSET
796 memset(&hw
, 0, sizeof(hw
));
797 m8xx_ide_init_ports(&hw
, 0);
798 ide_init_port_hw(&ide_hwifs
[0], &hw
);
800 #ifdef IDE1_BASE_OFFSET
801 memset(&hw
, 0, sizeof(hw
));
802 m8xx_ide_init_ports(&hw
, 1);
803 ide_init_port_hw(&ide_hwifs
[1], &hw
);
808 ide_device_add(idx
, NULL
);
813 module_init(mpc8xx_ide_probe
);
815 MODULE_LICENSE("GPL");