2 * TX4939 internal IDE driver
3 * Based on RBTX49xx patch from CELF patch archive.
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
9 * (C) Copyright TOSHIBA CORPORATION 2005-2007
12 #include <linux/module.h>
13 #include <linux/types.h>
14 #include <linux/ide.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
19 #include <linux/scatterlist.h>
23 #define MODNAME "tx4939ide"
25 /* ATA Shadow Registers (8-bit except for Data which is 16-bit) */
26 #define TX4939IDE_Data 0x000
27 #define TX4939IDE_Error_Feature 0x001
28 #define TX4939IDE_Sec 0x002
29 #define TX4939IDE_LBA0 0x003
30 #define TX4939IDE_LBA1 0x004
31 #define TX4939IDE_LBA2 0x005
32 #define TX4939IDE_DevHead 0x006
33 #define TX4939IDE_Stat_Cmd 0x007
34 #define TX4939IDE_AltStat_DevCtl 0x402
35 /* H/W DMA Registers */
36 #define TX4939IDE_DMA_Cmd 0x800 /* 8-bit */
37 #define TX4939IDE_DMA_Stat 0x802 /* 8-bit */
38 #define TX4939IDE_PRD_Ptr 0x804 /* 32-bit */
39 /* ATA100 CORE Registers (16-bit) */
40 #define TX4939IDE_Sys_Ctl 0xc00
41 #define TX4939IDE_Xfer_Cnt_1 0xc08
42 #define TX4939IDE_Xfer_Cnt_2 0xc0a
43 #define TX4939IDE_Sec_Cnt 0xc10
44 #define TX4939IDE_Start_Lo_Addr 0xc18
45 #define TX4939IDE_Start_Up_Addr 0xc20
46 #define TX4939IDE_Add_Ctl 0xc28
47 #define TX4939IDE_Lo_Burst_Cnt 0xc30
48 #define TX4939IDE_Up_Burst_Cnt 0xc38
49 #define TX4939IDE_PIO_Addr 0xc88
50 #define TX4939IDE_H_Rst_Tim 0xc90
51 #define TX4939IDE_Int_Ctl 0xc98
52 #define TX4939IDE_Pkt_Cmd 0xcb8
53 #define TX4939IDE_Bxfer_Cnt_Hi 0xcc0
54 #define TX4939IDE_Bxfer_Cnt_Lo 0xcc8
55 #define TX4939IDE_Dev_TErr 0xcd0
56 #define TX4939IDE_Pkt_Xfer_Ctl 0xcd8
57 #define TX4939IDE_Start_TAddr 0xce0
59 /* bits for Int_Ctl */
60 #define TX4939IDE_INT_ADDRERR 0x80
61 #define TX4939IDE_INT_REACHMUL 0x40
62 #define TX4939IDE_INT_DEVTIMING 0x20
63 #define TX4939IDE_INT_UDMATERM 0x10
64 #define TX4939IDE_INT_TIMER 0x08
65 #define TX4939IDE_INT_BUSERR 0x04
66 #define TX4939IDE_INT_XFEREND 0x02
67 #define TX4939IDE_INT_HOST 0x01
69 #define TX4939IDE_IGNORE_INTS \
70 (TX4939IDE_INT_ADDRERR | TX4939IDE_INT_REACHMUL | \
71 TX4939IDE_INT_DEVTIMING | TX4939IDE_INT_UDMATERM | \
72 TX4939IDE_INT_TIMER | TX4939IDE_INT_XFEREND)
75 #define tx4939ide_swizzlel(a) ((a) ^ 4)
76 #define tx4939ide_swizzlew(a) ((a) ^ 6)
77 #define tx4939ide_swizzleb(a) ((a) ^ 7)
79 #define tx4939ide_swizzlel(a) (a)
80 #define tx4939ide_swizzlew(a) (a)
81 #define tx4939ide_swizzleb(a) (a)
84 static u16
tx4939ide_readw(void __iomem
*base
, u32 reg
)
86 return __raw_readw(base
+ tx4939ide_swizzlew(reg
));
88 static u8
tx4939ide_readb(void __iomem
*base
, u32 reg
)
90 return __raw_readb(base
+ tx4939ide_swizzleb(reg
));
92 static void tx4939ide_writel(u32 val
, void __iomem
*base
, u32 reg
)
94 __raw_writel(val
, base
+ tx4939ide_swizzlel(reg
));
96 static void tx4939ide_writew(u16 val
, void __iomem
*base
, u32 reg
)
98 __raw_writew(val
, base
+ tx4939ide_swizzlew(reg
));
100 static void tx4939ide_writeb(u8 val
, void __iomem
*base
, u32 reg
)
102 __raw_writeb(val
, base
+ tx4939ide_swizzleb(reg
));
105 #define TX4939IDE_BASE(hwif) ((void __iomem *)(hwif)->extra_base)
107 static void tx4939ide_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
109 ide_hwif_t
*hwif
= drive
->hwif
;
110 int is_slave
= drive
->dn
;
115 pair
= ide_get_pair_dev(drive
);
117 safe
= min(safe
, ide_get_best_pio_mode(pair
, 255, 4));
119 * Update Command Transfer Mode for master/slave and Data
120 * Transfer Mode for this drive.
122 mask
= is_slave
? 0x07f00000 : 0x000007f0;
123 val
= ((safe
<< 8) | (pio
<< 4)) << (is_slave
? 16 : 0);
124 hwif
->select_data
= (hwif
->select_data
& ~mask
) | val
;
125 /* tx4939ide_tf_load_fixup() will set the Sys_Ctl register */
128 static void tx4939ide_set_dma_mode(ide_drive_t
*drive
, const u8 mode
)
130 ide_hwif_t
*hwif
= drive
->hwif
;
133 /* Update Data Transfer Mode for this drive. */
134 if (mode
>= XFER_UDMA_0
)
135 val
= mode
- XFER_UDMA_0
+ 8;
137 val
= mode
- XFER_MW_DMA_0
+ 5;
145 hwif
->select_data
= (hwif
->select_data
& ~mask
) | val
;
146 /* tx4939ide_tf_load_fixup() will set the Sys_Ctl register */
149 static u16
tx4939ide_check_error_ints(ide_hwif_t
*hwif
)
151 void __iomem
*base
= TX4939IDE_BASE(hwif
);
152 u16 ctl
= tx4939ide_readw(base
, TX4939IDE_Int_Ctl
);
154 if (ctl
& TX4939IDE_INT_BUSERR
) {
156 u16 sysctl
= tx4939ide_readw(base
, TX4939IDE_Sys_Ctl
);
158 tx4939ide_writew(sysctl
| 0x4000, base
, TX4939IDE_Sys_Ctl
);
160 /* wait 12GBUSCLK (typ. 60ns @ GBUS200MHz, max 270ns) */
162 tx4939ide_writew(sysctl
, base
, TX4939IDE_Sys_Ctl
);
164 if (ctl
& (TX4939IDE_INT_ADDRERR
|
165 TX4939IDE_INT_DEVTIMING
| TX4939IDE_INT_BUSERR
))
166 pr_err("%s: Error interrupt %#x (%s%s%s )\n",
168 ctl
& TX4939IDE_INT_ADDRERR
? " Address-Error" : "",
169 ctl
& TX4939IDE_INT_DEVTIMING
? " DEV-Timing" : "",
170 ctl
& TX4939IDE_INT_BUSERR
? " Bus-Error" : "");
174 static void tx4939ide_clear_irq(ide_drive_t
*drive
)
181 * tx4939ide_dma_test_irq() and tx4939ide_dma_end() do all job
184 if (drive
->waiting_for_dma
)
187 base
= TX4939IDE_BASE(hwif
);
188 ctl
= tx4939ide_check_error_ints(hwif
);
189 tx4939ide_writew(ctl
, base
, TX4939IDE_Int_Ctl
);
192 static u8
tx4939ide_cable_detect(ide_hwif_t
*hwif
)
194 void __iomem
*base
= TX4939IDE_BASE(hwif
);
196 return tx4939ide_readw(base
, TX4939IDE_Sys_Ctl
) & 0x2000 ?
197 ATA_CBL_PATA40
: ATA_CBL_PATA80
;
201 static void tx4939ide_dma_host_set(ide_drive_t
*drive
, int on
)
203 ide_hwif_t
*hwif
= drive
->hwif
;
205 void __iomem
*base
= TX4939IDE_BASE(hwif
);
206 u8 dma_stat
= tx4939ide_readb(base
, TX4939IDE_DMA_Stat
);
209 dma_stat
|= (1 << (5 + unit
));
211 dma_stat
&= ~(1 << (5 + unit
));
213 tx4939ide_writeb(dma_stat
, base
, TX4939IDE_DMA_Stat
);
216 #define tx4939ide_dma_host_set ide_dma_host_set
219 static u8
tx4939ide_clear_dma_status(void __iomem
*base
)
223 /* read DMA status for INTR & ERROR flags */
224 dma_stat
= tx4939ide_readb(base
, TX4939IDE_DMA_Stat
);
225 /* clear INTR & ERROR flags */
226 tx4939ide_writeb(dma_stat
| ATA_DMA_INTR
| ATA_DMA_ERR
, base
,
228 /* recover intmask cleared by writing to bit2 of DMA_Stat */
229 tx4939ide_writew(TX4939IDE_IGNORE_INTS
<< 8, base
, TX4939IDE_Int_Ctl
);
234 /* custom ide_build_dmatable to handle swapped layout */
235 static int tx4939ide_build_dmatable(ide_drive_t
*drive
, struct ide_cmd
*cmd
)
237 ide_hwif_t
*hwif
= drive
->hwif
;
238 u32
*table
= (u32
*)hwif
->dmatable_cpu
;
239 unsigned int count
= 0;
241 struct scatterlist
*sg
;
243 for_each_sg(hwif
->sg_table
, sg
, cmd
->sg_nents
, i
) {
244 u32 cur_addr
, cur_len
, bcount
;
246 cur_addr
= sg_dma_address(sg
);
247 cur_len
= sg_dma_len(sg
);
250 * Fill in the DMA table, without crossing any 64kB boundaries.
254 if (count
++ >= PRD_ENTRIES
)
255 goto use_pio_instead
;
257 bcount
= 0x10000 - (cur_addr
& 0xffff);
258 if (bcount
> cur_len
)
261 * This workaround for zero count seems required.
262 * (standard ide_build_dmatable does it too)
264 if (bcount
== 0x10000)
266 *table
++ = bcount
& 0xffff;
274 *(table
- 2) |= 0x80000000;
279 printk(KERN_ERR
"%s: %s\n", drive
->name
,
280 count
? "DMA table too small" : "empty DMA table?");
282 return 0; /* revert to PIO for this request */
285 #define tx4939ide_build_dmatable ide_build_dmatable
288 static int tx4939ide_dma_setup(ide_drive_t
*drive
, struct ide_cmd
*cmd
)
290 ide_hwif_t
*hwif
= drive
->hwif
;
291 void __iomem
*base
= TX4939IDE_BASE(hwif
);
292 u8 rw
= (cmd
->tf_flags
& IDE_TFLAG_WRITE
) ? 0 : ATA_DMA_WR
;
294 /* fall back to PIO! */
295 if (tx4939ide_build_dmatable(drive
, cmd
) == 0)
299 tx4939ide_writel(hwif
->dmatable_dma
, base
, TX4939IDE_PRD_Ptr
);
302 tx4939ide_writeb(rw
, base
, TX4939IDE_DMA_Cmd
);
304 /* clear INTR & ERROR flags */
305 tx4939ide_clear_dma_status(base
);
307 tx4939ide_writew(SECTOR_SIZE
/ 2, base
, drive
->dn
?
308 TX4939IDE_Xfer_Cnt_2
: TX4939IDE_Xfer_Cnt_1
);
310 tx4939ide_writew(blk_rq_sectors(cmd
->rq
), base
, TX4939IDE_Sec_Cnt
);
315 static int tx4939ide_dma_end(ide_drive_t
*drive
)
317 ide_hwif_t
*hwif
= drive
->hwif
;
318 u8 dma_stat
, dma_cmd
;
319 void __iomem
*base
= TX4939IDE_BASE(hwif
);
320 u16 ctl
= tx4939ide_readw(base
, TX4939IDE_Int_Ctl
);
322 /* get DMA command mode */
323 dma_cmd
= tx4939ide_readb(base
, TX4939IDE_DMA_Cmd
);
325 tx4939ide_writeb(dma_cmd
& ~ATA_DMA_START
, base
, TX4939IDE_DMA_Cmd
);
327 /* read and clear the INTR & ERROR bits */
328 dma_stat
= tx4939ide_clear_dma_status(base
);
330 #define CHECK_DMA_MASK (ATA_DMA_ACTIVE | ATA_DMA_ERR | ATA_DMA_INTR)
332 /* verify good DMA status */
333 if ((dma_stat
& CHECK_DMA_MASK
) == 0 &&
334 (ctl
& (TX4939IDE_INT_XFEREND
| TX4939IDE_INT_HOST
)) ==
335 (TX4939IDE_INT_XFEREND
| TX4939IDE_INT_HOST
))
336 /* INT_IDE lost... bug? */
338 return ((dma_stat
& CHECK_DMA_MASK
) !=
339 ATA_DMA_INTR
) ? 0x10 | dma_stat
: 0;
342 /* returns 1 if DMA IRQ issued, 0 otherwise */
343 static int tx4939ide_dma_test_irq(ide_drive_t
*drive
)
345 ide_hwif_t
*hwif
= drive
->hwif
;
346 void __iomem
*base
= TX4939IDE_BASE(hwif
);
351 ctl
= tx4939ide_check_error_ints(hwif
);
352 ide_int
= ctl
& (TX4939IDE_INT_XFEREND
| TX4939IDE_INT_HOST
);
354 case TX4939IDE_INT_HOST
:
355 /* On error, XFEREND might not be asserted. */
356 stat
= tx4939ide_readb(base
, TX4939IDE_AltStat_DevCtl
);
357 if ((stat
& (ATA_BUSY
| ATA_DRQ
| ATA_ERR
)) == ATA_ERR
)
360 /* Wait for XFEREND (Mask HOST and unmask XFEREND) */
361 ctl
&= ~TX4939IDE_INT_XFEREND
<< 8;
364 case TX4939IDE_INT_HOST
| TX4939IDE_INT_XFEREND
:
365 dma_stat
= tx4939ide_readb(base
, TX4939IDE_DMA_Stat
);
366 if (!(dma_stat
& ATA_DMA_INTR
))
367 pr_warning("%s: weird interrupt status. "
368 "DMA_Stat %#02x int_ctl %#04x\n",
369 hwif
->name
, dma_stat
, ctl
);
374 * Do not clear XFEREND, HOST now. They will be cleared by
375 * clearing bit2 of DMA_Stat.
378 tx4939ide_writew(ctl
, base
, TX4939IDE_Int_Ctl
);
383 static u8
tx4939ide_dma_sff_read_status(ide_hwif_t
*hwif
)
385 void __iomem
*base
= TX4939IDE_BASE(hwif
);
387 return tx4939ide_readb(base
, TX4939IDE_DMA_Stat
);
390 #define tx4939ide_dma_sff_read_status ide_dma_sff_read_status
393 static void tx4939ide_init_hwif(ide_hwif_t
*hwif
)
395 void __iomem
*base
= TX4939IDE_BASE(hwif
);
398 tx4939ide_writew(0x8000, base
, TX4939IDE_Sys_Ctl
);
400 /* at least 20 GBUSCLK (typ. 100ns @ GBUS200MHz, max 450ns) */
402 tx4939ide_writew(0x0000, base
, TX4939IDE_Sys_Ctl
);
403 /* mask some interrupts and clear all interrupts */
404 tx4939ide_writew((TX4939IDE_IGNORE_INTS
<< 8) | 0xff, base
,
407 tx4939ide_writew(0x0008, base
, TX4939IDE_Lo_Burst_Cnt
);
408 tx4939ide_writew(0, base
, TX4939IDE_Up_Burst_Cnt
);
411 static int tx4939ide_init_dma(ide_hwif_t
*hwif
, const struct ide_port_info
*d
)
414 hwif
->extra_base
+ tx4939ide_swizzleb(TX4939IDE_DMA_Cmd
);
416 * Note that we cannot use ATA_DMA_TABLE_OFS, ATA_DMA_STATUS
419 return ide_allocate_dma_engine(hwif
);
422 static void tx4939ide_tf_load_fixup(ide_drive_t
*drive
)
424 ide_hwif_t
*hwif
= drive
->hwif
;
425 void __iomem
*base
= TX4939IDE_BASE(hwif
);
426 u16 sysctl
= hwif
->select_data
>> (drive
->dn
? 16 : 0);
429 * Fix ATA100 CORE System Control Register. (The write to the
430 * Device/Head register may write wrong data to the System
432 * While Sys_Ctl is written here, dev_select() is not needed.
434 tx4939ide_writew(sysctl
, base
, TX4939IDE_Sys_Ctl
);
437 static void tx4939ide_tf_load(ide_drive_t
*drive
, struct ide_taskfile
*tf
,
440 ide_tf_load(drive
, tf
, valid
);
442 if (valid
& IDE_VALID_DEVICE
)
443 tx4939ide_tf_load_fixup(drive
);
448 /* custom iops (independent from SWAP_IO_SPACE) */
449 static void tx4939ide_input_data_swap(ide_drive_t
*drive
, struct ide_cmd
*cmd
,
450 void *buf
, unsigned int len
)
452 unsigned long port
= drive
->hwif
->io_ports
.data_addr
;
453 unsigned short *ptr
= buf
;
454 unsigned int count
= (len
+ 1) / 2;
457 *ptr
++ = cpu_to_le16(__raw_readw((void __iomem
*)port
));
458 __ide_flush_dcache_range((unsigned long)buf
, roundup(len
, 2));
461 static void tx4939ide_output_data_swap(ide_drive_t
*drive
, struct ide_cmd
*cmd
,
462 void *buf
, unsigned int len
)
464 unsigned long port
= drive
->hwif
->io_ports
.data_addr
;
465 unsigned short *ptr
= buf
;
466 unsigned int count
= (len
+ 1) / 2;
469 __raw_writew(le16_to_cpu(*ptr
), (void __iomem
*)port
);
472 __ide_flush_dcache_range((unsigned long)buf
, roundup(len
, 2));
475 static const struct ide_tp_ops tx4939ide_tp_ops
= {
476 .exec_command
= ide_exec_command
,
477 .read_status
= ide_read_status
,
478 .read_altstatus
= ide_read_altstatus
,
479 .write_devctl
= ide_write_devctl
,
481 .dev_select
= ide_dev_select
,
482 .tf_load
= tx4939ide_tf_load
,
483 .tf_read
= ide_tf_read
,
485 .input_data
= tx4939ide_input_data_swap
,
486 .output_data
= tx4939ide_output_data_swap
,
489 #else /* __LITTLE_ENDIAN */
491 static const struct ide_tp_ops tx4939ide_tp_ops
= {
492 .exec_command
= ide_exec_command
,
493 .read_status
= ide_read_status
,
494 .read_altstatus
= ide_read_altstatus
,
495 .write_devctl
= ide_write_devctl
,
497 .dev_select
= ide_dev_select
,
498 .tf_load
= tx4939ide_tf_load
,
499 .tf_read
= ide_tf_read
,
501 .input_data
= ide_input_data
,
502 .output_data
= ide_output_data
,
505 #endif /* __LITTLE_ENDIAN */
507 static const struct ide_port_ops tx4939ide_port_ops
= {
508 .set_pio_mode
= tx4939ide_set_pio_mode
,
509 .set_dma_mode
= tx4939ide_set_dma_mode
,
510 .clear_irq
= tx4939ide_clear_irq
,
511 .cable_detect
= tx4939ide_cable_detect
,
514 static const struct ide_dma_ops tx4939ide_dma_ops
= {
515 .dma_host_set
= tx4939ide_dma_host_set
,
516 .dma_setup
= tx4939ide_dma_setup
,
517 .dma_start
= ide_dma_start
,
518 .dma_end
= tx4939ide_dma_end
,
519 .dma_test_irq
= tx4939ide_dma_test_irq
,
520 .dma_lost_irq
= ide_dma_lost_irq
,
521 .dma_timer_expiry
= ide_dma_sff_timer_expiry
,
522 .dma_sff_read_status
= tx4939ide_dma_sff_read_status
,
525 static const struct ide_port_info tx4939ide_port_info __initdata
= {
526 .init_hwif
= tx4939ide_init_hwif
,
527 .init_dma
= tx4939ide_init_dma
,
528 .port_ops
= &tx4939ide_port_ops
,
529 .dma_ops
= &tx4939ide_dma_ops
,
530 .tp_ops
= &tx4939ide_tp_ops
,
531 .host_flags
= IDE_HFLAG_MMIO
,
532 .pio_mask
= ATA_PIO4
,
533 .mwdma_mask
= ATA_MWDMA2
,
534 .udma_mask
= ATA_UDMA5
,
535 .chipset
= ide_generic
,
538 static int __init
tx4939ide_probe(struct platform_device
*pdev
)
541 hw_regs_t
*hws
[] = { &hw
, NULL
, NULL
, NULL
};
542 struct ide_host
*host
;
543 struct resource
*res
;
545 unsigned long mapbase
;
547 irq
= platform_get_irq(pdev
, 0);
550 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
554 if (!devm_request_mem_region(&pdev
->dev
, res
->start
,
555 res
->end
- res
->start
+ 1, "tx4938ide"))
557 mapbase
= (unsigned long)devm_ioremap(&pdev
->dev
, res
->start
,
558 res
->end
- res
->start
+ 1);
561 memset(&hw
, 0, sizeof(hw
));
562 hw
.io_ports
.data_addr
=
563 mapbase
+ tx4939ide_swizzlew(TX4939IDE_Data
);
564 hw
.io_ports
.error_addr
=
565 mapbase
+ tx4939ide_swizzleb(TX4939IDE_Error_Feature
);
566 hw
.io_ports
.nsect_addr
=
567 mapbase
+ tx4939ide_swizzleb(TX4939IDE_Sec
);
568 hw
.io_ports
.lbal_addr
=
569 mapbase
+ tx4939ide_swizzleb(TX4939IDE_LBA0
);
570 hw
.io_ports
.lbam_addr
=
571 mapbase
+ tx4939ide_swizzleb(TX4939IDE_LBA1
);
572 hw
.io_ports
.lbah_addr
=
573 mapbase
+ tx4939ide_swizzleb(TX4939IDE_LBA2
);
574 hw
.io_ports
.device_addr
=
575 mapbase
+ tx4939ide_swizzleb(TX4939IDE_DevHead
);
576 hw
.io_ports
.command_addr
=
577 mapbase
+ tx4939ide_swizzleb(TX4939IDE_Stat_Cmd
);
578 hw
.io_ports
.ctl_addr
=
579 mapbase
+ tx4939ide_swizzleb(TX4939IDE_AltStat_DevCtl
);
583 pr_info("TX4939 IDE interface (base %#lx, irq %d)\n", mapbase
, irq
);
584 host
= ide_host_alloc(&tx4939ide_port_info
, hws
);
587 /* use extra_base for base address of the all registers */
588 host
->ports
[0]->extra_base
= mapbase
;
589 ret
= ide_host_register(host
, &tx4939ide_port_info
, hws
);
594 platform_set_drvdata(pdev
, host
);
598 static int __exit
tx4939ide_remove(struct platform_device
*pdev
)
600 struct ide_host
*host
= platform_get_drvdata(pdev
);
602 ide_host_remove(host
);
607 static int tx4939ide_resume(struct platform_device
*dev
)
609 struct ide_host
*host
= platform_get_drvdata(dev
);
610 ide_hwif_t
*hwif
= host
->ports
[0];
612 tx4939ide_init_hwif(hwif
);
616 #define tx4939ide_resume NULL
619 static struct platform_driver tx4939ide_driver
= {
622 .owner
= THIS_MODULE
,
624 .remove
= __exit_p(tx4939ide_remove
),
625 .resume
= tx4939ide_resume
,
628 static int __init
tx4939ide_init(void)
630 return platform_driver_probe(&tx4939ide_driver
, tx4939ide_probe
);
633 static void __exit
tx4939ide_exit(void)
635 platform_driver_unregister(&tx4939ide_driver
);
638 module_init(tx4939ide_init
);
639 module_exit(tx4939ide_exit
);
641 MODULE_DESCRIPTION("TX4939 internal IDE driver");
642 MODULE_LICENSE("GPL");
643 MODULE_ALIAS("platform:tx4939ide");