2 * pcilynx.c - Texas Instruments PCILynx driver
3 * Copyright (C) 1999,2000 Andreas Bombe <andreas.bombe@munich.netsurf.de>,
4 * Stephan Linz <linz@mazet.de>
5 * Manfred Weihs <weihs@ict.tuwien.ac.at>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software Foundation,
19 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 * Manfred Weihs <weihs@ict.tuwien.ac.at>
26 * reading bus info block (containing GUID) from serial
27 * eeprom via i2c and storing it in config ROM
28 * Reworked code for initiating bus resets
29 * (long, short, with or without hold-off)
30 * Enhancements in async and iso send code
33 #include <linux/kernel.h>
34 #include <linux/slab.h>
35 #include <linux/interrupt.h>
36 #include <linux/wait.h>
37 #include <linux/errno.h>
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/init.h>
41 #include <linux/pci.h>
43 #include <linux/poll.h>
44 #include <linux/kdev_t.h>
45 #include <linux/dma-mapping.h>
46 #include <asm/byteorder.h>
47 #include <asm/atomic.h>
49 #include <asm/uaccess.h>
54 #include "ieee1394_types.h"
56 #include "ieee1394_core.h"
57 #include "highlevel.h"
60 #include <linux/i2c.h>
61 #include <linux/i2c-algo-bit.h>
63 /* print general (card independent) information */
64 #define PRINT_G(level, fmt, args...) printk(level "pcilynx: " fmt "\n" , ## args)
65 /* print card specific information */
66 #define PRINT(level, card, fmt, args...) printk(level "pcilynx%d: " fmt "\n" , card , ## args)
68 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
69 #define PRINT_GD(level, fmt, args...) printk(level "pcilynx: " fmt "\n" , ## args)
70 #define PRINTD(level, card, fmt, args...) printk(level "pcilynx%d: " fmt "\n" , card , ## args)
72 #define PRINT_GD(level, fmt, args...) do {} while (0)
73 #define PRINTD(level, card, fmt, args...) do {} while (0)
77 /* Module Parameters */
78 static int skip_eeprom
;
79 module_param(skip_eeprom
, int, 0444);
80 MODULE_PARM_DESC(skip_eeprom
, "Use generic bus info block instead of serial eeprom (default = 0).");
83 static struct hpsb_host_driver lynx_driver
;
84 static unsigned int card_id
;
92 /* the i2c stuff was inspired by i2c-philips-par.c */
94 static void bit_setscl(void *data
, int state
)
97 ((struct ti_lynx
*) data
)->i2c_driven_state
|= 0x00000040;
99 ((struct ti_lynx
*) data
)->i2c_driven_state
&= ~0x00000040;
101 reg_write((struct ti_lynx
*) data
, SERIAL_EEPROM_CONTROL
, ((struct ti_lynx
*) data
)->i2c_driven_state
);
104 static void bit_setsda(void *data
, int state
)
107 ((struct ti_lynx
*) data
)->i2c_driven_state
|= 0x00000010;
109 ((struct ti_lynx
*) data
)->i2c_driven_state
&= ~0x00000010;
111 reg_write((struct ti_lynx
*) data
, SERIAL_EEPROM_CONTROL
, ((struct ti_lynx
*) data
)->i2c_driven_state
);
114 static int bit_getscl(void *data
)
116 return reg_read((struct ti_lynx
*) data
, SERIAL_EEPROM_CONTROL
) & 0x00000040;
119 static int bit_getsda(void *data
)
121 return reg_read((struct ti_lynx
*) data
, SERIAL_EEPROM_CONTROL
) & 0x00000010;
124 static int bit_reg(struct i2c_client
*client
)
129 static int bit_unreg(struct i2c_client
*client
)
134 static struct i2c_algo_bit_data bit_data
= {
135 .setsda
= bit_setsda
,
136 .setscl
= bit_setscl
,
137 .getsda
= bit_getsda
,
138 .getscl
= bit_getscl
,
143 static struct i2c_adapter bit_ops
= {
144 .id
= 0xAA, //FIXME: probably we should get an id in i2c-id.h
145 .client_register
= bit_reg
,
146 .client_unregister
= bit_unreg
,
147 .name
= "PCILynx I2C",
153 * PCL handling functions.
156 static pcl_t
alloc_pcl(struct ti_lynx
*lynx
)
161 spin_lock(&lynx
->lock
);
162 /* FIXME - use ffz() to make this readable */
163 for (i
= 0; i
< (LOCALRAM_SIZE
/ 1024); i
++) {
164 m
= lynx
->pcl_bmap
[i
];
165 for (j
= 0; j
< 8; j
++) {
170 lynx
->pcl_bmap
[i
] = m
;
171 spin_unlock(&lynx
->lock
);
175 spin_unlock(&lynx
->lock
);
182 static void free_pcl(struct ti_lynx
*lynx
, pcl_t pclid
)
193 spin_lock(&lynx
->lock
);
194 if (lynx
->pcl_bmap
[off
] & 1<<bit
) {
195 lynx
->pcl_bmap
[off
] &= ~(1<<bit
);
197 PRINT(KERN_ERR
, lynx
->id
,
198 "attempted to free unallocated PCL %d", pclid
);
200 spin_unlock(&lynx
->lock
);
203 /* functions useful for debugging */
204 static void pretty_print_pcl(const struct ti_pcl
*pcl
)
208 printk("PCL next %08x, userdata %08x, status %08x, remtrans %08x, nextbuf %08x\n",
209 pcl
->next
, pcl
->user_data
, pcl
->pcl_status
,
210 pcl
->remaining_transfer_count
, pcl
->next_data_buffer
);
213 for (i
=0; i
<13; i
++) {
214 printk(" c%x:%08x d%x:%08x",
215 i
, pcl
->buffer
[i
].control
, i
, pcl
->buffer
[i
].pointer
);
216 if (!(i
& 0x3) && (i
!= 12)) printk("\nPCL");
221 static void print_pcl(const struct ti_lynx
*lynx
, pcl_t pclid
)
225 get_pcl(lynx
, pclid
, &pcl
);
226 pretty_print_pcl(&pcl
);
232 /***********************************
233 * IEEE-1394 functionality section *
234 ***********************************/
237 static int get_phy_reg(struct ti_lynx
*lynx
, int addr
)
245 PRINT(KERN_ERR
, lynx
->id
,
246 "%s: PHY register address %d out of range",
251 spin_lock_irqsave(&lynx
->phy_reg_lock
, flags
);
253 reg_write(lynx
, LINK_PHY
, LINK_PHY_READ
| LINK_PHY_ADDR(addr
));
255 retval
= reg_read(lynx
, LINK_PHY
);
258 PRINT(KERN_ERR
, lynx
->id
, "%s: runaway loop, aborting",
264 } while ((retval
& 0xf00) != LINK_PHY_RADDR(addr
));
266 reg_write(lynx
, LINK_INT_STATUS
, LINK_INT_PHY_REG_RCVD
);
267 spin_unlock_irqrestore(&lynx
->phy_reg_lock
, flags
);
270 return retval
& 0xff;
276 static int set_phy_reg(struct ti_lynx
*lynx
, int addr
, int val
)
281 PRINT(KERN_ERR
, lynx
->id
,
282 "%s: PHY register address %d out of range", __FUNCTION__
, addr
);
287 PRINT(KERN_ERR
, lynx
->id
,
288 "%s: PHY register value %d out of range", __FUNCTION__
, val
);
292 spin_lock_irqsave(&lynx
->phy_reg_lock
, flags
);
294 reg_write(lynx
, LINK_PHY
, LINK_PHY_WRITE
| LINK_PHY_ADDR(addr
)
295 | LINK_PHY_WDATA(val
));
297 spin_unlock_irqrestore(&lynx
->phy_reg_lock
, flags
);
302 static int sel_phy_reg_page(struct ti_lynx
*lynx
, int page
)
307 PRINT(KERN_ERR
, lynx
->id
,
308 "%s: PHY page %d out of range", __FUNCTION__
, page
);
312 reg
= get_phy_reg(lynx
, 7);
316 set_phy_reg(lynx
, 7, reg
);
323 #if 0 /* not needed at this time */
324 static int sel_phy_reg_port(struct ti_lynx
*lynx
, int port
)
329 PRINT(KERN_ERR
, lynx
->id
,
330 "%s: PHY port %d out of range", __FUNCTION__
, port
);
334 reg
= get_phy_reg(lynx
, 7);
338 set_phy_reg(lynx
, 7, reg
);
346 static u32
get_phy_vendorid(struct ti_lynx
*lynx
)
349 sel_phy_reg_page(lynx
, 1);
350 pvid
|= (get_phy_reg(lynx
, 10) << 16);
351 pvid
|= (get_phy_reg(lynx
, 11) << 8);
352 pvid
|= get_phy_reg(lynx
, 12);
353 PRINT(KERN_INFO
, lynx
->id
, "PHY vendor id 0x%06x", pvid
);
357 static u32
get_phy_productid(struct ti_lynx
*lynx
)
360 sel_phy_reg_page(lynx
, 1);
361 id
|= (get_phy_reg(lynx
, 13) << 16);
362 id
|= (get_phy_reg(lynx
, 14) << 8);
363 id
|= get_phy_reg(lynx
, 15);
364 PRINT(KERN_INFO
, lynx
->id
, "PHY product id 0x%06x", id
);
368 static quadlet_t
generate_own_selfid(struct ti_lynx
*lynx
,
369 struct hpsb_host
*host
)
375 phyreg
[0] = lynx
->phy_reg0
;
376 for (i
= 1; i
< 7; i
++) {
377 phyreg
[i
] = get_phy_reg(lynx
, i
);
380 /* FIXME? We assume a TSB21LV03A phy here. This code doesn't support
381 more than 3 ports on the PHY anyway. */
383 lsid
= 0x80400000 | ((phyreg
[0] & 0xfc) << 22);
384 lsid
|= (phyreg
[1] & 0x3f) << 16; /* gap count */
385 lsid
|= (phyreg
[2] & 0xc0) << 8; /* max speed */
386 if (!hpsb_disable_irm
)
387 lsid
|= (phyreg
[6] & 0x01) << 11; /* contender (phy dependent) */
388 /* lsid |= 1 << 11; *//* set contender (hack) */
389 lsid
|= (phyreg
[6] & 0x10) >> 3; /* initiated reset */
391 for (i
= 0; i
< (phyreg
[2] & 0xf); i
++) { /* ports */
392 if (phyreg
[3 + i
] & 0x4) {
393 lsid
|= (((phyreg
[3 + i
] & 0x8) | 0x10) >> 3)
396 lsid
|= 1 << (6 - i
*2);
401 PRINT(KERN_DEBUG
, lynx
->id
, "generated own selfid 0x%x", lsid
);
405 static void handle_selfid(struct ti_lynx
*lynx
, struct hpsb_host
*host
)
407 quadlet_t
*q
= lynx
->rcv_page
;
408 int phyid
, isroot
, size
;
412 if (lynx
->phy_reg0
== -1 || lynx
->selfid_size
== -1) return;
414 size
= lynx
->selfid_size
;
415 phyid
= lynx
->phy_reg0
;
417 i
= (size
> 16 ? 16 : size
) / 4 - 1;
423 if (!lynx
->phyic
.reg_1394a
) {
424 lsid
= generate_own_selfid(lynx
, host
);
427 isroot
= (phyid
& 2) != 0;
429 PRINT(KERN_INFO
, lynx
->id
, "SelfID process finished (phyid %d, %s)",
430 phyid
, (isroot
? "root" : "not root"));
431 reg_write(lynx
, LINK_ID
, (0xffc0 | phyid
) << 16);
433 if (!lynx
->phyic
.reg_1394a
&& !size
) {
434 hpsb_selfid_received(host
, lsid
);
438 struct selfid
*sid
= (struct selfid
*)q
;
440 if (!lynx
->phyic
.reg_1394a
&& !sid
->extended
441 && (sid
->phy_id
== (phyid
+ 1))) {
442 hpsb_selfid_received(host
, lsid
);
446 PRINT(KERN_DEBUG
, lynx
->id
, "SelfID packet 0x%x rcvd",
448 hpsb_selfid_received(host
, q
[0]);
450 PRINT(KERN_INFO
, lynx
->id
,
451 "inconsistent selfid 0x%x/0x%x", q
[0], q
[1]);
457 if (!lynx
->phyic
.reg_1394a
&& isroot
&& phyid
!= 0) {
458 hpsb_selfid_received(host
, lsid
);
461 hpsb_selfid_complete(host
, phyid
, isroot
);
463 if (host
->in_bus_reset
) return; /* in bus reset again */
465 if (isroot
) reg_set_bits(lynx
, LINK_CONTROL
, LINK_CONTROL_CYCMASTER
); //FIXME: I do not think, we need this here
466 reg_set_bits(lynx
, LINK_CONTROL
,
467 LINK_CONTROL_RCV_CMP_VALID
| LINK_CONTROL_TX_ASYNC_EN
468 | LINK_CONTROL_RX_ASYNC_EN
| LINK_CONTROL_CYCTIMEREN
);
473 /* This must be called with the respective queue_lock held. */
474 static void send_next(struct ti_lynx
*lynx
, int what
)
477 struct lynx_send_data
*d
;
478 struct hpsb_packet
*packet
;
480 d
= (what
== hpsb_iso
? &lynx
->iso_send
: &lynx
->async
);
481 if (!list_empty(&d
->pcl_queue
)) {
482 PRINT(KERN_ERR
, lynx
->id
, "trying to queue a new packet in nonempty fifo");
486 packet
= driver_packet(d
->queue
.next
);
487 list_move_tail(&packet
->driver_list
, &d
->pcl_queue
);
489 d
->header_dma
= pci_map_single(lynx
->dev
, packet
->header
,
490 packet
->header_size
, PCI_DMA_TODEVICE
);
491 if (packet
->data_size
) {
492 d
->data_dma
= pci_map_single(lynx
->dev
, packet
->data
,
499 pcl
.next
= PCL_NEXT_INVALID
;
500 pcl
.async_error_next
= PCL_NEXT_INVALID
;
502 pcl
.buffer
[0].control
= packet
->speed_code
<< 14 | packet
->header_size
;
504 pcl
.buffer
[0].control
|= PCL_BIGENDIAN
;
506 pcl
.buffer
[0].pointer
= d
->header_dma
;
507 pcl
.buffer
[1].control
= PCL_LAST_BUFF
| packet
->data_size
;
508 pcl
.buffer
[1].pointer
= d
->data_dma
;
510 switch (packet
->type
) {
512 pcl
.buffer
[0].control
|= PCL_CMD_XMT
;
515 pcl
.buffer
[0].control
|= PCL_CMD_XMT
| PCL_ISOMODE
;
518 pcl
.buffer
[0].control
|= PCL_CMD_UNFXMT
;
522 put_pcl(lynx
, d
->pcl
, &pcl
);
523 run_pcl(lynx
, d
->pcl_start
, d
->channel
);
527 /* called from subsystem core */
528 static int lynx_transmit(struct hpsb_host
*host
, struct hpsb_packet
*packet
)
530 struct ti_lynx
*lynx
= host
->hostdata
;
531 struct lynx_send_data
*d
;
534 if (packet
->data_size
>= 4096) {
535 PRINT(KERN_ERR
, lynx
->id
, "transmit packet data too big (%Zd)",
540 switch (packet
->type
) {
549 PRINT(KERN_ERR
, lynx
->id
, "invalid packet type %d",
554 if (packet
->tcode
== TCODE_WRITEQ
555 || packet
->tcode
== TCODE_READQ_RESPONSE
) {
556 cpu_to_be32s(&packet
->header
[3]);
559 spin_lock_irqsave(&d
->queue_lock
, flags
);
561 list_add_tail(&packet
->driver_list
, &d
->queue
);
562 if (list_empty(&d
->pcl_queue
))
563 send_next(lynx
, packet
->type
);
565 spin_unlock_irqrestore(&d
->queue_lock
, flags
);
571 /* called from subsystem core */
572 static int lynx_devctl(struct hpsb_host
*host
, enum devctl_cmd cmd
, int arg
)
574 struct ti_lynx
*lynx
= host
->hostdata
;
576 struct hpsb_packet
*packet
;
577 LIST_HEAD(packet_list
);
583 if (reg_read(lynx
, LINK_INT_STATUS
) & LINK_INT_PHY_BUSRESET
) {
590 if (lynx
->phyic
.reg_1394a
) {
591 phy_reg
= get_phy_reg(lynx
, 5);
593 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
599 PRINT(KERN_INFO
, lynx
->id
, "resetting bus (short bus reset) on request");
601 lynx
->selfid_size
= -1;
603 set_phy_reg(lynx
, 5, phy_reg
); /* set ISBR */
606 PRINT(KERN_INFO
, lynx
->id
, "cannot do short bus reset, because of old phy");
607 /* fall through to long bus reset */
610 phy_reg
= get_phy_reg(lynx
, 1);
612 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
618 PRINT(KERN_INFO
, lynx
->id
, "resetting bus (long bus reset) on request");
620 lynx
->selfid_size
= -1;
622 set_phy_reg(lynx
, 1, phy_reg
); /* clear RHB, set IBR */
624 case SHORT_RESET_NO_FORCE_ROOT
:
625 if (lynx
->phyic
.reg_1394a
) {
626 phy_reg
= get_phy_reg(lynx
, 1);
628 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
632 if (phy_reg
& 0x80) {
634 set_phy_reg(lynx
, 1, phy_reg
); /* clear RHB */
637 phy_reg
= get_phy_reg(lynx
, 5);
639 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
645 PRINT(KERN_INFO
, lynx
->id
, "resetting bus (short bus reset, no force_root) on request");
647 lynx
->selfid_size
= -1;
649 set_phy_reg(lynx
, 5, phy_reg
); /* set ISBR */
652 PRINT(KERN_INFO
, lynx
->id
, "cannot do short bus reset, because of old phy");
653 /* fall through to long bus reset */
655 case LONG_RESET_NO_FORCE_ROOT
:
656 phy_reg
= get_phy_reg(lynx
, 1);
658 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
665 PRINT(KERN_INFO
, lynx
->id
, "resetting bus (long bus reset, no force_root) on request");
667 lynx
->selfid_size
= -1;
669 set_phy_reg(lynx
, 1, phy_reg
); /* clear RHB, set IBR */
671 case SHORT_RESET_FORCE_ROOT
:
672 if (lynx
->phyic
.reg_1394a
) {
673 phy_reg
= get_phy_reg(lynx
, 1);
675 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
679 if (!(phy_reg
& 0x80)) {
681 set_phy_reg(lynx
, 1, phy_reg
); /* set RHB */
684 phy_reg
= get_phy_reg(lynx
, 5);
686 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
692 PRINT(KERN_INFO
, lynx
->id
, "resetting bus (short bus reset, force_root set) on request");
694 lynx
->selfid_size
= -1;
696 set_phy_reg(lynx
, 5, phy_reg
); /* set ISBR */
699 PRINT(KERN_INFO
, lynx
->id
, "cannot do short bus reset, because of old phy");
700 /* fall through to long bus reset */
702 case LONG_RESET_FORCE_ROOT
:
703 phy_reg
= get_phy_reg(lynx
, 1);
705 PRINT(KERN_ERR
, lynx
->id
, "cannot reset bus, because read phy reg failed");
711 PRINT(KERN_INFO
, lynx
->id
, "resetting bus (long bus reset, force_root set) on request");
713 lynx
->selfid_size
= -1;
715 set_phy_reg(lynx
, 1, phy_reg
); /* set IBR and RHB */
718 PRINT(KERN_ERR
, lynx
->id
, "unknown argument for reset_bus command %d", arg
);
724 case GET_CYCLE_COUNTER
:
725 retval
= reg_read(lynx
, CYCLE_TIMER
);
728 case SET_CYCLE_COUNTER
:
729 reg_write(lynx
, CYCLE_TIMER
, arg
);
733 reg_write(lynx
, LINK_ID
,
734 (arg
<< 22) | (reg_read(lynx
, LINK_ID
) & 0x003f0000));
737 case ACT_CYCLE_MASTER
:
739 reg_set_bits(lynx
, LINK_CONTROL
,
740 LINK_CONTROL_CYCMASTER
);
742 reg_clear_bits(lynx
, LINK_CONTROL
,
743 LINK_CONTROL_CYCMASTER
);
747 case CANCEL_REQUESTS
:
748 spin_lock_irqsave(&lynx
->async
.queue_lock
, flags
);
750 reg_write(lynx
, DMA_CHAN_CTRL(CHANNEL_ASYNC_SEND
), 0);
751 list_splice(&lynx
->async
.queue
, &packet_list
);
752 INIT_LIST_HEAD(&lynx
->async
.queue
);
754 if (list_empty(&lynx
->async
.pcl_queue
)) {
755 spin_unlock_irqrestore(&lynx
->async
.queue_lock
, flags
);
756 PRINTD(KERN_DEBUG
, lynx
->id
, "no async packet in PCL to cancel");
760 struct hpsb_packet
*packet
;
762 PRINT(KERN_INFO
, lynx
->id
, "cancelling async packet, that was already in PCL");
764 get_pcl(lynx
, lynx
->async
.pcl
, &pcl
);
766 packet
= driver_packet(lynx
->async
.pcl_queue
.next
);
767 list_del_init(&packet
->driver_list
);
769 pci_unmap_single(lynx
->dev
, lynx
->async
.header_dma
,
770 packet
->header_size
, PCI_DMA_TODEVICE
);
771 if (packet
->data_size
) {
772 pci_unmap_single(lynx
->dev
, lynx
->async
.data_dma
,
773 packet
->data_size
, PCI_DMA_TODEVICE
);
776 spin_unlock_irqrestore(&lynx
->async
.queue_lock
, flags
);
778 if (pcl
.pcl_status
& DMA_CHAN_STAT_PKTCMPL
) {
779 if (pcl
.pcl_status
& DMA_CHAN_STAT_SPECIALACK
) {
780 ack
= (pcl
.pcl_status
>> 15) & 0xf;
781 PRINTD(KERN_INFO
, lynx
->id
, "special ack %d", ack
);
782 ack
= (ack
== 1 ? ACKX_TIMEOUT
: ACKX_SEND_ERROR
);
784 ack
= (pcl
.pcl_status
>> 15) & 0xf;
787 PRINT(KERN_INFO
, lynx
->id
, "async packet was not completed");
790 hpsb_packet_sent(host
, packet
, ack
);
793 while (!list_empty(&packet_list
)) {
794 packet
= driver_packet(packet_list
.next
);
795 list_del_init(&packet
->driver_list
);
796 hpsb_packet_sent(host
, packet
, ACKX_ABORTED
);
801 case ISO_LISTEN_CHANNEL
:
802 spin_lock_irqsave(&lynx
->iso_rcv
.lock
, flags
);
804 if (lynx
->iso_rcv
.chan_count
++ == 0) {
805 reg_write(lynx
, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV
),
806 DMA_WORD1_CMP_ENABLE_MASTER
);
809 spin_unlock_irqrestore(&lynx
->iso_rcv
.lock
, flags
);
812 case ISO_UNLISTEN_CHANNEL
:
813 spin_lock_irqsave(&lynx
->iso_rcv
.lock
, flags
);
815 if (--lynx
->iso_rcv
.chan_count
== 0) {
816 reg_write(lynx
, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV
),
820 spin_unlock_irqrestore(&lynx
->iso_rcv
.lock
, flags
);
824 PRINT(KERN_ERR
, lynx
->id
, "unknown devctl command %d", cmd
);
832 /***************************************
833 * IEEE-1394 functionality section END *
834 ***************************************/
837 /********************************************************
838 * Global stuff (interrupt handler, init/shutdown code) *
839 ********************************************************/
842 static irqreturn_t
lynx_irq_handler(int irq
, void *dev_id
,
843 struct pt_regs
*regs_are_unused
)
845 struct ti_lynx
*lynx
= (struct ti_lynx
*)dev_id
;
846 struct hpsb_host
*host
= lynx
->host
;
850 linkint
= reg_read(lynx
, LINK_INT_STATUS
);
851 intmask
= reg_read(lynx
, PCI_INT_STATUS
);
853 if (!(intmask
& PCI_INT_INT_PEND
))
856 PRINTD(KERN_DEBUG
, lynx
->id
, "interrupt: 0x%08x / 0x%08x", intmask
,
859 reg_write(lynx
, LINK_INT_STATUS
, linkint
);
860 reg_write(lynx
, PCI_INT_STATUS
, intmask
);
862 if (intmask
& PCI_INT_1394
) {
863 if (linkint
& LINK_INT_PHY_TIMEOUT
) {
864 PRINT(KERN_INFO
, lynx
->id
, "PHY timeout occurred");
866 if (linkint
& LINK_INT_PHY_BUSRESET
) {
867 PRINT(KERN_INFO
, lynx
->id
, "bus reset interrupt");
868 lynx
->selfid_size
= -1;
870 if (!host
->in_bus_reset
)
871 hpsb_bus_reset(host
);
873 if (linkint
& LINK_INT_PHY_REG_RCVD
) {
876 spin_lock(&lynx
->phy_reg_lock
);
877 reg
= reg_read(lynx
, LINK_PHY
);
878 spin_unlock(&lynx
->phy_reg_lock
);
880 if (!host
->in_bus_reset
) {
881 PRINT(KERN_INFO
, lynx
->id
,
882 "phy reg received without reset");
883 } else if (reg
& 0xf00) {
884 PRINT(KERN_INFO
, lynx
->id
,
885 "unsolicited phy reg %d received",
888 lynx
->phy_reg0
= reg
& 0xff;
889 handle_selfid(lynx
, host
);
892 if (linkint
& LINK_INT_ISO_STUCK
) {
893 PRINT(KERN_INFO
, lynx
->id
, "isochronous transmitter stuck");
895 if (linkint
& LINK_INT_ASYNC_STUCK
) {
896 PRINT(KERN_INFO
, lynx
->id
, "asynchronous transmitter stuck");
898 if (linkint
& LINK_INT_SENT_REJECT
) {
899 PRINT(KERN_INFO
, lynx
->id
, "sent reject");
901 if (linkint
& LINK_INT_TX_INVALID_TC
) {
902 PRINT(KERN_INFO
, lynx
->id
, "invalid transaction code");
904 if (linkint
& LINK_INT_GRF_OVERFLOW
) {
905 /* flush FIFO if overflow happens during reset */
906 if (host
->in_bus_reset
)
907 reg_write(lynx
, FIFO_CONTROL
,
908 FIFO_CONTROL_GRF_FLUSH
);
909 PRINT(KERN_INFO
, lynx
->id
, "GRF overflow");
911 if (linkint
& LINK_INT_ITF_UNDERFLOW
) {
912 PRINT(KERN_INFO
, lynx
->id
, "ITF underflow");
914 if (linkint
& LINK_INT_ATF_UNDERFLOW
) {
915 PRINT(KERN_INFO
, lynx
->id
, "ATF underflow");
919 if (intmask
& PCI_INT_DMA_HLT(CHANNEL_ISO_RCV
)) {
920 PRINTD(KERN_DEBUG
, lynx
->id
, "iso receive");
922 spin_lock(&lynx
->iso_rcv
.lock
);
924 lynx
->iso_rcv
.stat
[lynx
->iso_rcv
.next
] =
925 reg_read(lynx
, DMA_CHAN_STAT(CHANNEL_ISO_RCV
));
927 lynx
->iso_rcv
.used
++;
928 lynx
->iso_rcv
.next
= (lynx
->iso_rcv
.next
+ 1) % NUM_ISORCV_PCL
;
930 if ((lynx
->iso_rcv
.next
== lynx
->iso_rcv
.last
)
931 || !lynx
->iso_rcv
.chan_count
) {
932 PRINTD(KERN_DEBUG
, lynx
->id
, "stopped");
933 reg_write(lynx
, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV
), 0);
936 run_sub_pcl(lynx
, lynx
->iso_rcv
.pcl_start
, lynx
->iso_rcv
.next
,
939 spin_unlock(&lynx
->iso_rcv
.lock
);
941 tasklet_schedule(&lynx
->iso_rcv
.tq
);
944 if (intmask
& PCI_INT_DMA_HLT(CHANNEL_ASYNC_SEND
)) {
945 PRINTD(KERN_DEBUG
, lynx
->id
, "async sent");
946 spin_lock(&lynx
->async
.queue_lock
);
948 if (list_empty(&lynx
->async
.pcl_queue
)) {
949 spin_unlock(&lynx
->async
.queue_lock
);
950 PRINT(KERN_WARNING
, lynx
->id
, "async dma halted, but no queued packet (maybe it was cancelled)");
954 struct hpsb_packet
*packet
;
956 get_pcl(lynx
, lynx
->async
.pcl
, &pcl
);
958 packet
= driver_packet(lynx
->async
.pcl_queue
.next
);
959 list_del_init(&packet
->driver_list
);
961 pci_unmap_single(lynx
->dev
, lynx
->async
.header_dma
,
962 packet
->header_size
, PCI_DMA_TODEVICE
);
963 if (packet
->data_size
) {
964 pci_unmap_single(lynx
->dev
, lynx
->async
.data_dma
,
965 packet
->data_size
, PCI_DMA_TODEVICE
);
968 if (!list_empty(&lynx
->async
.queue
)) {
969 send_next(lynx
, hpsb_async
);
972 spin_unlock(&lynx
->async
.queue_lock
);
974 if (pcl
.pcl_status
& DMA_CHAN_STAT_PKTCMPL
) {
975 if (pcl
.pcl_status
& DMA_CHAN_STAT_SPECIALACK
) {
976 ack
= (pcl
.pcl_status
>> 15) & 0xf;
977 PRINTD(KERN_INFO
, lynx
->id
, "special ack %d", ack
);
978 ack
= (ack
== 1 ? ACKX_TIMEOUT
: ACKX_SEND_ERROR
);
980 ack
= (pcl
.pcl_status
>> 15) & 0xf;
983 PRINT(KERN_INFO
, lynx
->id
, "async packet was not completed");
984 ack
= ACKX_SEND_ERROR
;
986 hpsb_packet_sent(host
, packet
, ack
);
990 if (intmask
& PCI_INT_DMA_HLT(CHANNEL_ISO_SEND
)) {
991 PRINTD(KERN_DEBUG
, lynx
->id
, "iso sent");
992 spin_lock(&lynx
->iso_send
.queue_lock
);
994 if (list_empty(&lynx
->iso_send
.pcl_queue
)) {
995 spin_unlock(&lynx
->iso_send
.queue_lock
);
996 PRINT(KERN_ERR
, lynx
->id
, "iso send dma halted, but no queued packet");
1000 struct hpsb_packet
*packet
;
1002 get_pcl(lynx
, lynx
->iso_send
.pcl
, &pcl
);
1004 packet
= driver_packet(lynx
->iso_send
.pcl_queue
.next
);
1005 list_del_init(&packet
->driver_list
);
1007 pci_unmap_single(lynx
->dev
, lynx
->iso_send
.header_dma
,
1008 packet
->header_size
, PCI_DMA_TODEVICE
);
1009 if (packet
->data_size
) {
1010 pci_unmap_single(lynx
->dev
, lynx
->iso_send
.data_dma
,
1011 packet
->data_size
, PCI_DMA_TODEVICE
);
1014 if (!list_empty(&lynx
->iso_send
.queue
)) {
1015 send_next(lynx
, hpsb_iso
);
1018 spin_unlock(&lynx
->iso_send
.queue_lock
);
1020 if (pcl
.pcl_status
& DMA_CHAN_STAT_PKTCMPL
) {
1021 if (pcl
.pcl_status
& DMA_CHAN_STAT_SPECIALACK
) {
1022 ack
= (pcl
.pcl_status
>> 15) & 0xf;
1023 PRINTD(KERN_INFO
, lynx
->id
, "special ack %d", ack
);
1024 ack
= (ack
== 1 ? ACKX_TIMEOUT
: ACKX_SEND_ERROR
);
1026 ack
= (pcl
.pcl_status
>> 15) & 0xf;
1029 PRINT(KERN_INFO
, lynx
->id
, "iso send packet was not completed");
1030 ack
= ACKX_SEND_ERROR
;
1033 hpsb_packet_sent(host
, packet
, ack
); //FIXME: maybe we should just use ACK_COMPLETE and ACKX_SEND_ERROR
1037 if (intmask
& PCI_INT_DMA_HLT(CHANNEL_ASYNC_RCV
)) {
1038 /* general receive DMA completed */
1039 int stat
= reg_read(lynx
, DMA_CHAN_STAT(CHANNEL_ASYNC_RCV
));
1041 PRINTD(KERN_DEBUG
, lynx
->id
, "received packet size %d",
1044 if (stat
& DMA_CHAN_STAT_SELFID
) {
1045 lynx
->selfid_size
= stat
& 0x1fff;
1046 handle_selfid(lynx
, host
);
1048 quadlet_t
*q_data
= lynx
->rcv_page
;
1049 if ((*q_data
>> 4 & 0xf) == TCODE_READQ_RESPONSE
1050 || (*q_data
>> 4 & 0xf) == TCODE_WRITEQ
) {
1051 cpu_to_be32s(q_data
+ 3);
1053 hpsb_packet_received(host
, q_data
, stat
& 0x1fff, 0);
1056 run_pcl(lynx
, lynx
->rcv_pcl_start
, CHANNEL_ASYNC_RCV
);
1063 static void iso_rcv_bh(struct ti_lynx
*lynx
)
1067 unsigned long flags
;
1069 spin_lock_irqsave(&lynx
->iso_rcv
.lock
, flags
);
1071 while (lynx
->iso_rcv
.used
) {
1072 idx
= lynx
->iso_rcv
.last
;
1073 spin_unlock_irqrestore(&lynx
->iso_rcv
.lock
, flags
);
1075 data
= lynx
->iso_rcv
.page
[idx
/ ISORCV_PER_PAGE
]
1076 + (idx
% ISORCV_PER_PAGE
) * MAX_ISORCV_SIZE
;
1078 if ((*data
>> 16) + 4 != (lynx
->iso_rcv
.stat
[idx
] & 0x1fff)) {
1079 PRINT(KERN_ERR
, lynx
->id
,
1080 "iso length mismatch 0x%08x/0x%08x", *data
,
1081 lynx
->iso_rcv
.stat
[idx
]);
1084 if (lynx
->iso_rcv
.stat
[idx
]
1085 & (DMA_CHAN_STAT_PCIERR
| DMA_CHAN_STAT_PKTERR
)) {
1086 PRINT(KERN_INFO
, lynx
->id
,
1087 "iso receive error on %d to 0x%p", idx
, data
);
1089 hpsb_packet_received(lynx
->host
, data
,
1090 lynx
->iso_rcv
.stat
[idx
] & 0x1fff,
1094 spin_lock_irqsave(&lynx
->iso_rcv
.lock
, flags
);
1095 lynx
->iso_rcv
.last
= (idx
+ 1) % NUM_ISORCV_PCL
;
1096 lynx
->iso_rcv
.used
--;
1099 if (lynx
->iso_rcv
.chan_count
) {
1100 reg_write(lynx
, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV
),
1101 DMA_WORD1_CMP_ENABLE_MASTER
);
1103 spin_unlock_irqrestore(&lynx
->iso_rcv
.lock
, flags
);
1107 static void remove_card(struct pci_dev
*dev
)
1109 struct ti_lynx
*lynx
;
1110 struct device
*lynx_dev
;
1113 lynx
= pci_get_drvdata(dev
);
1115 pci_set_drvdata(dev
, NULL
);
1117 lynx_dev
= get_device(&lynx
->host
->device
);
1119 switch (lynx
->state
) {
1121 reg_write(lynx
, PCI_INT_ENABLE
, 0);
1122 hpsb_remove_host(lynx
->host
);
1124 reg_write(lynx
, PCI_INT_ENABLE
, 0);
1125 free_irq(lynx
->dev
->irq
, lynx
);
1127 /* Disable IRM Contender and LCtrl */
1128 if (lynx
->phyic
.reg_1394a
)
1129 set_phy_reg(lynx
, 4, ~0xc0 & get_phy_reg(lynx
, 4));
1131 /* Let all other nodes know to ignore us */
1132 lynx_devctl(lynx
->host
, RESET_BUS
, LONG_RESET_NO_FORCE_ROOT
);
1134 case have_iomappings
:
1135 reg_set_bits(lynx
, MISC_CONTROL
, MISC_CONTROL_SWRESET
);
1136 /* Fix buggy cards with autoboot pin not tied low: */
1137 reg_write(lynx
, DMA0_CHAN_CTRL
, 0);
1138 iounmap(lynx
->registers
);
1139 iounmap(lynx
->local_rom
);
1140 iounmap(lynx
->local_ram
);
1141 iounmap(lynx
->aux_port
);
1142 case have_1394_buffers
:
1143 for (i
= 0; i
< ISORCV_PAGES
; i
++) {
1144 if (lynx
->iso_rcv
.page
[i
]) {
1145 pci_free_consistent(lynx
->dev
, PAGE_SIZE
,
1146 lynx
->iso_rcv
.page
[i
],
1147 lynx
->iso_rcv
.page_dma
[i
]);
1150 pci_free_consistent(lynx
->dev
, PAGE_SIZE
, lynx
->rcv_page
,
1151 lynx
->rcv_page_dma
);
1154 pci_free_consistent(lynx
->dev
, LOCALRAM_SIZE
, lynx
->pcl_mem
,
1157 /* do nothing - already freed */
1161 tasklet_kill(&lynx
->iso_rcv
.tq
);
1164 put_device(lynx_dev
);
1168 static int __devinit
add_card(struct pci_dev
*dev
,
1169 const struct pci_device_id
*devid_is_unused
)
1171 #define FAIL(fmt, args...) do { \
1172 PRINT_G(KERN_ERR, fmt , ## args); \
1178 struct hpsb_host
*host
;
1179 struct ti_lynx
*lynx
; /* shortcut to currently handled device */
1187 if (pci_set_dma_mask(dev
, DMA_32BIT_MASK
))
1188 FAIL("DMA address limits not supported for PCILynx hardware");
1189 if (pci_enable_device(dev
))
1190 FAIL("failed to enable PCILynx hardware");
1191 pci_set_master(dev
);
1195 host
= hpsb_alloc_host(&lynx_driver
, sizeof(struct ti_lynx
), &dev
->dev
);
1196 if (!host
) FAIL("failed to allocate control structure memory");
1198 lynx
= host
->hostdata
;
1199 lynx
->id
= card_id
++;
1201 lynx
->state
= clear
;
1204 pci_set_drvdata(dev
, lynx
);
1206 spin_lock_init(&lynx
->lock
);
1207 spin_lock_init(&lynx
->phy_reg_lock
);
1209 lynx
->pcl_mem
= pci_alloc_consistent(dev
, LOCALRAM_SIZE
,
1210 &lynx
->pcl_mem_dma
);
1212 if (lynx
->pcl_mem
!= NULL
) {
1213 lynx
->state
= have_pcl_mem
;
1214 PRINT(KERN_INFO
, lynx
->id
,
1215 "allocated PCL memory %d Bytes @ 0x%p", LOCALRAM_SIZE
,
1218 FAIL("failed to allocate PCL memory area");
1221 lynx
->rcv_page
= pci_alloc_consistent(dev
, PAGE_SIZE
,
1222 &lynx
->rcv_page_dma
);
1223 if (lynx
->rcv_page
== NULL
) {
1224 FAIL("failed to allocate receive buffer");
1226 lynx
->state
= have_1394_buffers
;
1228 for (i
= 0; i
< ISORCV_PAGES
; i
++) {
1229 lynx
->iso_rcv
.page
[i
] =
1230 pci_alloc_consistent(dev
, PAGE_SIZE
,
1231 &lynx
->iso_rcv
.page_dma
[i
]);
1232 if (lynx
->iso_rcv
.page
[i
] == NULL
) {
1233 FAIL("failed to allocate iso receive buffers");
1237 lynx
->registers
= ioremap_nocache(pci_resource_start(dev
,0),
1238 PCILYNX_MAX_REGISTER
);
1239 lynx
->local_ram
= ioremap(pci_resource_start(dev
,1), PCILYNX_MAX_MEMORY
);
1240 lynx
->aux_port
= ioremap(pci_resource_start(dev
,2), PCILYNX_MAX_MEMORY
);
1241 lynx
->local_rom
= ioremap(pci_resource_start(dev
,PCI_ROM_RESOURCE
),
1242 PCILYNX_MAX_MEMORY
);
1243 lynx
->state
= have_iomappings
;
1245 if (lynx
->registers
== NULL
) {
1246 FAIL("failed to remap registers - card not accessible");
1249 reg_set_bits(lynx
, MISC_CONTROL
, MISC_CONTROL_SWRESET
);
1250 /* Fix buggy cards with autoboot pin not tied low: */
1251 reg_write(lynx
, DMA0_CHAN_CTRL
, 0);
1253 sprintf (irq_buf
, "%d", dev
->irq
);
1255 if (!request_irq(dev
->irq
, lynx_irq_handler
, IRQF_SHARED
,
1256 PCILYNX_DRIVER_NAME
, lynx
)) {
1257 PRINT(KERN_INFO
, lynx
->id
, "allocated interrupt %s", irq_buf
);
1258 lynx
->state
= have_intr
;
1260 FAIL("failed to allocate shared interrupt %s", irq_buf
);
1263 /* alloc_pcl return values are not checked, it is expected that the
1264 * provided PCL space is sufficient for the initial allocations */
1265 lynx
->rcv_pcl
= alloc_pcl(lynx
);
1266 lynx
->rcv_pcl_start
= alloc_pcl(lynx
);
1267 lynx
->async
.pcl
= alloc_pcl(lynx
);
1268 lynx
->async
.pcl_start
= alloc_pcl(lynx
);
1269 lynx
->iso_send
.pcl
= alloc_pcl(lynx
);
1270 lynx
->iso_send
.pcl_start
= alloc_pcl(lynx
);
1272 for (i
= 0; i
< NUM_ISORCV_PCL
; i
++) {
1273 lynx
->iso_rcv
.pcl
[i
] = alloc_pcl(lynx
);
1275 lynx
->iso_rcv
.pcl_start
= alloc_pcl(lynx
);
1277 /* all allocations successful - simple init stuff follows */
1279 reg_write(lynx
, PCI_INT_ENABLE
, PCI_INT_DMA_ALL
);
1281 tasklet_init(&lynx
->iso_rcv
.tq
, (void (*)(unsigned long))iso_rcv_bh
,
1282 (unsigned long)lynx
);
1284 spin_lock_init(&lynx
->iso_rcv
.lock
);
1286 spin_lock_init(&lynx
->async
.queue_lock
);
1287 lynx
->async
.channel
= CHANNEL_ASYNC_SEND
;
1288 spin_lock_init(&lynx
->iso_send
.queue_lock
);
1289 lynx
->iso_send
.channel
= CHANNEL_ISO_SEND
;
1291 PRINT(KERN_INFO
, lynx
->id
, "remapped memory spaces reg 0x%p, rom 0x%p, "
1292 "ram 0x%p, aux 0x%p", lynx
->registers
, lynx
->local_rom
,
1293 lynx
->local_ram
, lynx
->aux_port
);
1295 /* now, looking for PHY register set */
1296 if ((get_phy_reg(lynx
, 2) & 0xe0) == 0xe0) {
1297 lynx
->phyic
.reg_1394a
= 1;
1298 PRINT(KERN_INFO
, lynx
->id
,
1299 "found 1394a conform PHY (using extended register set)");
1300 lynx
->phyic
.vendor
= get_phy_vendorid(lynx
);
1301 lynx
->phyic
.product
= get_phy_productid(lynx
);
1303 lynx
->phyic
.reg_1394a
= 0;
1304 PRINT(KERN_INFO
, lynx
->id
, "found old 1394 PHY");
1307 lynx
->selfid_size
= -1;
1308 lynx
->phy_reg0
= -1;
1310 INIT_LIST_HEAD(&lynx
->async
.queue
);
1311 INIT_LIST_HEAD(&lynx
->async
.pcl_queue
);
1312 INIT_LIST_HEAD(&lynx
->iso_send
.queue
);
1313 INIT_LIST_HEAD(&lynx
->iso_send
.pcl_queue
);
1315 pcl
.next
= pcl_bus(lynx
, lynx
->rcv_pcl
);
1316 put_pcl(lynx
, lynx
->rcv_pcl_start
, &pcl
);
1318 pcl
.next
= PCL_NEXT_INVALID
;
1319 pcl
.async_error_next
= PCL_NEXT_INVALID
;
1321 pcl
.buffer
[0].control
= PCL_CMD_RCV
| 16;
1322 #ifndef __BIG_ENDIAN
1323 pcl
.buffer
[0].control
|= PCL_BIGENDIAN
;
1325 pcl
.buffer
[1].control
= PCL_LAST_BUFF
| 4080;
1327 pcl
.buffer
[0].pointer
= lynx
->rcv_page_dma
;
1328 pcl
.buffer
[1].pointer
= lynx
->rcv_page_dma
+ 16;
1329 put_pcl(lynx
, lynx
->rcv_pcl
, &pcl
);
1331 pcl
.next
= pcl_bus(lynx
, lynx
->async
.pcl
);
1332 pcl
.async_error_next
= pcl_bus(lynx
, lynx
->async
.pcl
);
1333 put_pcl(lynx
, lynx
->async
.pcl_start
, &pcl
);
1335 pcl
.next
= pcl_bus(lynx
, lynx
->iso_send
.pcl
);
1336 pcl
.async_error_next
= PCL_NEXT_INVALID
;
1337 put_pcl(lynx
, lynx
->iso_send
.pcl_start
, &pcl
);
1339 pcl
.next
= PCL_NEXT_INVALID
;
1340 pcl
.async_error_next
= PCL_NEXT_INVALID
;
1341 pcl
.buffer
[0].control
= PCL_CMD_RCV
| 4;
1342 #ifndef __BIG_ENDIAN
1343 pcl
.buffer
[0].control
|= PCL_BIGENDIAN
;
1345 pcl
.buffer
[1].control
= PCL_LAST_BUFF
| 2044;
1347 for (i
= 0; i
< NUM_ISORCV_PCL
; i
++) {
1348 int page
= i
/ ISORCV_PER_PAGE
;
1349 int sec
= i
% ISORCV_PER_PAGE
;
1351 pcl
.buffer
[0].pointer
= lynx
->iso_rcv
.page_dma
[page
]
1352 + sec
* MAX_ISORCV_SIZE
;
1353 pcl
.buffer
[1].pointer
= pcl
.buffer
[0].pointer
+ 4;
1354 put_pcl(lynx
, lynx
->iso_rcv
.pcl
[i
], &pcl
);
1358 for (i
= 0; i
< NUM_ISORCV_PCL
; i
++) {
1359 pcli
[i
] = pcl_bus(lynx
, lynx
->iso_rcv
.pcl
[i
]);
1361 put_pcl(lynx
, lynx
->iso_rcv
.pcl_start
, &pcl
);
1363 /* FIFO sizes from left to right: ITF=48 ATF=48 GRF=160 */
1364 reg_write(lynx
, FIFO_SIZES
, 0x003030a0);
1365 /* 20 byte threshold before triggering PCI transfer */
1366 reg_write(lynx
, DMA_GLOBAL_REGISTER
, 0x2<<24);
1367 /* threshold on both send FIFOs before transmitting:
1368 FIFO size - cache line size - 1 */
1369 i
= reg_read(lynx
, PCI_LATENCY_CACHELINE
) & 0xff;
1371 reg_write(lynx
, FIFO_XMIT_THRESHOLD
, (i
<< 8) | i
);
1373 reg_set_bits(lynx
, PCI_INT_ENABLE
, PCI_INT_1394
);
1375 reg_write(lynx
, LINK_INT_ENABLE
, LINK_INT_PHY_TIMEOUT
1376 | LINK_INT_PHY_REG_RCVD
| LINK_INT_PHY_BUSRESET
1377 | LINK_INT_ISO_STUCK
| LINK_INT_ASYNC_STUCK
1378 | LINK_INT_SENT_REJECT
| LINK_INT_TX_INVALID_TC
1379 | LINK_INT_GRF_OVERFLOW
| LINK_INT_ITF_UNDERFLOW
1380 | LINK_INT_ATF_UNDERFLOW
);
1382 reg_write(lynx
, DMA_WORD0_CMP_VALUE(CHANNEL_ASYNC_RCV
), 0);
1383 reg_write(lynx
, DMA_WORD0_CMP_ENABLE(CHANNEL_ASYNC_RCV
), 0xa<<4);
1384 reg_write(lynx
, DMA_WORD1_CMP_VALUE(CHANNEL_ASYNC_RCV
), 0);
1385 reg_write(lynx
, DMA_WORD1_CMP_ENABLE(CHANNEL_ASYNC_RCV
),
1386 DMA_WORD1_CMP_MATCH_LOCAL_NODE
| DMA_WORD1_CMP_MATCH_BROADCAST
1387 | DMA_WORD1_CMP_MATCH_EXACT
| DMA_WORD1_CMP_MATCH_BUS_BCAST
1388 | DMA_WORD1_CMP_ENABLE_SELF_ID
| DMA_WORD1_CMP_ENABLE_MASTER
);
1390 run_pcl(lynx
, lynx
->rcv_pcl_start
, CHANNEL_ASYNC_RCV
);
1392 reg_write(lynx
, DMA_WORD0_CMP_VALUE(CHANNEL_ISO_RCV
), 0);
1393 reg_write(lynx
, DMA_WORD0_CMP_ENABLE(CHANNEL_ISO_RCV
), 0x9<<4);
1394 reg_write(lynx
, DMA_WORD1_CMP_VALUE(CHANNEL_ISO_RCV
), 0);
1395 reg_write(lynx
, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV
), 0);
1397 run_sub_pcl(lynx
, lynx
->iso_rcv
.pcl_start
, 0, CHANNEL_ISO_RCV
);
1399 reg_write(lynx
, LINK_CONTROL
, LINK_CONTROL_RCV_CMP_VALID
1400 | LINK_CONTROL_TX_ISO_EN
| LINK_CONTROL_RX_ISO_EN
1401 | LINK_CONTROL_TX_ASYNC_EN
| LINK_CONTROL_RX_ASYNC_EN
1402 | LINK_CONTROL_RESET_TX
| LINK_CONTROL_RESET_RX
);
1404 if (!lynx
->phyic
.reg_1394a
) {
1405 if (!hpsb_disable_irm
) {
1406 /* attempt to enable contender bit -FIXME- would this
1407 * work elsewhere? */
1408 reg_set_bits(lynx
, GPIO_CTRL_A
, 0x1);
1409 reg_write(lynx
, GPIO_DATA_BASE
+ 0x3c, 0x1);
1412 /* set the contender (if appropriate) and LCtrl bit in the
1413 * extended PHY register set. (Should check that PHY_02_EXTENDED
1414 * is set in register 2?)
1416 i
= get_phy_reg(lynx
, 4);
1418 if (hpsb_disable_irm
)
1419 i
&= ~PHY_04_CONTENDER
;
1421 i
|= PHY_04_CONTENDER
;
1422 if (i
!= -1) set_phy_reg(lynx
, 4, i
);
1427 /* needed for i2c communication with serial eeprom */
1428 struct i2c_adapter
*i2c_ad
;
1429 struct i2c_algo_bit_data i2c_adapter_data
;
1432 i2c_ad
= kmalloc(sizeof(*i2c_ad
), SLAB_KERNEL
);
1433 if (!i2c_ad
) FAIL("failed to allocate I2C adapter memory");
1435 memcpy(i2c_ad
, &bit_ops
, sizeof(struct i2c_adapter
));
1436 i2c_adapter_data
= bit_data
;
1437 i2c_ad
->algo_data
= &i2c_adapter_data
;
1438 i2c_adapter_data
.data
= lynx
;
1440 PRINTD(KERN_DEBUG
, lynx
->id
,"original eeprom control: %d",
1441 reg_read(lynx
, SERIAL_EEPROM_CONTROL
));
1443 /* reset hardware to sane state */
1444 lynx
->i2c_driven_state
= 0x00000070;
1445 reg_write(lynx
, SERIAL_EEPROM_CONTROL
, lynx
->i2c_driven_state
);
1447 if (i2c_bit_add_bus(i2c_ad
) < 0)
1451 FAIL("unable to register i2c");
1456 unsigned char i2c_cmd
= 0x10;
1457 struct i2c_msg msg
[2] = { { 0x50, 0, 1, &i2c_cmd
},
1458 { 0x50, I2C_M_RD
, 20, (unsigned char*) lynx
->bus_info_block
}
1461 /* we use i2c_transfer, because i2c_smbus_read_block_data does not work properly and we
1462 do it more efficiently in one transaction rather then using several reads */
1463 if (i2c_transfer(i2c_ad
, msg
, 2) < 0) {
1464 PRINT(KERN_ERR
, lynx
->id
, "unable to read bus info block from i2c");
1468 PRINT(KERN_INFO
, lynx
->id
, "got bus info block from serial eeprom");
1469 /* FIXME: probably we shoud rewrite the max_rec, max_ROM(1394a),
1470 * generation(1394a) and link_spd(1394a) field and recalculate
1473 for (i
= 0; i
< 5 ; i
++)
1474 PRINTD(KERN_DEBUG
, lynx
->id
, "Businfo block quadlet %i: %08x",
1475 i
, be32_to_cpu(lynx
->bus_info_block
[i
]));
1477 /* info_length, crc_length and 1394 magic number to check, if it is really a bus info block */
1478 if (((be32_to_cpu(lynx
->bus_info_block
[0]) & 0xffff0000) == 0x04040000) &&
1479 (lynx
->bus_info_block
[1] == __constant_cpu_to_be32(0x31333934)))
1481 PRINT(KERN_DEBUG
, lynx
->id
, "read a valid bus info block from");
1485 FAIL("read something from serial eeprom, but it does not seem to be a valid bus info block");
1490 i2c_bit_del_bus(i2c_ad
);
1495 host
->csr
.guid_hi
= be32_to_cpu(lynx
->bus_info_block
[3]);
1496 host
->csr
.guid_lo
= be32_to_cpu(lynx
->bus_info_block
[4]);
1497 host
->csr
.cyc_clk_acc
= (be32_to_cpu(lynx
->bus_info_block
[2]) >> 16) & 0xff;
1498 host
->csr
.max_rec
= (be32_to_cpu(lynx
->bus_info_block
[2]) >> 12) & 0xf;
1499 if (!lynx
->phyic
.reg_1394a
)
1500 host
->csr
.lnk_spd
= (get_phy_reg(lynx
, 2) & 0xc0) >> 6;
1502 host
->csr
.lnk_spd
= be32_to_cpu(lynx
->bus_info_block
[2]) & 0x7;
1504 if (hpsb_add_host(host
)) {
1506 FAIL("Failed to register host with highlevel");
1509 lynx
->state
= is_host
;
1516 static struct pci_device_id pci_table
[] = {
1518 .vendor
= PCI_VENDOR_ID_TI
,
1519 .device
= PCI_DEVICE_ID_TI_PCILYNX
,
1520 .subvendor
= PCI_ANY_ID
,
1521 .subdevice
= PCI_ANY_ID
,
1523 { } /* Terminating entry */
1526 static struct pci_driver lynx_pci_driver
= {
1527 .name
= PCILYNX_DRIVER_NAME
,
1528 .id_table
= pci_table
,
1530 .remove
= remove_card
,
1533 static struct hpsb_host_driver lynx_driver
= {
1534 .owner
= THIS_MODULE
,
1535 .name
= PCILYNX_DRIVER_NAME
,
1536 .set_hw_config_rom
= NULL
,
1537 .transmit_packet
= lynx_transmit
,
1538 .devctl
= lynx_devctl
,
1542 MODULE_AUTHOR("Andreas E. Bombe <andreas.bombe@munich.netsurf.de>");
1543 MODULE_DESCRIPTION("driver for Texas Instruments PCI Lynx IEEE-1394 controller");
1544 MODULE_LICENSE("GPL");
1545 MODULE_SUPPORTED_DEVICE("pcilynx");
1546 MODULE_DEVICE_TABLE(pci
, pci_table
);
1548 static int __init
pcilynx_init(void)
1552 ret
= pci_register_driver(&lynx_pci_driver
);
1554 PRINT_G(KERN_ERR
, "PCI module init failed");
1561 static void __exit
pcilynx_cleanup(void)
1563 pci_unregister_driver(&lynx_pci_driver
);
1567 module_init(pcilynx_init
);
1568 module_exit(pcilynx_cleanup
);