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Merge 4.0-rc7 into staging-next
[mirror_ubuntu-artful-kernel.git] / drivers / iio / accel / kxcjk-1013.c
1 /*
2 * KXCJK-1013 3-axis accelerometer driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #include <linux/module.h>
16 #include <linux/i2c.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/bitops.h>
20 #include <linux/slab.h>
21 #include <linux/string.h>
22 #include <linux/acpi.h>
23 #include <linux/gpio/consumer.h>
24 #include <linux/pm.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/iio/iio.h>
27 #include <linux/iio/sysfs.h>
28 #include <linux/iio/buffer.h>
29 #include <linux/iio/trigger.h>
30 #include <linux/iio/events.h>
31 #include <linux/iio/trigger_consumer.h>
32 #include <linux/iio/triggered_buffer.h>
33 #include <linux/iio/accel/kxcjk_1013.h>
34
35 #define KXCJK1013_DRV_NAME "kxcjk1013"
36 #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
37
38 #define KXCJK1013_REG_XOUT_L 0x06
39 /*
40 * From low byte X axis register, all the other addresses of Y and Z can be
41 * obtained by just applying axis offset. The following axis defines are just
42 * provide clarity, but not used.
43 */
44 #define KXCJK1013_REG_XOUT_H 0x07
45 #define KXCJK1013_REG_YOUT_L 0x08
46 #define KXCJK1013_REG_YOUT_H 0x09
47 #define KXCJK1013_REG_ZOUT_L 0x0A
48 #define KXCJK1013_REG_ZOUT_H 0x0B
49
50 #define KXCJK1013_REG_DCST_RESP 0x0C
51 #define KXCJK1013_REG_WHO_AM_I 0x0F
52 #define KXCJK1013_REG_INT_SRC1 0x16
53 #define KXCJK1013_REG_INT_SRC2 0x17
54 #define KXCJK1013_REG_STATUS_REG 0x18
55 #define KXCJK1013_REG_INT_REL 0x1A
56 #define KXCJK1013_REG_CTRL1 0x1B
57 #define KXCJK1013_REG_CTRL2 0x1D
58 #define KXCJK1013_REG_INT_CTRL1 0x1E
59 #define KXCJK1013_REG_INT_CTRL2 0x1F
60 #define KXCJK1013_REG_DATA_CTRL 0x21
61 #define KXCJK1013_REG_WAKE_TIMER 0x29
62 #define KXCJK1013_REG_SELF_TEST 0x3A
63 #define KXCJK1013_REG_WAKE_THRES 0x6A
64
65 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
66 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
67 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
68 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
69 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
70 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
71 #define KXCJK1013_REG_INT_REG1_BIT_IEA BIT(4)
72 #define KXCJK1013_REG_INT_REG1_BIT_IEN BIT(5)
73
74 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
75 #define KXCJK1013_MAX_STARTUP_TIME_US 100000
76
77 #define KXCJK1013_SLEEP_DELAY_MS 2000
78
79 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
80 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
81 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
82 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
83 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
84 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
85
86 #define KXCJK1013_DEFAULT_WAKE_THRES 1
87
88 enum kx_chipset {
89 KXCJK1013,
90 KXCJ91008,
91 KXTJ21009,
92 KX_MAX_CHIPS /* this must be last */
93 };
94
95 struct kxcjk1013_data {
96 struct i2c_client *client;
97 struct iio_trigger *dready_trig;
98 struct iio_trigger *motion_trig;
99 struct mutex mutex;
100 s16 buffer[8];
101 u8 odr_bits;
102 u8 range;
103 int wake_thres;
104 int wake_dur;
105 bool active_high_intr;
106 bool dready_trigger_on;
107 int ev_enable_state;
108 bool motion_trigger_on;
109 int64_t timestamp;
110 enum kx_chipset chipset;
111 bool is_smo8500_device;
112 };
113
114 enum kxcjk1013_axis {
115 AXIS_X,
116 AXIS_Y,
117 AXIS_Z,
118 };
119
120 enum kxcjk1013_mode {
121 STANDBY,
122 OPERATION,
123 };
124
125 enum kxcjk1013_range {
126 KXCJK1013_RANGE_2G,
127 KXCJK1013_RANGE_4G,
128 KXCJK1013_RANGE_8G,
129 };
130
131 static const struct {
132 int val;
133 int val2;
134 int odr_bits;
135 } samp_freq_table[] = { {0, 781000, 0x08}, {1, 563000, 0x09},
136 {3, 125000, 0x0A}, {6, 250000, 0x0B}, {12, 500000, 0},
137 {25, 0, 0x01}, {50, 0, 0x02}, {100, 0, 0x03},
138 {200, 0, 0x04}, {400, 0, 0x05}, {800, 0, 0x06},
139 {1600, 0, 0x07} };
140
141 /* Refer to section 4 of the specification */
142 static const struct {
143 int odr_bits;
144 int usec;
145 } odr_start_up_times[KX_MAX_CHIPS][12] = {
146 /* KXCJK-1013 */
147 {
148 {0x08, 100000},
149 {0x09, 100000},
150 {0x0A, 100000},
151 {0x0B, 100000},
152 {0, 80000},
153 {0x01, 41000},
154 {0x02, 21000},
155 {0x03, 11000},
156 {0x04, 6400},
157 {0x05, 3900},
158 {0x06, 2700},
159 {0x07, 2100},
160 },
161 /* KXCJ9-1008 */
162 {
163 {0x08, 100000},
164 {0x09, 100000},
165 {0x0A, 100000},
166 {0x0B, 100000},
167 {0, 80000},
168 {0x01, 41000},
169 {0x02, 21000},
170 {0x03, 11000},
171 {0x04, 6400},
172 {0x05, 3900},
173 {0x06, 2700},
174 {0x07, 2100},
175 },
176 /* KXCTJ2-1009 */
177 {
178 {0x08, 1240000},
179 {0x09, 621000},
180 {0x0A, 309000},
181 {0x0B, 151000},
182 {0, 80000},
183 {0x01, 41000},
184 {0x02, 21000},
185 {0x03, 11000},
186 {0x04, 6000},
187 {0x05, 4000},
188 {0x06, 3000},
189 {0x07, 2000},
190 },
191 };
192
193 static const struct {
194 u16 scale;
195 u8 gsel_0;
196 u8 gsel_1;
197 } KXCJK1013_scale_table[] = { {9582, 0, 0},
198 {19163, 1, 0},
199 {38326, 0, 1} };
200
201 static const struct {
202 int val;
203 int val2;
204 int odr_bits;
205 } wake_odr_data_rate_table[] = { {0, 781000, 0x00},
206 {1, 563000, 0x01},
207 {3, 125000, 0x02},
208 {6, 250000, 0x03},
209 {12, 500000, 0x04},
210 {25, 0, 0x05},
211 {50, 0, 0x06},
212 {100, 0, 0x06},
213 {200, 0, 0x06},
214 {400, 0, 0x06},
215 {800, 0, 0x06},
216 {1600, 0, 0x06} };
217
218 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
219 enum kxcjk1013_mode mode)
220 {
221 int ret;
222
223 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
224 if (ret < 0) {
225 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
226 return ret;
227 }
228
229 if (mode == STANDBY)
230 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
231 else
232 ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
233
234 ret = i2c_smbus_write_byte_data(data->client,
235 KXCJK1013_REG_CTRL1, ret);
236 if (ret < 0) {
237 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
238 return ret;
239 }
240
241 return 0;
242 }
243
244 static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
245 enum kxcjk1013_mode *mode)
246 {
247 int ret;
248
249 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
250 if (ret < 0) {
251 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
252 return ret;
253 }
254
255 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
256 *mode = OPERATION;
257 else
258 *mode = STANDBY;
259
260 return 0;
261 }
262
263 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
264 {
265 int ret;
266
267 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
268 if (ret < 0) {
269 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
270 return ret;
271 }
272
273 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
274 KXCJK1013_REG_CTRL1_BIT_GSEL1);
275 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
276 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
277
278 ret = i2c_smbus_write_byte_data(data->client,
279 KXCJK1013_REG_CTRL1,
280 ret);
281 if (ret < 0) {
282 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
283 return ret;
284 }
285
286 data->range = range_index;
287
288 return 0;
289 }
290
291 static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
292 {
293 int ret;
294
295 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
296 if (ret < 0) {
297 dev_err(&data->client->dev, "Error reading who_am_i\n");
298 return ret;
299 }
300
301 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
302
303 ret = kxcjk1013_set_mode(data, STANDBY);
304 if (ret < 0)
305 return ret;
306
307 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
308 if (ret < 0) {
309 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
310 return ret;
311 }
312
313 /* Set 12 bit mode */
314 ret |= KXCJK1013_REG_CTRL1_BIT_RES;
315
316 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1,
317 ret);
318 if (ret < 0) {
319 dev_err(&data->client->dev, "Error reading reg_ctrl\n");
320 return ret;
321 }
322
323 /* Setting range to 4G */
324 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
325 if (ret < 0)
326 return ret;
327
328 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
329 if (ret < 0) {
330 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
331 return ret;
332 }
333
334 data->odr_bits = ret;
335
336 /* Set up INT polarity */
337 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
338 if (ret < 0) {
339 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
340 return ret;
341 }
342
343 if (data->active_high_intr)
344 ret |= KXCJK1013_REG_INT_REG1_BIT_IEA;
345 else
346 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEA;
347
348 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
349 ret);
350 if (ret < 0) {
351 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
352 return ret;
353 }
354
355 ret = kxcjk1013_set_mode(data, OPERATION);
356 if (ret < 0)
357 return ret;
358
359 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
360
361 return 0;
362 }
363
364 #ifdef CONFIG_PM
365 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
366 {
367 int i;
368 int idx = data->chipset;
369
370 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
371 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
372 return odr_start_up_times[idx][i].usec;
373 }
374
375 return KXCJK1013_MAX_STARTUP_TIME_US;
376 }
377 #endif
378
379 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
380 {
381 #ifdef CONFIG_PM
382 int ret;
383
384 if (on)
385 ret = pm_runtime_get_sync(&data->client->dev);
386 else {
387 pm_runtime_mark_last_busy(&data->client->dev);
388 ret = pm_runtime_put_autosuspend(&data->client->dev);
389 }
390 if (ret < 0) {
391 dev_err(&data->client->dev,
392 "Failed: kxcjk1013_set_power_state for %d\n", on);
393 if (on)
394 pm_runtime_put_noidle(&data->client->dev);
395 return ret;
396 }
397 #endif
398
399 return 0;
400 }
401
402 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
403 {
404 int ret;
405
406 ret = i2c_smbus_write_byte_data(data->client,
407 KXCJK1013_REG_WAKE_TIMER,
408 data->wake_dur);
409 if (ret < 0) {
410 dev_err(&data->client->dev,
411 "Error writing reg_wake_timer\n");
412 return ret;
413 }
414
415 ret = i2c_smbus_write_byte_data(data->client,
416 KXCJK1013_REG_WAKE_THRES,
417 data->wake_thres);
418 if (ret < 0) {
419 dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
420 return ret;
421 }
422
423 return 0;
424 }
425
426 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
427 bool status)
428 {
429 int ret;
430 enum kxcjk1013_mode store_mode;
431
432 ret = kxcjk1013_get_mode(data, &store_mode);
433 if (ret < 0)
434 return ret;
435
436 /* This is requirement by spec to change state to STANDBY */
437 ret = kxcjk1013_set_mode(data, STANDBY);
438 if (ret < 0)
439 return ret;
440
441 ret = kxcjk1013_chip_update_thresholds(data);
442 if (ret < 0)
443 return ret;
444
445 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
446 if (ret < 0) {
447 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
448 return ret;
449 }
450
451 if (status)
452 ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
453 else
454 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
455
456 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
457 ret);
458 if (ret < 0) {
459 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
460 return ret;
461 }
462
463 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
464 if (ret < 0) {
465 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
466 return ret;
467 }
468
469 if (status)
470 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
471 else
472 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
473
474 ret = i2c_smbus_write_byte_data(data->client,
475 KXCJK1013_REG_CTRL1, ret);
476 if (ret < 0) {
477 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
478 return ret;
479 }
480
481 if (store_mode == OPERATION) {
482 ret = kxcjk1013_set_mode(data, OPERATION);
483 if (ret < 0)
484 return ret;
485 }
486
487 return 0;
488 }
489
490 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
491 bool status)
492 {
493 int ret;
494 enum kxcjk1013_mode store_mode;
495
496 ret = kxcjk1013_get_mode(data, &store_mode);
497 if (ret < 0)
498 return ret;
499
500 /* This is requirement by spec to change state to STANDBY */
501 ret = kxcjk1013_set_mode(data, STANDBY);
502 if (ret < 0)
503 return ret;
504
505 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
506 if (ret < 0) {
507 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
508 return ret;
509 }
510
511 if (status)
512 ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
513 else
514 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
515
516 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
517 ret);
518 if (ret < 0) {
519 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
520 return ret;
521 }
522
523 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
524 if (ret < 0) {
525 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
526 return ret;
527 }
528
529 if (status)
530 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
531 else
532 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
533
534 ret = i2c_smbus_write_byte_data(data->client,
535 KXCJK1013_REG_CTRL1, ret);
536 if (ret < 0) {
537 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
538 return ret;
539 }
540
541 if (store_mode == OPERATION) {
542 ret = kxcjk1013_set_mode(data, OPERATION);
543 if (ret < 0)
544 return ret;
545 }
546
547 return 0;
548 }
549
550 static int kxcjk1013_convert_freq_to_bit(int val, int val2)
551 {
552 int i;
553
554 for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
555 if (samp_freq_table[i].val == val &&
556 samp_freq_table[i].val2 == val2) {
557 return samp_freq_table[i].odr_bits;
558 }
559 }
560
561 return -EINVAL;
562 }
563
564 static int kxcjk1013_convert_wake_odr_to_bit(int val, int val2)
565 {
566 int i;
567
568 for (i = 0; i < ARRAY_SIZE(wake_odr_data_rate_table); ++i) {
569 if (wake_odr_data_rate_table[i].val == val &&
570 wake_odr_data_rate_table[i].val2 == val2) {
571 return wake_odr_data_rate_table[i].odr_bits;
572 }
573 }
574
575 return -EINVAL;
576 }
577
578 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
579 {
580 int ret;
581 int odr_bits;
582 enum kxcjk1013_mode store_mode;
583
584 ret = kxcjk1013_get_mode(data, &store_mode);
585 if (ret < 0)
586 return ret;
587
588 odr_bits = kxcjk1013_convert_freq_to_bit(val, val2);
589 if (odr_bits < 0)
590 return odr_bits;
591
592 /* To change ODR, the chip must be set to STANDBY as per spec */
593 ret = kxcjk1013_set_mode(data, STANDBY);
594 if (ret < 0)
595 return ret;
596
597 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL,
598 odr_bits);
599 if (ret < 0) {
600 dev_err(&data->client->dev, "Error writing data_ctrl\n");
601 return ret;
602 }
603
604 data->odr_bits = odr_bits;
605
606 odr_bits = kxcjk1013_convert_wake_odr_to_bit(val, val2);
607 if (odr_bits < 0)
608 return odr_bits;
609
610 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2,
611 odr_bits);
612 if (ret < 0) {
613 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
614 return ret;
615 }
616
617 if (store_mode == OPERATION) {
618 ret = kxcjk1013_set_mode(data, OPERATION);
619 if (ret < 0)
620 return ret;
621 }
622
623 return 0;
624 }
625
626 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
627 {
628 int i;
629
630 for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
631 if (samp_freq_table[i].odr_bits == data->odr_bits) {
632 *val = samp_freq_table[i].val;
633 *val2 = samp_freq_table[i].val2;
634 return IIO_VAL_INT_PLUS_MICRO;
635 }
636 }
637
638 return -EINVAL;
639 }
640
641 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
642 {
643 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
644 int ret;
645
646 ret = i2c_smbus_read_word_data(data->client, reg);
647 if (ret < 0) {
648 dev_err(&data->client->dev,
649 "failed to read accel_%c registers\n", 'x' + axis);
650 return ret;
651 }
652
653 return ret;
654 }
655
656 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
657 {
658 int ret, i;
659 enum kxcjk1013_mode store_mode;
660
661
662 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
663 if (KXCJK1013_scale_table[i].scale == val) {
664
665 ret = kxcjk1013_get_mode(data, &store_mode);
666 if (ret < 0)
667 return ret;
668
669 ret = kxcjk1013_set_mode(data, STANDBY);
670 if (ret < 0)
671 return ret;
672
673 ret = kxcjk1013_set_range(data, i);
674 if (ret < 0)
675 return ret;
676
677 if (store_mode == OPERATION) {
678 ret = kxcjk1013_set_mode(data, OPERATION);
679 if (ret)
680 return ret;
681 }
682
683 return 0;
684 }
685 }
686
687 return -EINVAL;
688 }
689
690 static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
691 struct iio_chan_spec const *chan, int *val,
692 int *val2, long mask)
693 {
694 struct kxcjk1013_data *data = iio_priv(indio_dev);
695 int ret;
696
697 switch (mask) {
698 case IIO_CHAN_INFO_RAW:
699 mutex_lock(&data->mutex);
700 if (iio_buffer_enabled(indio_dev))
701 ret = -EBUSY;
702 else {
703 ret = kxcjk1013_set_power_state(data, true);
704 if (ret < 0) {
705 mutex_unlock(&data->mutex);
706 return ret;
707 }
708 ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
709 if (ret < 0) {
710 kxcjk1013_set_power_state(data, false);
711 mutex_unlock(&data->mutex);
712 return ret;
713 }
714 *val = sign_extend32(ret >> 4, 11);
715 ret = kxcjk1013_set_power_state(data, false);
716 }
717 mutex_unlock(&data->mutex);
718
719 if (ret < 0)
720 return ret;
721
722 return IIO_VAL_INT;
723
724 case IIO_CHAN_INFO_SCALE:
725 *val = 0;
726 *val2 = KXCJK1013_scale_table[data->range].scale;
727 return IIO_VAL_INT_PLUS_MICRO;
728
729 case IIO_CHAN_INFO_SAMP_FREQ:
730 mutex_lock(&data->mutex);
731 ret = kxcjk1013_get_odr(data, val, val2);
732 mutex_unlock(&data->mutex);
733 return ret;
734
735 default:
736 return -EINVAL;
737 }
738 }
739
740 static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
741 struct iio_chan_spec const *chan, int val,
742 int val2, long mask)
743 {
744 struct kxcjk1013_data *data = iio_priv(indio_dev);
745 int ret;
746
747 switch (mask) {
748 case IIO_CHAN_INFO_SAMP_FREQ:
749 mutex_lock(&data->mutex);
750 ret = kxcjk1013_set_odr(data, val, val2);
751 mutex_unlock(&data->mutex);
752 break;
753 case IIO_CHAN_INFO_SCALE:
754 if (val)
755 return -EINVAL;
756
757 mutex_lock(&data->mutex);
758 ret = kxcjk1013_set_scale(data, val2);
759 mutex_unlock(&data->mutex);
760 break;
761 default:
762 ret = -EINVAL;
763 }
764
765 return ret;
766 }
767
768 static int kxcjk1013_read_event(struct iio_dev *indio_dev,
769 const struct iio_chan_spec *chan,
770 enum iio_event_type type,
771 enum iio_event_direction dir,
772 enum iio_event_info info,
773 int *val, int *val2)
774 {
775 struct kxcjk1013_data *data = iio_priv(indio_dev);
776
777 *val2 = 0;
778 switch (info) {
779 case IIO_EV_INFO_VALUE:
780 *val = data->wake_thres;
781 break;
782 case IIO_EV_INFO_PERIOD:
783 *val = data->wake_dur;
784 break;
785 default:
786 return -EINVAL;
787 }
788
789 return IIO_VAL_INT;
790 }
791
792 static int kxcjk1013_write_event(struct iio_dev *indio_dev,
793 const struct iio_chan_spec *chan,
794 enum iio_event_type type,
795 enum iio_event_direction dir,
796 enum iio_event_info info,
797 int val, int val2)
798 {
799 struct kxcjk1013_data *data = iio_priv(indio_dev);
800
801 if (data->ev_enable_state)
802 return -EBUSY;
803
804 switch (info) {
805 case IIO_EV_INFO_VALUE:
806 data->wake_thres = val;
807 break;
808 case IIO_EV_INFO_PERIOD:
809 data->wake_dur = val;
810 break;
811 default:
812 return -EINVAL;
813 }
814
815 return 0;
816 }
817
818 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
819 const struct iio_chan_spec *chan,
820 enum iio_event_type type,
821 enum iio_event_direction dir)
822 {
823
824 struct kxcjk1013_data *data = iio_priv(indio_dev);
825
826 return data->ev_enable_state;
827 }
828
829 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
830 const struct iio_chan_spec *chan,
831 enum iio_event_type type,
832 enum iio_event_direction dir,
833 int state)
834 {
835 struct kxcjk1013_data *data = iio_priv(indio_dev);
836 int ret;
837
838 if (state && data->ev_enable_state)
839 return 0;
840
841 mutex_lock(&data->mutex);
842
843 if (!state && data->motion_trigger_on) {
844 data->ev_enable_state = 0;
845 mutex_unlock(&data->mutex);
846 return 0;
847 }
848
849 /*
850 * We will expect the enable and disable to do operation in
851 * in reverse order. This will happen here anyway as our
852 * resume operation uses sync mode runtime pm calls, the
853 * suspend operation will be delayed by autosuspend delay
854 * So the disable operation will still happen in reverse of
855 * enable operation. When runtime pm is disabled the mode
856 * is always on so sequence doesn't matter
857 */
858 ret = kxcjk1013_set_power_state(data, state);
859 if (ret < 0) {
860 mutex_unlock(&data->mutex);
861 return ret;
862 }
863
864 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
865 if (ret < 0) {
866 kxcjk1013_set_power_state(data, false);
867 data->ev_enable_state = 0;
868 mutex_unlock(&data->mutex);
869 return ret;
870 }
871
872 data->ev_enable_state = state;
873 mutex_unlock(&data->mutex);
874
875 return 0;
876 }
877
878 static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev,
879 struct iio_trigger *trig)
880 {
881 struct kxcjk1013_data *data = iio_priv(indio_dev);
882
883 if (data->dready_trig != trig && data->motion_trig != trig)
884 return -EINVAL;
885
886 return 0;
887 }
888
889 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
890 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600");
891
892 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
893
894 static struct attribute *kxcjk1013_attributes[] = {
895 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
896 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
897 NULL,
898 };
899
900 static const struct attribute_group kxcjk1013_attrs_group = {
901 .attrs = kxcjk1013_attributes,
902 };
903
904 static const struct iio_event_spec kxcjk1013_event = {
905 .type = IIO_EV_TYPE_THRESH,
906 .dir = IIO_EV_DIR_EITHER,
907 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
908 BIT(IIO_EV_INFO_ENABLE) |
909 BIT(IIO_EV_INFO_PERIOD)
910 };
911
912 #define KXCJK1013_CHANNEL(_axis) { \
913 .type = IIO_ACCEL, \
914 .modified = 1, \
915 .channel2 = IIO_MOD_##_axis, \
916 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
917 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
918 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
919 .scan_index = AXIS_##_axis, \
920 .scan_type = { \
921 .sign = 's', \
922 .realbits = 12, \
923 .storagebits = 16, \
924 .shift = 4, \
925 .endianness = IIO_CPU, \
926 }, \
927 .event_spec = &kxcjk1013_event, \
928 .num_event_specs = 1 \
929 }
930
931 static const struct iio_chan_spec kxcjk1013_channels[] = {
932 KXCJK1013_CHANNEL(X),
933 KXCJK1013_CHANNEL(Y),
934 KXCJK1013_CHANNEL(Z),
935 IIO_CHAN_SOFT_TIMESTAMP(3),
936 };
937
938 static const struct iio_info kxcjk1013_info = {
939 .attrs = &kxcjk1013_attrs_group,
940 .read_raw = kxcjk1013_read_raw,
941 .write_raw = kxcjk1013_write_raw,
942 .read_event_value = kxcjk1013_read_event,
943 .write_event_value = kxcjk1013_write_event,
944 .write_event_config = kxcjk1013_write_event_config,
945 .read_event_config = kxcjk1013_read_event_config,
946 .validate_trigger = kxcjk1013_validate_trigger,
947 .driver_module = THIS_MODULE,
948 };
949
950 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
951 {
952 struct iio_poll_func *pf = p;
953 struct iio_dev *indio_dev = pf->indio_dev;
954 struct kxcjk1013_data *data = iio_priv(indio_dev);
955 int bit, ret, i = 0;
956
957 mutex_lock(&data->mutex);
958
959 for_each_set_bit(bit, indio_dev->active_scan_mask,
960 indio_dev->masklength) {
961 ret = kxcjk1013_get_acc_reg(data, bit);
962 if (ret < 0) {
963 mutex_unlock(&data->mutex);
964 goto err;
965 }
966 data->buffer[i++] = ret;
967 }
968 mutex_unlock(&data->mutex);
969
970 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
971 data->timestamp);
972 err:
973 iio_trigger_notify_done(indio_dev->trig);
974
975 return IRQ_HANDLED;
976 }
977
978 static int kxcjk1013_trig_try_reen(struct iio_trigger *trig)
979 {
980 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
981 struct kxcjk1013_data *data = iio_priv(indio_dev);
982 int ret;
983
984 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
985 if (ret < 0) {
986 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
987 return ret;
988 }
989
990 return 0;
991 }
992
993 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
994 bool state)
995 {
996 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
997 struct kxcjk1013_data *data = iio_priv(indio_dev);
998 int ret;
999
1000 mutex_lock(&data->mutex);
1001
1002 if (!state && data->ev_enable_state && data->motion_trigger_on) {
1003 data->motion_trigger_on = false;
1004 mutex_unlock(&data->mutex);
1005 return 0;
1006 }
1007
1008 ret = kxcjk1013_set_power_state(data, state);
1009 if (ret < 0) {
1010 mutex_unlock(&data->mutex);
1011 return ret;
1012 }
1013 if (data->motion_trig == trig)
1014 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1015 else
1016 ret = kxcjk1013_setup_new_data_interrupt(data, state);
1017 if (ret < 0) {
1018 kxcjk1013_set_power_state(data, false);
1019 mutex_unlock(&data->mutex);
1020 return ret;
1021 }
1022 if (data->motion_trig == trig)
1023 data->motion_trigger_on = state;
1024 else
1025 data->dready_trigger_on = state;
1026
1027 mutex_unlock(&data->mutex);
1028
1029 return 0;
1030 }
1031
1032 static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1033 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1034 .try_reenable = kxcjk1013_trig_try_reen,
1035 .owner = THIS_MODULE,
1036 };
1037
1038 static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1039 {
1040 struct iio_dev *indio_dev = private;
1041 struct kxcjk1013_data *data = iio_priv(indio_dev);
1042 int ret;
1043
1044 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1);
1045 if (ret < 0) {
1046 dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1047 goto ack_intr;
1048 }
1049
1050 if (ret & 0x02) {
1051 ret = i2c_smbus_read_byte_data(data->client,
1052 KXCJK1013_REG_INT_SRC2);
1053 if (ret < 0) {
1054 dev_err(&data->client->dev,
1055 "Error reading reg_int_src2\n");
1056 goto ack_intr;
1057 }
1058
1059 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1060 iio_push_event(indio_dev,
1061 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1062 0,
1063 IIO_MOD_X,
1064 IIO_EV_TYPE_THRESH,
1065 IIO_EV_DIR_FALLING),
1066 data->timestamp);
1067 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1068 iio_push_event(indio_dev,
1069 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1070 0,
1071 IIO_MOD_X,
1072 IIO_EV_TYPE_THRESH,
1073 IIO_EV_DIR_RISING),
1074 data->timestamp);
1075
1076
1077 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1078 iio_push_event(indio_dev,
1079 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1080 0,
1081 IIO_MOD_Y,
1082 IIO_EV_TYPE_THRESH,
1083 IIO_EV_DIR_FALLING),
1084 data->timestamp);
1085 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1086 iio_push_event(indio_dev,
1087 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1088 0,
1089 IIO_MOD_Y,
1090 IIO_EV_TYPE_THRESH,
1091 IIO_EV_DIR_RISING),
1092 data->timestamp);
1093
1094 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1095 iio_push_event(indio_dev,
1096 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1097 0,
1098 IIO_MOD_Z,
1099 IIO_EV_TYPE_THRESH,
1100 IIO_EV_DIR_FALLING),
1101 data->timestamp);
1102 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1103 iio_push_event(indio_dev,
1104 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1105 0,
1106 IIO_MOD_Z,
1107 IIO_EV_TYPE_THRESH,
1108 IIO_EV_DIR_RISING),
1109 data->timestamp);
1110 }
1111
1112 ack_intr:
1113 if (data->dready_trigger_on)
1114 return IRQ_HANDLED;
1115
1116 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
1117 if (ret < 0)
1118 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1119
1120 return IRQ_HANDLED;
1121 }
1122
1123 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1124 {
1125 struct iio_dev *indio_dev = private;
1126 struct kxcjk1013_data *data = iio_priv(indio_dev);
1127
1128 data->timestamp = iio_get_time_ns();
1129
1130 if (data->dready_trigger_on)
1131 iio_trigger_poll(data->dready_trig);
1132 else if (data->motion_trigger_on)
1133 iio_trigger_poll(data->motion_trig);
1134
1135 if (data->ev_enable_state)
1136 return IRQ_WAKE_THREAD;
1137 else
1138 return IRQ_HANDLED;
1139 }
1140
1141 static const char *kxcjk1013_match_acpi_device(struct device *dev,
1142 enum kx_chipset *chipset,
1143 bool *is_smo8500_device)
1144 {
1145 const struct acpi_device_id *id;
1146
1147 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1148 if (!id)
1149 return NULL;
1150 if (strcmp(id->id, "SMO8500") == 0)
1151 *is_smo8500_device = true;
1152 *chipset = (enum kx_chipset)id->driver_data;
1153
1154 return dev_name(dev);
1155 }
1156
1157 static int kxcjk1013_gpio_probe(struct i2c_client *client,
1158 struct kxcjk1013_data *data)
1159 {
1160 struct device *dev;
1161 struct gpio_desc *gpio;
1162 int ret;
1163
1164 if (!client)
1165 return -EINVAL;
1166 if (data->is_smo8500_device)
1167 return -ENOTSUPP;
1168
1169 dev = &client->dev;
1170
1171 /* data ready gpio interrupt pin */
1172 gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0, GPIOD_IN);
1173 if (IS_ERR(gpio)) {
1174 dev_err(dev, "acpi gpio get index failed\n");
1175 return PTR_ERR(gpio);
1176 }
1177
1178 ret = gpiod_to_irq(gpio);
1179
1180 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1181
1182 return ret;
1183 }
1184
1185 static int kxcjk1013_probe(struct i2c_client *client,
1186 const struct i2c_device_id *id)
1187 {
1188 struct kxcjk1013_data *data;
1189 struct iio_dev *indio_dev;
1190 struct kxcjk_1013_platform_data *pdata;
1191 const char *name;
1192 int ret;
1193
1194 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1195 if (!indio_dev)
1196 return -ENOMEM;
1197
1198 data = iio_priv(indio_dev);
1199 i2c_set_clientdata(client, indio_dev);
1200 data->client = client;
1201
1202 pdata = dev_get_platdata(&client->dev);
1203 if (pdata)
1204 data->active_high_intr = pdata->active_high_intr;
1205 else
1206 data->active_high_intr = true; /* default polarity */
1207
1208 if (id) {
1209 data->chipset = (enum kx_chipset)(id->driver_data);
1210 name = id->name;
1211 } else if (ACPI_HANDLE(&client->dev)) {
1212 name = kxcjk1013_match_acpi_device(&client->dev,
1213 &data->chipset,
1214 &data->is_smo8500_device);
1215 } else
1216 return -ENODEV;
1217
1218 ret = kxcjk1013_chip_init(data);
1219 if (ret < 0)
1220 return ret;
1221
1222 mutex_init(&data->mutex);
1223
1224 indio_dev->dev.parent = &client->dev;
1225 indio_dev->channels = kxcjk1013_channels;
1226 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1227 indio_dev->name = name;
1228 indio_dev->modes = INDIO_DIRECT_MODE;
1229 indio_dev->info = &kxcjk1013_info;
1230
1231 if (client->irq < 0)
1232 client->irq = kxcjk1013_gpio_probe(client, data);
1233
1234 if (client->irq >= 0) {
1235 ret = devm_request_threaded_irq(&client->dev, client->irq,
1236 kxcjk1013_data_rdy_trig_poll,
1237 kxcjk1013_event_handler,
1238 IRQF_TRIGGER_RISING,
1239 KXCJK1013_IRQ_NAME,
1240 indio_dev);
1241 if (ret)
1242 goto err_poweroff;
1243
1244 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1245 "%s-dev%d",
1246 indio_dev->name,
1247 indio_dev->id);
1248 if (!data->dready_trig) {
1249 ret = -ENOMEM;
1250 goto err_poweroff;
1251 }
1252
1253 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1254 "%s-any-motion-dev%d",
1255 indio_dev->name,
1256 indio_dev->id);
1257 if (!data->motion_trig) {
1258 ret = -ENOMEM;
1259 goto err_poweroff;
1260 }
1261
1262 data->dready_trig->dev.parent = &client->dev;
1263 data->dready_trig->ops = &kxcjk1013_trigger_ops;
1264 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1265 indio_dev->trig = data->dready_trig;
1266 iio_trigger_get(indio_dev->trig);
1267 ret = iio_trigger_register(data->dready_trig);
1268 if (ret)
1269 goto err_poweroff;
1270
1271 data->motion_trig->dev.parent = &client->dev;
1272 data->motion_trig->ops = &kxcjk1013_trigger_ops;
1273 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1274 ret = iio_trigger_register(data->motion_trig);
1275 if (ret) {
1276 data->motion_trig = NULL;
1277 goto err_trigger_unregister;
1278 }
1279
1280 ret = iio_triggered_buffer_setup(indio_dev,
1281 &iio_pollfunc_store_time,
1282 kxcjk1013_trigger_handler,
1283 NULL);
1284 if (ret < 0) {
1285 dev_err(&client->dev,
1286 "iio triggered buffer setup failed\n");
1287 goto err_trigger_unregister;
1288 }
1289 }
1290
1291 ret = iio_device_register(indio_dev);
1292 if (ret < 0) {
1293 dev_err(&client->dev, "unable to register iio device\n");
1294 goto err_buffer_cleanup;
1295 }
1296
1297 ret = pm_runtime_set_active(&client->dev);
1298 if (ret)
1299 goto err_iio_unregister;
1300
1301 pm_runtime_enable(&client->dev);
1302 pm_runtime_set_autosuspend_delay(&client->dev,
1303 KXCJK1013_SLEEP_DELAY_MS);
1304 pm_runtime_use_autosuspend(&client->dev);
1305
1306 return 0;
1307
1308 err_iio_unregister:
1309 iio_device_unregister(indio_dev);
1310 err_buffer_cleanup:
1311 if (data->dready_trig)
1312 iio_triggered_buffer_cleanup(indio_dev);
1313 err_trigger_unregister:
1314 if (data->dready_trig)
1315 iio_trigger_unregister(data->dready_trig);
1316 if (data->motion_trig)
1317 iio_trigger_unregister(data->motion_trig);
1318 err_poweroff:
1319 kxcjk1013_set_mode(data, STANDBY);
1320
1321 return ret;
1322 }
1323
1324 static int kxcjk1013_remove(struct i2c_client *client)
1325 {
1326 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1327 struct kxcjk1013_data *data = iio_priv(indio_dev);
1328
1329 pm_runtime_disable(&client->dev);
1330 pm_runtime_set_suspended(&client->dev);
1331 pm_runtime_put_noidle(&client->dev);
1332
1333 iio_device_unregister(indio_dev);
1334
1335 if (data->dready_trig) {
1336 iio_triggered_buffer_cleanup(indio_dev);
1337 iio_trigger_unregister(data->dready_trig);
1338 iio_trigger_unregister(data->motion_trig);
1339 }
1340
1341 mutex_lock(&data->mutex);
1342 kxcjk1013_set_mode(data, STANDBY);
1343 mutex_unlock(&data->mutex);
1344
1345 return 0;
1346 }
1347
1348 #ifdef CONFIG_PM_SLEEP
1349 static int kxcjk1013_suspend(struct device *dev)
1350 {
1351 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1352 struct kxcjk1013_data *data = iio_priv(indio_dev);
1353 int ret;
1354
1355 mutex_lock(&data->mutex);
1356 ret = kxcjk1013_set_mode(data, STANDBY);
1357 mutex_unlock(&data->mutex);
1358
1359 return ret;
1360 }
1361
1362 static int kxcjk1013_resume(struct device *dev)
1363 {
1364 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1365 struct kxcjk1013_data *data = iio_priv(indio_dev);
1366 int ret = 0;
1367
1368 mutex_lock(&data->mutex);
1369 ret = kxcjk1013_set_mode(data, OPERATION);
1370 mutex_unlock(&data->mutex);
1371
1372 return ret;
1373 }
1374 #endif
1375
1376 #ifdef CONFIG_PM
1377 static int kxcjk1013_runtime_suspend(struct device *dev)
1378 {
1379 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1380 struct kxcjk1013_data *data = iio_priv(indio_dev);
1381 int ret;
1382
1383 ret = kxcjk1013_set_mode(data, STANDBY);
1384 if (ret < 0) {
1385 dev_err(&data->client->dev, "powering off device failed\n");
1386 return -EAGAIN;
1387 }
1388 return 0;
1389 }
1390
1391 static int kxcjk1013_runtime_resume(struct device *dev)
1392 {
1393 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1394 struct kxcjk1013_data *data = iio_priv(indio_dev);
1395 int ret;
1396 int sleep_val;
1397
1398 ret = kxcjk1013_set_mode(data, OPERATION);
1399 if (ret < 0)
1400 return ret;
1401
1402 sleep_val = kxcjk1013_get_startup_times(data);
1403 if (sleep_val < 20000)
1404 usleep_range(sleep_val, 20000);
1405 else
1406 msleep_interruptible(sleep_val/1000);
1407
1408 return 0;
1409 }
1410 #endif
1411
1412 static const struct dev_pm_ops kxcjk1013_pm_ops = {
1413 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1414 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1415 kxcjk1013_runtime_resume, NULL)
1416 };
1417
1418 static const struct acpi_device_id kx_acpi_match[] = {
1419 {"KXCJ1013", KXCJK1013},
1420 {"KXCJ1008", KXCJ91008},
1421 {"KXTJ1009", KXTJ21009},
1422 {"SMO8500", KXCJ91008},
1423 { },
1424 };
1425 MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1426
1427 static const struct i2c_device_id kxcjk1013_id[] = {
1428 {"kxcjk1013", KXCJK1013},
1429 {"kxcj91008", KXCJ91008},
1430 {"kxtj21009", KXTJ21009},
1431 {"SMO8500", KXCJ91008},
1432 {}
1433 };
1434
1435 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1436
1437 static struct i2c_driver kxcjk1013_driver = {
1438 .driver = {
1439 .name = KXCJK1013_DRV_NAME,
1440 .acpi_match_table = ACPI_PTR(kx_acpi_match),
1441 .pm = &kxcjk1013_pm_ops,
1442 },
1443 .probe = kxcjk1013_probe,
1444 .remove = kxcjk1013_remove,
1445 .id_table = kxcjk1013_id,
1446 };
1447 module_i2c_driver(kxcjk1013_driver);
1448
1449 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1450 MODULE_LICENSE("GPL v2");
1451 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");
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