2 * Copyright (c) 2014-2015 Imagination Technologies Ltd.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License version 2 as published by
6 * the Free Software Foundation.
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/err.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
24 #include <linux/iio/trigger.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
29 #define CC10001_ADC_CONFIG 0x00
30 #define CC10001_ADC_START_CONV BIT(4)
31 #define CC10001_ADC_MODE_SINGLE_CONV BIT(5)
33 #define CC10001_ADC_DDATA_OUT 0x04
34 #define CC10001_ADC_EOC 0x08
35 #define CC10001_ADC_EOC_SET BIT(0)
37 #define CC10001_ADC_CHSEL_SAMPLED 0x0c
38 #define CC10001_ADC_POWER_DOWN 0x10
39 #define CC10001_ADC_POWER_DOWN_SET BIT(0)
41 #define CC10001_ADC_DEBUG 0x14
42 #define CC10001_ADC_DATA_COUNT 0x20
44 #define CC10001_ADC_DATA_MASK GENMASK(9, 0)
45 #define CC10001_ADC_NUM_CHANNELS 8
46 #define CC10001_ADC_CH_MASK GENMASK(2, 0)
48 #define CC10001_INVALID_SAMPLED 0xffff
49 #define CC10001_MAX_POLL_COUNT 20
52 * As per device specification, wait six clock cycles after power-up to
53 * activate START. Since adding two more clock cycles delay does not
54 * impact the performance too much, we are adding two additional cycles delay
57 #define CC10001_WAIT_CYCLES 8
59 struct cc10001_adc_device
{
60 void __iomem
*reg_base
;
62 struct regulator
*reg
;
66 unsigned int start_delay_ns
;
67 unsigned int eoc_delay_ns
;
70 static inline void cc10001_adc_write_reg(struct cc10001_adc_device
*adc_dev
,
73 writel(val
, adc_dev
->reg_base
+ reg
);
76 static inline u32
cc10001_adc_read_reg(struct cc10001_adc_device
*adc_dev
,
79 return readl(adc_dev
->reg_base
+ reg
);
82 static void cc10001_adc_power_up(struct cc10001_adc_device
*adc_dev
)
84 cc10001_adc_write_reg(adc_dev
, CC10001_ADC_POWER_DOWN
, 0);
85 ndelay(adc_dev
->start_delay_ns
);
88 static void cc10001_adc_power_down(struct cc10001_adc_device
*adc_dev
)
90 cc10001_adc_write_reg(adc_dev
, CC10001_ADC_POWER_DOWN
,
91 CC10001_ADC_POWER_DOWN_SET
);
94 static void cc10001_adc_start(struct cc10001_adc_device
*adc_dev
,
99 /* Channel selection and mode of operation */
100 val
= (channel
& CC10001_ADC_CH_MASK
) | CC10001_ADC_MODE_SINGLE_CONV
;
101 cc10001_adc_write_reg(adc_dev
, CC10001_ADC_CONFIG
, val
);
104 val
= cc10001_adc_read_reg(adc_dev
, CC10001_ADC_CONFIG
);
105 val
= val
| CC10001_ADC_START_CONV
;
106 cc10001_adc_write_reg(adc_dev
, CC10001_ADC_CONFIG
, val
);
109 static u16
cc10001_adc_poll_done(struct iio_dev
*indio_dev
,
110 unsigned int channel
,
113 struct cc10001_adc_device
*adc_dev
= iio_priv(indio_dev
);
114 unsigned int poll_count
= 0;
116 while (!(cc10001_adc_read_reg(adc_dev
, CC10001_ADC_EOC
) &
117 CC10001_ADC_EOC_SET
)) {
120 if (poll_count
++ == CC10001_MAX_POLL_COUNT
)
121 return CC10001_INVALID_SAMPLED
;
125 while ((cc10001_adc_read_reg(adc_dev
, CC10001_ADC_CHSEL_SAMPLED
) &
126 CC10001_ADC_CH_MASK
) != channel
) {
129 if (poll_count
++ == CC10001_MAX_POLL_COUNT
)
130 return CC10001_INVALID_SAMPLED
;
133 /* Read the 10 bit output register */
134 return cc10001_adc_read_reg(adc_dev
, CC10001_ADC_DDATA_OUT
) &
135 CC10001_ADC_DATA_MASK
;
138 static irqreturn_t
cc10001_adc_trigger_h(int irq
, void *p
)
140 struct cc10001_adc_device
*adc_dev
;
141 struct iio_poll_func
*pf
= p
;
142 struct iio_dev
*indio_dev
;
143 unsigned int delay_ns
;
144 unsigned int channel
;
145 unsigned int scan_idx
;
150 indio_dev
= pf
->indio_dev
;
151 adc_dev
= iio_priv(indio_dev
);
154 mutex_lock(&adc_dev
->lock
);
156 cc10001_adc_power_up(adc_dev
);
158 /* Calculate delay step for eoc and sampled data */
159 delay_ns
= adc_dev
->eoc_delay_ns
/ CC10001_MAX_POLL_COUNT
;
162 sample_invalid
= false;
163 for_each_set_bit(scan_idx
, indio_dev
->active_scan_mask
,
164 indio_dev
->masklength
) {
166 channel
= indio_dev
->channels
[scan_idx
].channel
;
167 cc10001_adc_start(adc_dev
, channel
);
169 data
[i
] = cc10001_adc_poll_done(indio_dev
, channel
, delay_ns
);
170 if (data
[i
] == CC10001_INVALID_SAMPLED
) {
171 dev_warn(&indio_dev
->dev
,
172 "invalid sample on channel %d\n", channel
);
173 sample_invalid
= true;
180 cc10001_adc_power_down(adc_dev
);
182 mutex_unlock(&adc_dev
->lock
);
185 iio_push_to_buffers_with_timestamp(indio_dev
, data
,
187 iio_trigger_notify_done(indio_dev
->trig
);
192 static u16
cc10001_adc_read_raw_voltage(struct iio_dev
*indio_dev
,
193 struct iio_chan_spec
const *chan
)
195 struct cc10001_adc_device
*adc_dev
= iio_priv(indio_dev
);
196 unsigned int delay_ns
;
199 cc10001_adc_power_up(adc_dev
);
201 /* Calculate delay step for eoc and sampled data */
202 delay_ns
= adc_dev
->eoc_delay_ns
/ CC10001_MAX_POLL_COUNT
;
204 cc10001_adc_start(adc_dev
, chan
->channel
);
206 val
= cc10001_adc_poll_done(indio_dev
, chan
->channel
, delay_ns
);
208 cc10001_adc_power_down(adc_dev
);
213 static int cc10001_adc_read_raw(struct iio_dev
*indio_dev
,
214 struct iio_chan_spec
const *chan
,
215 int *val
, int *val2
, long mask
)
217 struct cc10001_adc_device
*adc_dev
= iio_priv(indio_dev
);
221 case IIO_CHAN_INFO_RAW
:
222 if (iio_buffer_enabled(indio_dev
))
224 mutex_lock(&adc_dev
->lock
);
225 *val
= cc10001_adc_read_raw_voltage(indio_dev
, chan
);
226 mutex_unlock(&adc_dev
->lock
);
228 if (*val
== CC10001_INVALID_SAMPLED
)
232 case IIO_CHAN_INFO_SCALE
:
233 ret
= regulator_get_voltage(adc_dev
->reg
);
238 *val2
= chan
->scan_type
.realbits
;
239 return IIO_VAL_FRACTIONAL_LOG2
;
246 static int cc10001_update_scan_mode(struct iio_dev
*indio_dev
,
247 const unsigned long *scan_mask
)
249 struct cc10001_adc_device
*adc_dev
= iio_priv(indio_dev
);
252 adc_dev
->buf
= kmalloc(indio_dev
->scan_bytes
, GFP_KERNEL
);
259 static const struct iio_info cc10001_adc_info
= {
260 .driver_module
= THIS_MODULE
,
261 .read_raw
= &cc10001_adc_read_raw
,
262 .update_scan_mode
= &cc10001_update_scan_mode
,
265 static int cc10001_adc_channel_init(struct iio_dev
*indio_dev
,
266 unsigned long channel_map
)
268 struct iio_chan_spec
*chan_array
, *timestamp
;
269 unsigned int bit
, idx
= 0;
271 indio_dev
->num_channels
= bitmap_weight(&channel_map
,
272 CC10001_ADC_NUM_CHANNELS
) + 1;
274 chan_array
= devm_kcalloc(&indio_dev
->dev
, indio_dev
->num_channels
,
275 sizeof(struct iio_chan_spec
),
280 for_each_set_bit(bit
, &channel_map
, CC10001_ADC_NUM_CHANNELS
) {
281 struct iio_chan_spec
*chan
= &chan_array
[idx
];
283 chan
->type
= IIO_VOLTAGE
;
286 chan
->scan_index
= idx
;
287 chan
->scan_type
.sign
= 'u';
288 chan
->scan_type
.realbits
= 10;
289 chan
->scan_type
.storagebits
= 16;
290 chan
->info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
);
291 chan
->info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
);
295 timestamp
= &chan_array
[idx
];
296 timestamp
->type
= IIO_TIMESTAMP
;
297 timestamp
->channel
= -1;
298 timestamp
->scan_index
= idx
;
299 timestamp
->scan_type
.sign
= 's';
300 timestamp
->scan_type
.realbits
= 64;
301 timestamp
->scan_type
.storagebits
= 64;
303 indio_dev
->channels
= chan_array
;
308 static int cc10001_adc_probe(struct platform_device
*pdev
)
310 struct device_node
*node
= pdev
->dev
.of_node
;
311 struct cc10001_adc_device
*adc_dev
;
312 unsigned long adc_clk_rate
;
313 struct resource
*res
;
314 struct iio_dev
*indio_dev
;
315 unsigned long channel_map
;
318 indio_dev
= devm_iio_device_alloc(&pdev
->dev
, sizeof(*adc_dev
));
319 if (indio_dev
== NULL
)
322 adc_dev
= iio_priv(indio_dev
);
324 channel_map
= GENMASK(CC10001_ADC_NUM_CHANNELS
- 1, 0);
325 if (!of_property_read_u32(node
, "adc-reserved-channels", &ret
))
328 adc_dev
->reg
= devm_regulator_get(&pdev
->dev
, "vref");
329 if (IS_ERR(adc_dev
->reg
))
330 return PTR_ERR(adc_dev
->reg
);
332 ret
= regulator_enable(adc_dev
->reg
);
336 indio_dev
->dev
.parent
= &pdev
->dev
;
337 indio_dev
->name
= dev_name(&pdev
->dev
);
338 indio_dev
->info
= &cc10001_adc_info
;
339 indio_dev
->modes
= INDIO_DIRECT_MODE
;
341 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
342 adc_dev
->reg_base
= devm_ioremap_resource(&pdev
->dev
, res
);
343 if (IS_ERR(adc_dev
->reg_base
)) {
344 ret
= PTR_ERR(adc_dev
->reg_base
);
345 goto err_disable_reg
;
348 adc_dev
->adc_clk
= devm_clk_get(&pdev
->dev
, "adc");
349 if (IS_ERR(adc_dev
->adc_clk
)) {
350 dev_err(&pdev
->dev
, "failed to get the clock\n");
351 ret
= PTR_ERR(adc_dev
->adc_clk
);
352 goto err_disable_reg
;
355 ret
= clk_prepare_enable(adc_dev
->adc_clk
);
357 dev_err(&pdev
->dev
, "failed to enable the clock\n");
358 goto err_disable_reg
;
361 adc_clk_rate
= clk_get_rate(adc_dev
->adc_clk
);
364 dev_err(&pdev
->dev
, "null clock rate!\n");
365 goto err_disable_clk
;
368 adc_dev
->eoc_delay_ns
= NSEC_PER_SEC
/ adc_clk_rate
;
369 adc_dev
->start_delay_ns
= adc_dev
->eoc_delay_ns
* CC10001_WAIT_CYCLES
;
371 /* Setup the ADC channels available on the device */
372 ret
= cc10001_adc_channel_init(indio_dev
, channel_map
);
374 goto err_disable_clk
;
376 mutex_init(&adc_dev
->lock
);
378 ret
= iio_triggered_buffer_setup(indio_dev
, NULL
,
379 &cc10001_adc_trigger_h
, NULL
);
381 goto err_disable_clk
;
383 ret
= iio_device_register(indio_dev
);
385 goto err_cleanup_buffer
;
387 platform_set_drvdata(pdev
, indio_dev
);
392 iio_triggered_buffer_cleanup(indio_dev
);
394 clk_disable_unprepare(adc_dev
->adc_clk
);
396 regulator_disable(adc_dev
->reg
);
400 static int cc10001_adc_remove(struct platform_device
*pdev
)
402 struct iio_dev
*indio_dev
= platform_get_drvdata(pdev
);
403 struct cc10001_adc_device
*adc_dev
= iio_priv(indio_dev
);
405 iio_device_unregister(indio_dev
);
406 iio_triggered_buffer_cleanup(indio_dev
);
407 clk_disable_unprepare(adc_dev
->adc_clk
);
408 regulator_disable(adc_dev
->reg
);
413 static const struct of_device_id cc10001_adc_dt_ids
[] = {
414 { .compatible
= "cosmic,10001-adc", },
417 MODULE_DEVICE_TABLE(of
, cc10001_adc_dt_ids
);
419 static struct platform_driver cc10001_adc_driver
= {
421 .name
= "cc10001-adc",
422 .of_match_table
= cc10001_adc_dt_ids
,
424 .probe
= cc10001_adc_probe
,
425 .remove
= cc10001_adc_remove
,
427 module_platform_driver(cc10001_adc_driver
);
429 MODULE_AUTHOR("Phani Movva <Phani.Movva@imgtec.com>");
430 MODULE_DESCRIPTION("Cosmic Circuits ADC driver");
431 MODULE_LICENSE("GPL v2");