drivers/iio/dac/ad5064.c

   1 /*
   2  * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R,
   3  * AD5627, AD5627R, AD5628, AD5629R, AD5645R, AD5647R, AD5648, AD5665, AD5665R,
   4  * AD5666, AD5667, AD5667R, AD5668, AD5669R, LTC2606, LTC2607, LTC2609, LTC2616,
   5  * LTC2617, LTC2619, LTC2626, LTC2627, LTC2629, LTC2631, LTC2633, LTC2635
   6  * Digital to analog converters driver
   7  *
   8  * Copyright 2011 Analog Devices Inc.
   9  *
  10  * Licensed under the GPL-2.
  11  */
  12
  13 #include <linux/device.h>
  14 #include <linux/err.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/spi/spi.h>
  18 #include <linux/i2c.h>
  19 #include <linux/slab.h>
  20 #include <linux/sysfs.h>
  21 #include <linux/regulator/consumer.h>
  22 #include <asm/unaligned.h>
  23
  24 #include <linux/iio/iio.h>
  25 #include <linux/iio/sysfs.h>
  26
  27 #define AD5064_MAX_DAC_CHANNELS                 8
  28 #define AD5064_MAX_VREFS                        4
  29
  30 #define AD5064_ADDR(x)                          ((x) << 20)
  31 #define AD5064_CMD(x)                           ((x) << 24)
  32
  33 #define AD5064_ADDR_ALL_DAC                     0xF
  34
  35 #define AD5064_CMD_WRITE_INPUT_N                0x0
  36 #define AD5064_CMD_UPDATE_DAC_N                 0x1
  37 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL     0x2
  38 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N       0x3
  39 #define AD5064_CMD_POWERDOWN_DAC                0x4
  40 #define AD5064_CMD_CLEAR                        0x5
  41 #define AD5064_CMD_LDAC_MASK                    0x6
  42 #define AD5064_CMD_RESET                        0x7
  43 #define AD5064_CMD_CONFIG                       0x8
  44
  45 #define AD5064_CMD_RESET_V2                     0x5
  46 #define AD5064_CMD_CONFIG_V2                    0x7
  47
  48 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE        BIT(1)
  49 #define AD5064_CONFIG_INT_VREF_ENABLE           BIT(0)
  50
  51 #define AD5064_LDAC_PWRDN_NONE                  0x0
  52 #define AD5064_LDAC_PWRDN_1K                    0x1
  53 #define AD5064_LDAC_PWRDN_100K                  0x2
  54 #define AD5064_LDAC_PWRDN_3STATE                0x3
  55
  56 /**
  57  * enum ad5064_regmap_type - Register layout variant
  58  * @AD5064_REGMAP_ADI: Old Analog Devices register map layout
  59  * @AD5064_REGMAP_ADI2: New Analog Devices register map layout
  60  * @AD5064_REGMAP_LTC: LTC register map layout
  61  */
  62 enum ad5064_regmap_type {
  63         AD5064_REGMAP_ADI,
  64         AD5064_REGMAP_ADI2,
  65         AD5064_REGMAP_LTC,
  66 };
  67
  68 /**
  69  * struct ad5064_chip_info - chip specific information
  70  * @shared_vref:        whether the vref supply is shared between channels
  71  * @internal_vref:      internal reference voltage. 0 if the chip has no
  72                         internal vref.
  73  * @channel:            channel specification
  74  * @num_channels:       number of channels
  75  * @regmap_type:        register map layout variant
  76  */
  77
  78 struct ad5064_chip_info {
  79         bool shared_vref;
  80         unsigned long internal_vref;
  81         const struct iio_chan_spec *channels;
  82         unsigned int num_channels;
  83         enum ad5064_regmap_type regmap_type;
  84 };
  85
  86 struct ad5064_state;
  87
  88 typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
  89                 unsigned int addr, unsigned int val);
  90
  91 /**
  92  * struct ad5064_state - driver instance specific data
  93  * @dev:                the device for this driver instance
  94  * @chip_info:          chip model specific constants, available modes etc
  95  * @vref_reg:           vref supply regulators
  96  * @pwr_down:           whether channel is powered down
  97  * @pwr_down_mode:      channel's current power down mode
  98  * @dac_cache:          current DAC raw value (chip does not support readback)
  99  * @use_internal_vref:  set to true if the internal reference voltage should be
 100  *                      used.
 101  * @write:              register write callback
 102  * @data:               i2c/spi transfer buffers
 103  */
 104
 105 struct ad5064_state {
 106         struct device                   *dev;
 107         const struct ad5064_chip_info   *chip_info;
 108         struct regulator_bulk_data      vref_reg[AD5064_MAX_VREFS];
 109         bool                            pwr_down[AD5064_MAX_DAC_CHANNELS];
 110         u8                              pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
 111         unsigned int                    dac_cache[AD5064_MAX_DAC_CHANNELS];
 112         bool                            use_internal_vref;
 113
 114         ad5064_write_func               write;
 115
 116         /*
 117          * DMA (thus cache coherency maintenance) requires the
 118          * transfer buffers to live in their own cache lines.
 119          */
 120         union {
 121                 u8 i2c[3];
 122                 __be32 spi;
 123         } data ____cacheline_aligned;
 124 };
 125
 126 enum ad5064_type {
 127         ID_AD5024,
 128         ID_AD5025,
 129         ID_AD5044,
 130         ID_AD5045,
 131         ID_AD5064,
 132         ID_AD5064_1,
 133         ID_AD5065,
 134         ID_AD5625,
 135         ID_AD5625R_1V25,
 136         ID_AD5625R_2V5,
 137         ID_AD5627,
 138         ID_AD5627R_1V25,
 139         ID_AD5627R_2V5,
 140         ID_AD5628_1,
 141         ID_AD5628_2,
 142         ID_AD5629_1,
 143         ID_AD5629_2,
 144         ID_AD5645R_1V25,
 145         ID_AD5645R_2V5,
 146         ID_AD5647R_1V25,
 147         ID_AD5647R_2V5,
 148         ID_AD5648_1,
 149         ID_AD5648_2,
 150         ID_AD5665,
 151         ID_AD5665R_1V25,
 152         ID_AD5665R_2V5,
 153         ID_AD5666_1,
 154         ID_AD5666_2,
 155         ID_AD5667,
 156         ID_AD5667R_1V25,
 157         ID_AD5667R_2V5,
 158         ID_AD5668_1,
 159         ID_AD5668_2,
 160         ID_AD5669_1,
 161         ID_AD5669_2,
 162         ID_LTC2606,
 163         ID_LTC2607,
 164         ID_LTC2609,
 165         ID_LTC2616,
 166         ID_LTC2617,
 167         ID_LTC2619,
 168         ID_LTC2626,
 169         ID_LTC2627,
 170         ID_LTC2629,
 171         ID_LTC2631_L12,
 172         ID_LTC2631_H12,
 173         ID_LTC2631_L10,
 174         ID_LTC2631_H10,
 175         ID_LTC2631_L8,
 176         ID_LTC2631_H8,
 177         ID_LTC2633_L12,
 178         ID_LTC2633_H12,
 179         ID_LTC2633_L10,
 180         ID_LTC2633_H10,
 181         ID_LTC2633_L8,
 182         ID_LTC2633_H8,
 183         ID_LTC2635_L12,
 184         ID_LTC2635_H12,
 185         ID_LTC2635_L10,
 186         ID_LTC2635_H10,
 187         ID_LTC2635_L8,
 188         ID_LTC2635_H8,
 189 };
 190
 191 static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
 192         unsigned int addr, unsigned int val, unsigned int shift)
 193 {
 194         val <<= shift;
 195
 196         return st->write(st, cmd, addr, val);
 197 }
 198
 199 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
 200         const struct iio_chan_spec *chan)
 201 {
 202         unsigned int val, address;
 203         unsigned int shift;
 204         int ret;
 205
 206         if (st->chip_info->regmap_type == AD5064_REGMAP_LTC) {
 207                 val = 0;
 208                 address = chan->address;
 209         } else {
 210                 if (st->chip_info->regmap_type == AD5064_REGMAP_ADI2)
 211                         shift = 4;
 212                 else
 213                         shift = 8;
 214
 215                 val = (0x1 << chan->address);
 216                 address = 0;
 217
 218                 if (st->pwr_down[chan->channel])
 219                         val |= st->pwr_down_mode[chan->channel] << shift;
 220         }
 221
 222         ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, address, val, 0);
 223
 224         return ret;
 225 }
 226
 227 static const char * const ad5064_powerdown_modes[] = {
 228         "1kohm_to_gnd",
 229         "100kohm_to_gnd",
 230         "three_state",
 231 };
 232
 233 static const char * const ltc2617_powerdown_modes[] = {
 234         "90kohm_to_gnd",
 235 };
 236
 237 static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
 238         const struct iio_chan_spec *chan)
 239 {
 240         struct ad5064_state *st = iio_priv(indio_dev);
 241
 242         return st->pwr_down_mode[chan->channel] - 1;
 243 }
 244
 245 static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
 246         const struct iio_chan_spec *chan, unsigned int mode)
 247 {
 248         struct ad5064_state *st = iio_priv(indio_dev);
 249         int ret;
 250
 251         mutex_lock(&indio_dev->mlock);
 252         st->pwr_down_mode[chan->channel] = mode + 1;
 253
 254         ret = ad5064_sync_powerdown_mode(st, chan);
 255         mutex_unlock(&indio_dev->mlock);
 256
 257         return ret;
 258 }
 259
 260 static const struct iio_enum ad5064_powerdown_mode_enum = {
 261         .items = ad5064_powerdown_modes,
 262         .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
 263         .get = ad5064_get_powerdown_mode,
 264         .set = ad5064_set_powerdown_mode,
 265 };
 266
 267 static const struct iio_enum ltc2617_powerdown_mode_enum = {
 268         .items = ltc2617_powerdown_modes,
 269         .num_items = ARRAY_SIZE(ltc2617_powerdown_modes),
 270         .get = ad5064_get_powerdown_mode,
 271         .set = ad5064_set_powerdown_mode,
 272 };
 273
 274 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
 275         uintptr_t private, const struct iio_chan_spec *chan, char *buf)
 276 {
 277         struct ad5064_state *st = iio_priv(indio_dev);
 278
 279         return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
 280 }
 281
 282 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
 283          uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
 284          size_t len)
 285 {
 286         struct ad5064_state *st = iio_priv(indio_dev);
 287         bool pwr_down;
 288         int ret;
 289
 290         ret = strtobool(buf, &pwr_down);
 291         if (ret)
 292                 return ret;
 293
 294         mutex_lock(&indio_dev->mlock);
 295         st->pwr_down[chan->channel] = pwr_down;
 296
 297         ret = ad5064_sync_powerdown_mode(st, chan);
 298         mutex_unlock(&indio_dev->mlock);
 299         return ret ? ret : len;
 300 }
 301
 302 static int ad5064_get_vref(struct ad5064_state *st,
 303         struct iio_chan_spec const *chan)
 304 {
 305         unsigned int i;
 306
 307         if (st->use_internal_vref)
 308                 return st->chip_info->internal_vref;
 309
 310         i = st->chip_info->shared_vref ? 0 : chan->channel;
 311         return regulator_get_voltage(st->vref_reg[i].consumer);
 312 }
 313
 314 static int ad5064_read_raw(struct iio_dev *indio_dev,
 315                            struct iio_chan_spec const *chan,
 316                            int *val,
 317                            int *val2,
 318                            long m)
 319 {
 320         struct ad5064_state *st = iio_priv(indio_dev);
 321         int scale_uv;
 322
 323         switch (m) {
 324         case IIO_CHAN_INFO_RAW:
 325                 *val = st->dac_cache[chan->channel];
 326                 return IIO_VAL_INT;
 327         case IIO_CHAN_INFO_SCALE:
 328                 scale_uv = ad5064_get_vref(st, chan);
 329                 if (scale_uv < 0)
 330                         return scale_uv;
 331
 332                 *val = scale_uv / 1000;
 333                 *val2 = chan->scan_type.realbits;
 334                 return IIO_VAL_FRACTIONAL_LOG2;
 335         default:
 336                 break;
 337         }
 338         return -EINVAL;
 339 }
 340
 341 static int ad5064_write_raw(struct iio_dev *indio_dev,
 342         struct iio_chan_spec const *chan, int val, int val2, long mask)
 343 {
 344         struct ad5064_state *st = iio_priv(indio_dev);
 345         int ret;
 346
 347         switch (mask) {
 348         case IIO_CHAN_INFO_RAW:
 349                 if (val >= (1 << chan->scan_type.realbits) || val < 0)
 350                         return -EINVAL;
 351
 352                 mutex_lock(&indio_dev->mlock);
 353                 ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
 354                                 chan->address, val, chan->scan_type.shift);
 355                 if (ret == 0)
 356                         st->dac_cache[chan->channel] = val;
 357                 mutex_unlock(&indio_dev->mlock);
 358                 break;
 359         default:
 360                 ret = -EINVAL;
 361         }
 362
 363         return ret;
 364 }
 365
 366 static const struct iio_info ad5064_info = {
 367         .read_raw = ad5064_read_raw,
 368         .write_raw = ad5064_write_raw,
 369 };
 370
 371 static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
 372         {
 373                 .name = "powerdown",
 374                 .read = ad5064_read_dac_powerdown,
 375                 .write = ad5064_write_dac_powerdown,
 376                 .shared = IIO_SEPARATE,
 377         },
 378         IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5064_powerdown_mode_enum),
 379         IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
 380         { },
 381 };
 382
 383 static const struct iio_chan_spec_ext_info ltc2617_ext_info[] = {
 384         {
 385                 .name = "powerdown",
 386                 .read = ad5064_read_dac_powerdown,
 387                 .write = ad5064_write_dac_powerdown,
 388                 .shared = IIO_SEPARATE,
 389         },
 390         IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ltc2617_powerdown_mode_enum),
 391         IIO_ENUM_AVAILABLE("powerdown_mode", &ltc2617_powerdown_mode_enum),
 392         { },
 393 };
 394
 395 #define AD5064_CHANNEL(chan, addr, bits, _shift, _ext_info) {           \
 396         .type = IIO_VOLTAGE,                                    \
 397         .indexed = 1,                                           \
 398         .output = 1,                                            \
 399         .channel = (chan),                                      \
 400         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 401         BIT(IIO_CHAN_INFO_SCALE),                                       \
 402         .address = addr,                                        \
 403         .scan_type = {                                          \
 404                 .sign = 'u',                                    \
 405                 .realbits = (bits),                             \
 406                 .storagebits = 16,                              \
 407                 .shift = (_shift),                              \
 408         },                                                      \
 409         .ext_info = (_ext_info),                                \
 410 }
 411
 412 #define DECLARE_AD5064_CHANNELS(name, bits, shift, ext_info) \
 413 const struct iio_chan_spec name[] = { \
 414         AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
 415         AD5064_CHANNEL(1, 1, bits, shift, ext_info), \
 416         AD5064_CHANNEL(2, 2, bits, shift, ext_info), \
 417         AD5064_CHANNEL(3, 3, bits, shift, ext_info), \
 418         AD5064_CHANNEL(4, 4, bits, shift, ext_info), \
 419         AD5064_CHANNEL(5, 5, bits, shift, ext_info), \
 420         AD5064_CHANNEL(6, 6, bits, shift, ext_info), \
 421         AD5064_CHANNEL(7, 7, bits, shift, ext_info), \
 422 }
 423
 424 #define DECLARE_AD5065_CHANNELS(name, bits, shift, ext_info) \
 425 const struct iio_chan_spec name[] = { \
 426         AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
 427         AD5064_CHANNEL(1, 3, bits, shift, ext_info), \
 428 }
 429
 430 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12, 8, ad5064_ext_info);
 431 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14, 6, ad5064_ext_info);
 432 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16, 4, ad5064_ext_info);
 433
 434 static DECLARE_AD5065_CHANNELS(ad5025_channels, 12, 8, ad5064_ext_info);
 435 static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6, ad5064_ext_info);
 436 static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4, ad5064_ext_info);
 437
 438 static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4, ad5064_ext_info);
 439 static DECLARE_AD5064_CHANNELS(ad5645_channels, 14, 2, ad5064_ext_info);
 440 static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0, ad5064_ext_info);
 441
 442 static DECLARE_AD5064_CHANNELS(ltc2607_channels, 16, 0, ltc2617_ext_info);
 443 static DECLARE_AD5064_CHANNELS(ltc2617_channels, 14, 2, ltc2617_ext_info);
 444 static DECLARE_AD5064_CHANNELS(ltc2627_channels, 12, 4, ltc2617_ext_info);
 445 #define ltc2631_12_channels ltc2627_channels
 446 static DECLARE_AD5064_CHANNELS(ltc2631_10_channels, 10, 6, ltc2617_ext_info);
 447 static DECLARE_AD5064_CHANNELS(ltc2631_8_channels, 8, 8, ltc2617_ext_info);
 448
 449 #define LTC2631_INFO(vref, pchannels, nchannels)        \
 450         {                                               \
 451                 .shared_vref = true,                    \
 452                 .internal_vref = vref,                  \
 453                 .channels = pchannels,                  \
 454                 .num_channels = nchannels,              \
 455                 .regmap_type = AD5064_REGMAP_LTC,       \
 456         }
 457
 458
 459 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
 460         [ID_AD5024] = {
 461                 .shared_vref = false,
 462                 .channels = ad5024_channels,
 463                 .num_channels = 4,
 464                 .regmap_type = AD5064_REGMAP_ADI,
 465         },
 466         [ID_AD5025] = {
 467                 .shared_vref = false,
 468                 .channels = ad5025_channels,
 469                 .num_channels = 2,
 470                 .regmap_type = AD5064_REGMAP_ADI,
 471         },
 472         [ID_AD5044] = {
 473                 .shared_vref = false,
 474                 .channels = ad5044_channels,
 475                 .num_channels = 4,
 476                 .regmap_type = AD5064_REGMAP_ADI,
 477         },
 478         [ID_AD5045] = {
 479                 .shared_vref = false,
 480                 .channels = ad5045_channels,
 481                 .num_channels = 2,
 482                 .regmap_type = AD5064_REGMAP_ADI,
 483         },
 484         [ID_AD5064] = {
 485                 .shared_vref = false,
 486                 .channels = ad5064_channels,
 487                 .num_channels = 4,
 488                 .regmap_type = AD5064_REGMAP_ADI,
 489         },
 490         [ID_AD5064_1] = {
 491                 .shared_vref = true,
 492                 .channels = ad5064_channels,
 493                 .num_channels = 4,
 494                 .regmap_type = AD5064_REGMAP_ADI,
 495         },
 496         [ID_AD5065] = {
 497                 .shared_vref = false,
 498                 .channels = ad5065_channels,
 499                 .num_channels = 2,
 500                 .regmap_type = AD5064_REGMAP_ADI,
 501         },
 502         [ID_AD5625] = {
 503                 .shared_vref = true,
 504                 .channels = ad5629_channels,
 505                 .num_channels = 4,
 506                 .regmap_type = AD5064_REGMAP_ADI2
 507         },
 508         [ID_AD5625R_1V25] = {
 509                 .shared_vref = true,
 510                 .internal_vref = 1250000,
 511                 .channels = ad5629_channels,
 512                 .num_channels = 4,
 513                 .regmap_type = AD5064_REGMAP_ADI2
 514         },
 515         [ID_AD5625R_2V5] = {
 516                 .shared_vref = true,
 517                 .internal_vref = 2500000,
 518                 .channels = ad5629_channels,
 519                 .num_channels = 4,
 520                 .regmap_type = AD5064_REGMAP_ADI2
 521         },
 522         [ID_AD5627] = {
 523                 .shared_vref = true,
 524                 .channels = ad5629_channels,
 525                 .num_channels = 2,
 526                 .regmap_type = AD5064_REGMAP_ADI2
 527         },
 528         [ID_AD5627R_1V25] = {
 529                 .shared_vref = true,
 530                 .internal_vref = 1250000,
 531                 .channels = ad5629_channels,
 532                 .num_channels = 2,
 533                 .regmap_type = AD5064_REGMAP_ADI2
 534         },
 535         [ID_AD5627R_2V5] = {
 536                 .shared_vref = true,
 537                 .internal_vref = 2500000,
 538                 .channels = ad5629_channels,
 539                 .num_channels = 2,
 540                 .regmap_type = AD5064_REGMAP_ADI2
 541         },
 542         [ID_AD5628_1] = {
 543                 .shared_vref = true,
 544                 .internal_vref = 2500000,
 545                 .channels = ad5024_channels,
 546                 .num_channels = 8,
 547                 .regmap_type = AD5064_REGMAP_ADI,
 548         },
 549         [ID_AD5628_2] = {
 550                 .shared_vref = true,
 551                 .internal_vref = 5000000,
 552                 .channels = ad5024_channels,
 553                 .num_channels = 8,
 554                 .regmap_type = AD5064_REGMAP_ADI,
 555         },
 556         [ID_AD5629_1] = {
 557                 .shared_vref = true,
 558                 .internal_vref = 2500000,
 559                 .channels = ad5629_channels,
 560                 .num_channels = 8,
 561                 .regmap_type = AD5064_REGMAP_ADI,
 562         },
 563         [ID_AD5629_2] = {
 564                 .shared_vref = true,
 565                 .internal_vref = 5000000,
 566                 .channels = ad5629_channels,
 567                 .num_channels = 8,
 568                 .regmap_type = AD5064_REGMAP_ADI,
 569         },
 570         [ID_AD5645R_1V25] = {
 571                 .shared_vref = true,
 572                 .internal_vref = 1250000,
 573                 .channels = ad5645_channels,
 574                 .num_channels = 4,
 575                 .regmap_type = AD5064_REGMAP_ADI2
 576         },
 577         [ID_AD5645R_2V5] = {
 578                 .shared_vref = true,
 579                 .internal_vref = 2500000,
 580                 .channels = ad5645_channels,
 581                 .num_channels = 4,
 582                 .regmap_type = AD5064_REGMAP_ADI2
 583         },
 584         [ID_AD5647R_1V25] = {
 585                 .shared_vref = true,
 586                 .internal_vref = 1250000,
 587                 .channels = ad5645_channels,
 588                 .num_channels = 2,
 589                 .regmap_type = AD5064_REGMAP_ADI2
 590         },
 591         [ID_AD5647R_2V5] = {
 592                 .shared_vref = true,
 593                 .internal_vref = 2500000,
 594                 .channels = ad5645_channels,
 595                 .num_channels = 2,
 596                 .regmap_type = AD5064_REGMAP_ADI2
 597         },
 598         [ID_AD5648_1] = {
 599                 .shared_vref = true,
 600                 .internal_vref = 2500000,
 601                 .channels = ad5044_channels,
 602                 .num_channels = 8,
 603                 .regmap_type = AD5064_REGMAP_ADI,
 604         },
 605         [ID_AD5648_2] = {
 606                 .shared_vref = true,
 607                 .internal_vref = 5000000,
 608                 .channels = ad5044_channels,
 609                 .num_channels = 8,
 610                 .regmap_type = AD5064_REGMAP_ADI,
 611         },
 612         [ID_AD5665] = {
 613                 .shared_vref = true,
 614                 .channels = ad5669_channels,
 615                 .num_channels = 4,
 616                 .regmap_type = AD5064_REGMAP_ADI2
 617         },
 618         [ID_AD5665R_1V25] = {
 619                 .shared_vref = true,
 620                 .internal_vref = 1250000,
 621                 .channels = ad5669_channels,
 622                 .num_channels = 4,
 623                 .regmap_type = AD5064_REGMAP_ADI2
 624         },
 625         [ID_AD5665R_2V5] = {
 626                 .shared_vref = true,
 627                 .internal_vref = 2500000,
 628                 .channels = ad5669_channels,
 629                 .num_channels = 4,
 630                 .regmap_type = AD5064_REGMAP_ADI2
 631         },
 632         [ID_AD5666_1] = {
 633                 .shared_vref = true,
 634                 .internal_vref = 2500000,
 635                 .channels = ad5064_channels,
 636                 .num_channels = 4,
 637                 .regmap_type = AD5064_REGMAP_ADI,
 638         },
 639         [ID_AD5666_2] = {
 640                 .shared_vref = true,
 641                 .internal_vref = 5000000,
 642                 .channels = ad5064_channels,
 643                 .num_channels = 4,
 644                 .regmap_type = AD5064_REGMAP_ADI,
 645         },
 646         [ID_AD5667] = {
 647                 .shared_vref = true,
 648                 .channels = ad5669_channels,
 649                 .num_channels = 2,
 650                 .regmap_type = AD5064_REGMAP_ADI2
 651         },
 652         [ID_AD5667R_1V25] = {
 653                 .shared_vref = true,
 654                 .internal_vref = 1250000,
 655                 .channels = ad5669_channels,
 656                 .num_channels = 2,
 657                 .regmap_type = AD5064_REGMAP_ADI2
 658         },
 659         [ID_AD5667R_2V5] = {
 660                 .shared_vref = true,
 661                 .internal_vref = 2500000,
 662                 .channels = ad5669_channels,
 663                 .num_channels = 2,
 664                 .regmap_type = AD5064_REGMAP_ADI2
 665         },
 666         [ID_AD5668_1] = {
 667                 .shared_vref = true,
 668                 .internal_vref = 2500000,
 669                 .channels = ad5064_channels,
 670                 .num_channels = 8,
 671                 .regmap_type = AD5064_REGMAP_ADI,
 672         },
 673         [ID_AD5668_2] = {
 674                 .shared_vref = true,
 675                 .internal_vref = 5000000,
 676                 .channels = ad5064_channels,
 677                 .num_channels = 8,
 678                 .regmap_type = AD5064_REGMAP_ADI,
 679         },
 680         [ID_AD5669_1] = {
 681                 .shared_vref = true,
 682                 .internal_vref = 2500000,
 683                 .channels = ad5669_channels,
 684                 .num_channels = 8,
 685                 .regmap_type = AD5064_REGMAP_ADI,
 686         },
 687         [ID_AD5669_2] = {
 688                 .shared_vref = true,
 689                 .internal_vref = 5000000,
 690                 .channels = ad5669_channels,
 691                 .num_channels = 8,
 692                 .regmap_type = AD5064_REGMAP_ADI,
 693         },
 694         [ID_LTC2606] = {
 695                 .shared_vref = true,
 696                 .internal_vref = 0,
 697                 .channels = ltc2607_channels,
 698                 .num_channels = 1,
 699                 .regmap_type = AD5064_REGMAP_LTC,
 700         },
 701         [ID_LTC2607] = {
 702                 .shared_vref = true,
 703                 .internal_vref = 0,
 704                 .channels = ltc2607_channels,
 705                 .num_channels = 2,
 706                 .regmap_type = AD5064_REGMAP_LTC,
 707         },
 708         [ID_LTC2609] = {
 709                 .shared_vref = false,
 710                 .internal_vref = 0,
 711                 .channels = ltc2607_channels,
 712                 .num_channels = 4,
 713                 .regmap_type = AD5064_REGMAP_LTC,
 714         },
 715         [ID_LTC2616] = {
 716                 .shared_vref = true,
 717                 .internal_vref = 0,
 718                 .channels = ltc2617_channels,
 719                 .num_channels = 1,
 720                 .regmap_type = AD5064_REGMAP_LTC,
 721         },
 722         [ID_LTC2617] = {
 723                 .shared_vref = true,
 724                 .internal_vref = 0,
 725                 .channels = ltc2617_channels,
 726                 .num_channels = 2,
 727                 .regmap_type = AD5064_REGMAP_LTC,
 728         },
 729         [ID_LTC2619] = {
 730                 .shared_vref = false,
 731                 .internal_vref = 0,
 732                 .channels = ltc2617_channels,
 733                 .num_channels = 4,
 734                 .regmap_type = AD5064_REGMAP_LTC,
 735         },
 736         [ID_LTC2626] = {
 737                 .shared_vref = true,
 738                 .internal_vref = 0,
 739                 .channels = ltc2627_channels,
 740                 .num_channels = 1,
 741                 .regmap_type = AD5064_REGMAP_LTC,
 742         },
 743         [ID_LTC2627] = {
 744                 .shared_vref = true,
 745                 .internal_vref = 0,
 746                 .channels = ltc2627_channels,
 747                 .num_channels = 2,
 748                 .regmap_type = AD5064_REGMAP_LTC,
 749         },
 750         [ID_LTC2629] = {
 751                 .shared_vref = false,
 752                 .internal_vref = 0,
 753                 .channels = ltc2627_channels,
 754                 .num_channels = 4,
 755                 .regmap_type = AD5064_REGMAP_LTC,
 756         },
 757         [ID_LTC2631_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 1),
 758         [ID_LTC2631_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 1),
 759         [ID_LTC2631_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 1),
 760         [ID_LTC2631_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 1),
 761         [ID_LTC2631_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 1),
 762         [ID_LTC2631_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 1),
 763         [ID_LTC2633_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 2),
 764         [ID_LTC2633_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 2),
 765         [ID_LTC2633_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 2),
 766         [ID_LTC2633_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 2),
 767         [ID_LTC2633_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 2),
 768         [ID_LTC2633_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 2),
 769         [ID_LTC2635_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 4),
 770         [ID_LTC2635_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 4),
 771         [ID_LTC2635_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 4),
 772         [ID_LTC2635_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 4),
 773         [ID_LTC2635_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 4),
 774         [ID_LTC2635_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 4),
 775 };
 776
 777 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
 778 {
 779         return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
 780 }
 781
 782 static const char * const ad5064_vref_names[] = {
 783         "vrefA",
 784         "vrefB",
 785         "vrefC",
 786         "vrefD",
 787 };
 788
 789 static const char * const ad5064_vref_name(struct ad5064_state *st,
 790         unsigned int vref)
 791 {
 792         return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
 793 }
 794
 795 static int ad5064_set_config(struct ad5064_state *st, unsigned int val)
 796 {
 797         unsigned int cmd;
 798
 799         switch (st->chip_info->regmap_type) {
 800         case AD5064_REGMAP_ADI2:
 801                 cmd = AD5064_CMD_CONFIG_V2;
 802                 break;
 803         default:
 804                 cmd = AD5064_CMD_CONFIG;
 805                 break;
 806         }
 807
 808         return ad5064_write(st, cmd, 0, val, 0);
 809 }
 810
 811 static int ad5064_probe(struct device *dev, enum ad5064_type type,
 812                         const char *name, ad5064_write_func write)
 813 {
 814         struct iio_dev *indio_dev;
 815         struct ad5064_state *st;
 816         unsigned int midscale;
 817         unsigned int i;
 818         int ret;
 819
 820         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 821         if (indio_dev == NULL)
 822                 return  -ENOMEM;
 823
 824         st = iio_priv(indio_dev);
 825         dev_set_drvdata(dev, indio_dev);
 826
 827         st->chip_info = &ad5064_chip_info_tbl[type];
 828         st->dev = dev;
 829         st->write = write;
 830
 831         for (i = 0; i < ad5064_num_vref(st); ++i)
 832                 st->vref_reg[i].supply = ad5064_vref_name(st, i);
 833
 834         ret = devm_regulator_bulk_get(dev, ad5064_num_vref(st),
 835                 st->vref_reg);
 836         if (ret) {
 837                 if (!st->chip_info->internal_vref)
 838                         return ret;
 839                 st->use_internal_vref = true;
 840                 ret = ad5064_set_config(st, AD5064_CONFIG_INT_VREF_ENABLE);
 841                 if (ret) {
 842                         dev_err(dev, "Failed to enable internal vref: %d\n",
 843                                 ret);
 844                         return ret;
 845                 }
 846         } else {
 847                 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
 848                 if (ret)
 849                         return ret;
 850         }
 851
 852         indio_dev->dev.parent = dev;
 853         indio_dev->name = name;
 854         indio_dev->info = &ad5064_info;
 855         indio_dev->modes = INDIO_DIRECT_MODE;
 856         indio_dev->channels = st->chip_info->channels;
 857         indio_dev->num_channels = st->chip_info->num_channels;
 858
 859         midscale = (1 << indio_dev->channels[0].scan_type.realbits) /  2;
 860
 861         for (i = 0; i < st->chip_info->num_channels; ++i) {
 862                 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
 863                 st->dac_cache[i] = midscale;
 864         }
 865
 866         ret = iio_device_register(indio_dev);
 867         if (ret)
 868                 goto error_disable_reg;
 869
 870         return 0;
 871
 872 error_disable_reg:
 873         if (!st->use_internal_vref)
 874                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 875
 876         return ret;
 877 }
 878
 879 static int ad5064_remove(struct device *dev)
 880 {
 881         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 882         struct ad5064_state *st = iio_priv(indio_dev);
 883
 884         iio_device_unregister(indio_dev);
 885
 886         if (!st->use_internal_vref)
 887                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 888
 889         return 0;
 890 }
 891
 892 #if IS_ENABLED(CONFIG_SPI_MASTER)
 893
 894 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
 895         unsigned int addr, unsigned int val)
 896 {
 897         struct spi_device *spi = to_spi_device(st->dev);
 898
 899         st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
 900         return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
 901 }
 902
 903 static int ad5064_spi_probe(struct spi_device *spi)
 904 {
 905         const struct spi_device_id *id = spi_get_device_id(spi);
 906
 907         return ad5064_probe(&spi->dev, id->driver_data, id->name,
 908                                 ad5064_spi_write);
 909 }
 910
 911 static int ad5064_spi_remove(struct spi_device *spi)
 912 {
 913         return ad5064_remove(&spi->dev);
 914 }
 915
 916 static const struct spi_device_id ad5064_spi_ids[] = {
 917         {"ad5024", ID_AD5024},
 918         {"ad5025", ID_AD5025},
 919         {"ad5044", ID_AD5044},
 920         {"ad5045", ID_AD5045},
 921         {"ad5064", ID_AD5064},
 922         {"ad5064-1", ID_AD5064_1},
 923         {"ad5065", ID_AD5065},
 924         {"ad5628-1", ID_AD5628_1},
 925         {"ad5628-2", ID_AD5628_2},
 926         {"ad5648-1", ID_AD5648_1},
 927         {"ad5648-2", ID_AD5648_2},
 928         {"ad5666-1", ID_AD5666_1},
 929         {"ad5666-2", ID_AD5666_2},
 930         {"ad5668-1", ID_AD5668_1},
 931         {"ad5668-2", ID_AD5668_2},
 932         {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
 933         {}
 934 };
 935 MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
 936
 937 static struct spi_driver ad5064_spi_driver = {
 938         .driver = {
 939                    .name = "ad5064",
 940         },
 941         .probe = ad5064_spi_probe,
 942         .remove = ad5064_spi_remove,
 943         .id_table = ad5064_spi_ids,
 944 };
 945
 946 static int __init ad5064_spi_register_driver(void)
 947 {
 948         return spi_register_driver(&ad5064_spi_driver);
 949 }
 950
 951 static void ad5064_spi_unregister_driver(void)
 952 {
 953         spi_unregister_driver(&ad5064_spi_driver);
 954 }
 955
 956 #else
 957
 958 static inline int ad5064_spi_register_driver(void) { return 0; }
 959 static inline void ad5064_spi_unregister_driver(void) { }
 960
 961 #endif
 962
 963 #if IS_ENABLED(CONFIG_I2C)
 964
 965 static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
 966         unsigned int addr, unsigned int val)
 967 {
 968         struct i2c_client *i2c = to_i2c_client(st->dev);
 969         unsigned int cmd_shift;
 970         int ret;
 971
 972         switch (st->chip_info->regmap_type) {
 973         case AD5064_REGMAP_ADI2:
 974                 cmd_shift = 3;
 975                 break;
 976         default:
 977                 cmd_shift = 4;
 978                 break;
 979         }
 980
 981         st->data.i2c[0] = (cmd << cmd_shift) | addr;
 982         put_unaligned_be16(val, &st->data.i2c[1]);
 983
 984         ret = i2c_master_send(i2c, st->data.i2c, 3);
 985         if (ret < 0)
 986                 return ret;
 987
 988         return 0;
 989 }
 990
 991 static int ad5064_i2c_probe(struct i2c_client *i2c,
 992         const struct i2c_device_id *id)
 993 {
 994         return ad5064_probe(&i2c->dev, id->driver_data, id->name,
 995                                                 ad5064_i2c_write);
 996 }
 997
 998 static int ad5064_i2c_remove(struct i2c_client *i2c)
 999 {
1000         return ad5064_remove(&i2c->dev);
1001 }
1002
1003 static const struct i2c_device_id ad5064_i2c_ids[] = {
1004         {"ad5625", ID_AD5625 },
1005         {"ad5625r-1v25", ID_AD5625R_1V25 },
1006         {"ad5625r-2v5", ID_AD5625R_2V5 },
1007         {"ad5627", ID_AD5627 },
1008         {"ad5627r-1v25", ID_AD5627R_1V25 },
1009         {"ad5627r-2v5", ID_AD5627R_2V5 },
1010         {"ad5629-1", ID_AD5629_1},
1011         {"ad5629-2", ID_AD5629_2},
1012         {"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */
1013         {"ad5645r-1v25", ID_AD5645R_1V25 },
1014         {"ad5645r-2v5", ID_AD5645R_2V5 },
1015         {"ad5665", ID_AD5665 },
1016         {"ad5665r-1v25", ID_AD5665R_1V25 },
1017         {"ad5665r-2v5", ID_AD5665R_2V5 },
1018         {"ad5667", ID_AD5667 },
1019         {"ad5667r-1v25", ID_AD5667R_1V25 },
1020         {"ad5667r-2v5", ID_AD5667R_2V5 },
1021         {"ad5669-1", ID_AD5669_1},
1022         {"ad5669-2", ID_AD5669_2},
1023         {"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */
1024         {"ltc2606", ID_LTC2606},
1025         {"ltc2607", ID_LTC2607},
1026         {"ltc2609", ID_LTC2609},
1027         {"ltc2616", ID_LTC2616},
1028         {"ltc2617", ID_LTC2617},
1029         {"ltc2619", ID_LTC2619},
1030         {"ltc2626", ID_LTC2626},
1031         {"ltc2627", ID_LTC2627},
1032         {"ltc2629", ID_LTC2629},
1033         {"ltc2631-l12", ID_LTC2631_L12},
1034         {"ltc2631-h12", ID_LTC2631_H12},
1035         {"ltc2631-l10", ID_LTC2631_L10},
1036         {"ltc2631-h10", ID_LTC2631_H10},
1037         {"ltc2631-l8", ID_LTC2631_L8},
1038         {"ltc2631-h8", ID_LTC2631_H8},
1039         {"ltc2633-l12", ID_LTC2633_L12},
1040         {"ltc2633-h12", ID_LTC2633_H12},
1041         {"ltc2633-l10", ID_LTC2633_L10},
1042         {"ltc2633-h10", ID_LTC2633_H10},
1043         {"ltc2633-l8", ID_LTC2633_L8},
1044         {"ltc2633-h8", ID_LTC2633_H8},
1045         {"ltc2635-l12", ID_LTC2635_L12},
1046         {"ltc2635-h12", ID_LTC2635_H12},
1047         {"ltc2635-l10", ID_LTC2635_L10},
1048         {"ltc2635-h10", ID_LTC2635_H10},
1049         {"ltc2635-l8", ID_LTC2635_L8},
1050         {"ltc2635-h8", ID_LTC2635_H8},
1051         {}
1052 };
1053 MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
1054
1055 static struct i2c_driver ad5064_i2c_driver = {
1056         .driver = {
1057                    .name = "ad5064",
1058         },
1059         .probe = ad5064_i2c_probe,
1060         .remove = ad5064_i2c_remove,
1061         .id_table = ad5064_i2c_ids,
1062 };
1063
1064 static int __init ad5064_i2c_register_driver(void)
1065 {
1066         return i2c_add_driver(&ad5064_i2c_driver);
1067 }
1068
1069 static void __exit ad5064_i2c_unregister_driver(void)
1070 {
1071         i2c_del_driver(&ad5064_i2c_driver);
1072 }
1073
1074 #else
1075
1076 static inline int ad5064_i2c_register_driver(void) { return 0; }
1077 static inline void ad5064_i2c_unregister_driver(void) { }
1078
1079 #endif
1080
1081 static int __init ad5064_init(void)
1082 {
1083         int ret;
1084
1085         ret = ad5064_spi_register_driver();
1086         if (ret)
1087                 return ret;
1088
1089         ret = ad5064_i2c_register_driver();
1090         if (ret) {
1091                 ad5064_spi_unregister_driver();
1092                 return ret;
1093         }
1094
1095         return 0;
1096 }
1097 module_init(ad5064_init);
1098
1099 static void __exit ad5064_exit(void)
1100 {
1101         ad5064_i2c_unregister_driver();
1102         ad5064_spi_unregister_driver();
1103 }
1104 module_exit(ad5064_exit);
1105
1106 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1107 MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
1108 MODULE_LICENSE("GPL v2");