drivers/iio/dac/ad5360.c

   1 /*
   2  * Analog devices AD5360, AD5361, AD5362, AD5363, AD5370, AD5371, AD5373
   3  * multi-channel Digital to Analog Converters driver
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  *
   7  * Licensed under the GPL-2.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/err.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/slab.h>
  16 #include <linux/sysfs.h>
  17 #include <linux/regulator/consumer.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21
  22 #define AD5360_CMD(x)                           ((x) << 22)
  23 #define AD5360_ADDR(x)                          ((x) << 16)
  24
  25 #define AD5360_READBACK_TYPE(x)                 ((x) << 13)
  26 #define AD5360_READBACK_ADDR(x)                 ((x) << 7)
  27
  28 #define AD5360_CHAN_ADDR(chan)                  ((chan) + 0x8)
  29
  30 #define AD5360_CMD_WRITE_DATA                   0x3
  31 #define AD5360_CMD_WRITE_OFFSET                 0x2
  32 #define AD5360_CMD_WRITE_GAIN                   0x1
  33 #define AD5360_CMD_SPECIAL_FUNCTION             0x0
  34
  35 /* Special function register addresses */
  36 #define AD5360_REG_SF_NOP                       0x0
  37 #define AD5360_REG_SF_CTRL                      0x1
  38 #define AD5360_REG_SF_OFS(x)                    (0x2 + (x))
  39 #define AD5360_REG_SF_READBACK                  0x5
  40
  41 #define AD5360_SF_CTRL_PWR_DOWN                 BIT(0)
  42
  43 #define AD5360_READBACK_X1A                     0x0
  44 #define AD5360_READBACK_X1B                     0x1
  45 #define AD5360_READBACK_OFFSET                  0x2
  46 #define AD5360_READBACK_GAIN                    0x3
  47 #define AD5360_READBACK_SF                      0x4
  48
  49
  50 /**
  51  * struct ad5360_chip_info - chip specific information
  52  * @channel_template:   channel specification template
  53  * @num_channels:       number of channels
  54  * @channels_per_group: number of channels per group
  55  * @num_vrefs:          number of vref supplies for the chip
  56 */
  57
  58 struct ad5360_chip_info {
  59         struct iio_chan_spec    channel_template;
  60         unsigned int            num_channels;
  61         unsigned int            channels_per_group;
  62         unsigned int            num_vrefs;
  63 };
  64
  65 /**
  66  * struct ad5360_state - driver instance specific data
  67  * @spi:                spi_device
  68  * @chip_info:          chip model specific constants, available modes etc
  69  * @vref_reg:           vref supply regulators
  70  * @ctrl:               control register cache
  71  * @data:               spi transfer buffers
  72  */
  73
  74 struct ad5360_state {
  75         struct spi_device               *spi;
  76         const struct ad5360_chip_info   *chip_info;
  77         struct regulator_bulk_data      vref_reg[3];
  78         unsigned int                    ctrl;
  79
  80         /*
  81          * DMA (thus cache coherency maintenance) requires the
  82          * transfer buffers to live in their own cache lines.
  83          */
  84         union {
  85                 __be32 d32;
  86                 u8 d8[4];
  87         } data[2] ____cacheline_aligned;
  88 };
  89
  90 enum ad5360_type {
  91         ID_AD5360,
  92         ID_AD5361,
  93         ID_AD5362,
  94         ID_AD5363,
  95         ID_AD5370,
  96         ID_AD5371,
  97         ID_AD5372,
  98         ID_AD5373,
  99 };
 100
 101 #define AD5360_CHANNEL(bits) {                                  \
 102         .type = IIO_VOLTAGE,                                    \
 103         .indexed = 1,                                           \
 104         .output = 1,                                            \
 105         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 106                 BIT(IIO_CHAN_INFO_SCALE) |                              \
 107                 BIT(IIO_CHAN_INFO_OFFSET) |                             \
 108                 BIT(IIO_CHAN_INFO_CALIBSCALE) |                 \
 109                 BIT(IIO_CHAN_INFO_CALIBBIAS),                   \
 110         .scan_type = IIO_ST('u', (bits), 16, 16 - (bits))       \
 111 }
 112
 113 static const struct ad5360_chip_info ad5360_chip_info_tbl[] = {
 114         [ID_AD5360] = {
 115                 .channel_template = AD5360_CHANNEL(16),
 116                 .num_channels = 16,
 117                 .channels_per_group = 8,
 118                 .num_vrefs = 2,
 119         },
 120         [ID_AD5361] = {
 121                 .channel_template = AD5360_CHANNEL(14),
 122                 .num_channels = 16,
 123                 .channels_per_group = 8,
 124                 .num_vrefs = 2,
 125         },
 126         [ID_AD5362] = {
 127                 .channel_template = AD5360_CHANNEL(16),
 128                 .num_channels = 8,
 129                 .channels_per_group = 4,
 130                 .num_vrefs = 2,
 131         },
 132         [ID_AD5363] = {
 133                 .channel_template = AD5360_CHANNEL(14),
 134                 .num_channels = 8,
 135                 .channels_per_group = 4,
 136                 .num_vrefs = 2,
 137         },
 138         [ID_AD5370] = {
 139                 .channel_template = AD5360_CHANNEL(16),
 140                 .num_channels = 40,
 141                 .channels_per_group = 8,
 142                 .num_vrefs = 2,
 143         },
 144         [ID_AD5371] = {
 145                 .channel_template = AD5360_CHANNEL(14),
 146                 .num_channels = 40,
 147                 .channels_per_group = 8,
 148                 .num_vrefs = 3,
 149         },
 150         [ID_AD5372] = {
 151                 .channel_template = AD5360_CHANNEL(16),
 152                 .num_channels = 32,
 153                 .channels_per_group = 8,
 154                 .num_vrefs = 2,
 155         },
 156         [ID_AD5373] = {
 157                 .channel_template = AD5360_CHANNEL(14),
 158                 .num_channels = 32,
 159                 .channels_per_group = 8,
 160                 .num_vrefs = 2,
 161         },
 162 };
 163
 164 static unsigned int ad5360_get_channel_vref_index(struct ad5360_state *st,
 165         unsigned int channel)
 166 {
 167         unsigned int i;
 168
 169         /* The first groups have their own vref, while the remaining groups
 170          * share the last vref */
 171         i = channel / st->chip_info->channels_per_group;
 172         if (i >= st->chip_info->num_vrefs)
 173                 i = st->chip_info->num_vrefs - 1;
 174
 175         return i;
 176 }
 177
 178 static int ad5360_get_channel_vref(struct ad5360_state *st,
 179         unsigned int channel)
 180 {
 181         unsigned int i = ad5360_get_channel_vref_index(st, channel);
 182
 183         return regulator_get_voltage(st->vref_reg[i].consumer);
 184 }
 185
 186
 187 static int ad5360_write_unlocked(struct iio_dev *indio_dev,
 188         unsigned int cmd, unsigned int addr, unsigned int val,
 189         unsigned int shift)
 190 {
 191         struct ad5360_state *st = iio_priv(indio_dev);
 192
 193         val <<= shift;
 194         val |= AD5360_CMD(cmd) | AD5360_ADDR(addr);
 195         st->data[0].d32 = cpu_to_be32(val);
 196
 197         return spi_write(st->spi, &st->data[0].d8[1], 3);
 198 }
 199
 200 static int ad5360_write(struct iio_dev *indio_dev, unsigned int cmd,
 201         unsigned int addr, unsigned int val, unsigned int shift)
 202 {
 203         int ret;
 204
 205         mutex_lock(&indio_dev->mlock);
 206         ret = ad5360_write_unlocked(indio_dev, cmd, addr, val, shift);
 207         mutex_unlock(&indio_dev->mlock);
 208
 209         return ret;
 210 }
 211
 212 static int ad5360_read(struct iio_dev *indio_dev, unsigned int type,
 213         unsigned int addr)
 214 {
 215         struct ad5360_state *st = iio_priv(indio_dev);
 216         int ret;
 217         struct spi_transfer t[] = {
 218                 {
 219                         .tx_buf = &st->data[0].d8[1],
 220                         .len = 3,
 221                         .cs_change = 1,
 222                 }, {
 223                         .rx_buf = &st->data[1].d8[1],
 224                         .len = 3,
 225                 },
 226         };
 227
 228         mutex_lock(&indio_dev->mlock);
 229
 230         st->data[0].d32 = cpu_to_be32(AD5360_CMD(AD5360_CMD_SPECIAL_FUNCTION) |
 231                 AD5360_ADDR(AD5360_REG_SF_READBACK) |
 232                 AD5360_READBACK_TYPE(type) |
 233                 AD5360_READBACK_ADDR(addr));
 234
 235         ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
 236         if (ret >= 0)
 237                 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
 238
 239         mutex_unlock(&indio_dev->mlock);
 240
 241         return ret;
 242 }
 243
 244 static ssize_t ad5360_read_dac_powerdown(struct device *dev,
 245                                            struct device_attribute *attr,
 246                                            char *buf)
 247 {
 248         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 249         struct ad5360_state *st = iio_priv(indio_dev);
 250
 251         return sprintf(buf, "%d\n", (bool)(st->ctrl & AD5360_SF_CTRL_PWR_DOWN));
 252 }
 253
 254 static int ad5360_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
 255         unsigned int clr)
 256 {
 257         struct ad5360_state *st = iio_priv(indio_dev);
 258         unsigned int ret;
 259
 260         mutex_lock(&indio_dev->mlock);
 261
 262         st->ctrl |= set;
 263         st->ctrl &= ~clr;
 264
 265         ret = ad5360_write_unlocked(indio_dev, AD5360_CMD_SPECIAL_FUNCTION,
 266                         AD5360_REG_SF_CTRL, st->ctrl, 0);
 267
 268         mutex_unlock(&indio_dev->mlock);
 269
 270         return ret;
 271 }
 272
 273 static ssize_t ad5360_write_dac_powerdown(struct device *dev,
 274         struct device_attribute *attr, const char *buf, size_t len)
 275 {
 276         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 277         bool pwr_down;
 278         int ret;
 279
 280         ret = strtobool(buf, &pwr_down);
 281         if (ret)
 282                 return ret;
 283
 284         if (pwr_down)
 285                 ret = ad5360_update_ctrl(indio_dev, AD5360_SF_CTRL_PWR_DOWN, 0);
 286         else
 287                 ret = ad5360_update_ctrl(indio_dev, 0, AD5360_SF_CTRL_PWR_DOWN);
 288
 289         return ret ? ret : len;
 290 }
 291
 292 static IIO_DEVICE_ATTR(out_voltage_powerdown,
 293                         S_IRUGO | S_IWUSR,
 294                         ad5360_read_dac_powerdown,
 295                         ad5360_write_dac_powerdown, 0);
 296
 297 static struct attribute *ad5360_attributes[] = {
 298         &iio_dev_attr_out_voltage_powerdown.dev_attr.attr,
 299         NULL,
 300 };
 301
 302 static const struct attribute_group ad5360_attribute_group = {
 303         .attrs = ad5360_attributes,
 304 };
 305
 306 static int ad5360_write_raw(struct iio_dev *indio_dev,
 307                                struct iio_chan_spec const *chan,
 308                                int val,
 309                                int val2,
 310                                long mask)
 311 {
 312         struct ad5360_state *st = iio_priv(indio_dev);
 313         int max_val = (1 << chan->scan_type.realbits);
 314         unsigned int ofs_index;
 315
 316         switch (mask) {
 317         case IIO_CHAN_INFO_RAW:
 318                 if (val >= max_val || val < 0)
 319                         return -EINVAL;
 320
 321                 return ad5360_write(indio_dev, AD5360_CMD_WRITE_DATA,
 322                                  chan->address, val, chan->scan_type.shift);
 323
 324         case IIO_CHAN_INFO_CALIBBIAS:
 325                 if (val >= max_val || val < 0)
 326                         return -EINVAL;
 327
 328                 return ad5360_write(indio_dev, AD5360_CMD_WRITE_OFFSET,
 329                                  chan->address, val, chan->scan_type.shift);
 330
 331         case IIO_CHAN_INFO_CALIBSCALE:
 332                 if (val >= max_val || val < 0)
 333                         return -EINVAL;
 334
 335                 return ad5360_write(indio_dev, AD5360_CMD_WRITE_GAIN,
 336                                  chan->address, val, chan->scan_type.shift);
 337
 338         case IIO_CHAN_INFO_OFFSET:
 339                 if (val <= -max_val || val > 0)
 340                         return -EINVAL;
 341
 342                 val = -val;
 343
 344                 /* offset is supposed to have the same scale as raw, but it
 345                  * is always 14bits wide, so on a chip where the raw value has
 346                  * more bits, we need to shift offset. */
 347                 val >>= (chan->scan_type.realbits - 14);
 348
 349                 /* There is one DAC offset register per vref. Changing one
 350                  * channels offset will also change the offset for all other
 351                  * channels which share the same vref supply. */
 352                 ofs_index = ad5360_get_channel_vref_index(st, chan->channel);
 353                 return ad5360_write(indio_dev, AD5360_CMD_SPECIAL_FUNCTION,
 354                                  AD5360_REG_SF_OFS(ofs_index), val, 0);
 355         default:
 356                 break;
 357         }
 358
 359         return -EINVAL;
 360 }
 361
 362 static int ad5360_read_raw(struct iio_dev *indio_dev,
 363                            struct iio_chan_spec const *chan,
 364                            int *val,
 365                            int *val2,
 366                            long m)
 367 {
 368         struct ad5360_state *st = iio_priv(indio_dev);
 369         unsigned int ofs_index;
 370         int scale_uv;
 371         int ret;
 372
 373         switch (m) {
 374         case IIO_CHAN_INFO_RAW:
 375                 ret = ad5360_read(indio_dev, AD5360_READBACK_X1A,
 376                         chan->address);
 377                 if (ret < 0)
 378                         return ret;
 379                 *val = ret >> chan->scan_type.shift;
 380                 return IIO_VAL_INT;
 381         case IIO_CHAN_INFO_SCALE:
 382                 /* vout = 4 * vref * dac_code */
 383                 scale_uv = ad5360_get_channel_vref(st, chan->channel) * 4 * 100;
 384                 if (scale_uv < 0)
 385                         return scale_uv;
 386
 387                 scale_uv >>= (chan->scan_type.realbits);
 388                 *val =  scale_uv / 100000;
 389                 *val2 = (scale_uv % 100000) * 10;
 390                 return IIO_VAL_INT_PLUS_MICRO;
 391         case IIO_CHAN_INFO_CALIBBIAS:
 392                 ret = ad5360_read(indio_dev, AD5360_READBACK_OFFSET,
 393                         chan->address);
 394                 if (ret < 0)
 395                         return ret;
 396                 *val = ret;
 397                 return IIO_VAL_INT;
 398         case IIO_CHAN_INFO_CALIBSCALE:
 399                 ret = ad5360_read(indio_dev, AD5360_READBACK_GAIN,
 400                         chan->address);
 401                 if (ret < 0)
 402                         return ret;
 403                 *val = ret;
 404                 return IIO_VAL_INT;
 405         case IIO_CHAN_INFO_OFFSET:
 406                 ofs_index = ad5360_get_channel_vref_index(st, chan->channel);
 407                 ret = ad5360_read(indio_dev, AD5360_READBACK_SF,
 408                         AD5360_REG_SF_OFS(ofs_index));
 409                 if (ret < 0)
 410                         return ret;
 411
 412                 ret <<= (chan->scan_type.realbits - 14);
 413                 *val = -ret;
 414                 return IIO_VAL_INT;
 415         }
 416
 417         return -EINVAL;
 418 }
 419
 420 static const struct iio_info ad5360_info = {
 421         .read_raw = ad5360_read_raw,
 422         .write_raw = ad5360_write_raw,
 423         .attrs = &ad5360_attribute_group,
 424         .driver_module = THIS_MODULE,
 425 };
 426
 427 static const char * const ad5360_vref_name[] = {
 428          "vref0", "vref1", "vref2"
 429 };
 430
 431 static int ad5360_alloc_channels(struct iio_dev *indio_dev)
 432 {
 433         struct ad5360_state *st = iio_priv(indio_dev);
 434         struct iio_chan_spec *channels;
 435         unsigned int i;
 436
 437         channels = kcalloc(st->chip_info->num_channels,
 438                            sizeof(struct iio_chan_spec), GFP_KERNEL);
 439
 440         if (!channels)
 441                 return -ENOMEM;
 442
 443         for (i = 0; i < st->chip_info->num_channels; ++i) {
 444                 channels[i] = st->chip_info->channel_template;
 445                 channels[i].channel = i;
 446                 channels[i].address = AD5360_CHAN_ADDR(i);
 447         }
 448
 449         indio_dev->channels = channels;
 450
 451         return 0;
 452 }
 453
 454 static int ad5360_probe(struct spi_device *spi)
 455 {
 456         enum ad5360_type type = spi_get_device_id(spi)->driver_data;
 457         struct iio_dev *indio_dev;
 458         struct ad5360_state *st;
 459         unsigned int i;
 460         int ret;
 461
 462         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 463         if (indio_dev == NULL) {
 464                 dev_err(&spi->dev, "Failed to allocate iio device\n");
 465                 return  -ENOMEM;
 466         }
 467
 468         st = iio_priv(indio_dev);
 469         spi_set_drvdata(spi, indio_dev);
 470
 471         st->chip_info = &ad5360_chip_info_tbl[type];
 472         st->spi = spi;
 473
 474         indio_dev->dev.parent = &spi->dev;
 475         indio_dev->name = spi_get_device_id(spi)->name;
 476         indio_dev->info = &ad5360_info;
 477         indio_dev->modes = INDIO_DIRECT_MODE;
 478         indio_dev->num_channels = st->chip_info->num_channels;
 479
 480         ret = ad5360_alloc_channels(indio_dev);
 481         if (ret) {
 482                 dev_err(&spi->dev, "Failed to allocate channel spec: %d\n", ret);
 483                 return ret;
 484         }
 485
 486         for (i = 0; i < st->chip_info->num_vrefs; ++i)
 487                 st->vref_reg[i].supply = ad5360_vref_name[i];
 488
 489         ret = devm_regulator_bulk_get(&st->spi->dev, st->chip_info->num_vrefs,
 490                 st->vref_reg);
 491         if (ret) {
 492                 dev_err(&spi->dev, "Failed to request vref regulators: %d\n", ret);
 493                 goto error_free_channels;
 494         }
 495
 496         ret = regulator_bulk_enable(st->chip_info->num_vrefs, st->vref_reg);
 497         if (ret) {
 498                 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n", ret);
 499                 goto error_free_channels;
 500         }
 501
 502         ret = iio_device_register(indio_dev);
 503         if (ret) {
 504                 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
 505                 goto error_disable_reg;
 506         }
 507
 508         return 0;
 509
 510 error_disable_reg:
 511         regulator_bulk_disable(st->chip_info->num_vrefs, st->vref_reg);
 512 error_free_channels:
 513         kfree(indio_dev->channels);
 514
 515         return ret;
 516 }
 517
 518 static int ad5360_remove(struct spi_device *spi)
 519 {
 520         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 521         struct ad5360_state *st = iio_priv(indio_dev);
 522
 523         iio_device_unregister(indio_dev);
 524
 525         kfree(indio_dev->channels);
 526
 527         regulator_bulk_disable(st->chip_info->num_vrefs, st->vref_reg);
 528
 529         return 0;
 530 }
 531
 532 static const struct spi_device_id ad5360_ids[] = {
 533         { "ad5360", ID_AD5360 },
 534         { "ad5361", ID_AD5361 },
 535         { "ad5362", ID_AD5362 },
 536         { "ad5363", ID_AD5363 },
 537         { "ad5370", ID_AD5370 },
 538         { "ad5371", ID_AD5371 },
 539         { "ad5372", ID_AD5372 },
 540         { "ad5373", ID_AD5373 },
 541         {}
 542 };
 543 MODULE_DEVICE_TABLE(spi, ad5360_ids);
 544
 545 static struct spi_driver ad5360_driver = {
 546         .driver = {
 547                    .name = "ad5360",
 548                    .owner = THIS_MODULE,
 549         },
 550         .probe = ad5360_probe,
 551         .remove = ad5360_remove,
 552         .id_table = ad5360_ids,
 553 };
 554 module_spi_driver(ad5360_driver);
 555
 556 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 557 MODULE_DESCRIPTION("Analog Devices AD5360/61/62/63/70/71/72/73 DAC");
 558 MODULE_LICENSE("GPL v2");