drivers/iio/dac/stm32-dac.c

   1 /*
   2  * This file is part of STM32 DAC driver
   3  *
   4  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
   5  * Authors: Amelie Delaunay <amelie.delaunay@st.com>
   6  *          Fabrice Gasnier <fabrice.gasnier@st.com>
   7  *
   8  * License type: GPLv2
   9  *
  10  * This program is free software; you can redistribute it and/or modify it
  11  * under the terms of the GNU General Public License version 2 as published by
  12  * the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16  * or FITNESS FOR A PARTICULAR PURPOSE.
  17  * See the GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program. If not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #include <linux/bitfield.h>
  24 #include <linux/delay.h>
  25 #include <linux/iio/iio.h>
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/platform_device.h>
  29
  30 #include "stm32-dac-core.h"
  31
  32 #define STM32_DAC_CHANNEL_1             1
  33 #define STM32_DAC_CHANNEL_2             2
  34 #define STM32_DAC_IS_CHAN_1(ch)         ((ch) & STM32_DAC_CHANNEL_1)
  35
  36 /**
  37  * struct stm32_dac - private data of DAC driver
  38  * @common:             reference to DAC common data
  39  */
  40 struct stm32_dac {
  41         struct stm32_dac_common *common;
  42 };
  43
  44 static int stm32_dac_is_enabled(struct iio_dev *indio_dev, int channel)
  45 {
  46         struct stm32_dac *dac = iio_priv(indio_dev);
  47         u32 en, val;
  48         int ret;
  49
  50         ret = regmap_read(dac->common->regmap, STM32_DAC_CR, &val);
  51         if (ret < 0)
  52                 return ret;
  53         if (STM32_DAC_IS_CHAN_1(channel))
  54                 en = FIELD_GET(STM32_DAC_CR_EN1, val);
  55         else
  56                 en = FIELD_GET(STM32_DAC_CR_EN2, val);
  57
  58         return !!en;
  59 }
  60
  61 static int stm32_dac_set_enable_state(struct iio_dev *indio_dev, int ch,
  62                                       bool enable)
  63 {
  64         struct stm32_dac *dac = iio_priv(indio_dev);
  65         u32 msk = STM32_DAC_IS_CHAN_1(ch) ? STM32_DAC_CR_EN1 : STM32_DAC_CR_EN2;
  66         u32 en = enable ? msk : 0;
  67         int ret;
  68
  69         ret = regmap_update_bits(dac->common->regmap, STM32_DAC_CR, msk, en);
  70         if (ret < 0) {
  71                 dev_err(&indio_dev->dev, "%s failed\n", en ?
  72                         "Enable" : "Disable");
  73                 return ret;
  74         }
  75
  76         /*
  77          * When HFSEL is set, it is not allowed to write the DHRx register
  78          * during 8 clock cycles after the ENx bit is set. It is not allowed
  79          * to make software/hardware trigger during this period either.
  80          */
  81         if (en && dac->common->hfsel)
  82                 udelay(1);
  83
  84         return 0;
  85 }
  86
  87 static int stm32_dac_get_value(struct stm32_dac *dac, int channel, int *val)
  88 {
  89         int ret;
  90
  91         if (STM32_DAC_IS_CHAN_1(channel))
  92                 ret = regmap_read(dac->common->regmap, STM32_DAC_DOR1, val);
  93         else
  94                 ret = regmap_read(dac->common->regmap, STM32_DAC_DOR2, val);
  95
  96         return ret ? ret : IIO_VAL_INT;
  97 }
  98
  99 static int stm32_dac_set_value(struct stm32_dac *dac, int channel, int val)
 100 {
 101         int ret;
 102
 103         if (STM32_DAC_IS_CHAN_1(channel))
 104                 ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R1, val);
 105         else
 106                 ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R2, val);
 107
 108         return ret;
 109 }
 110
 111 static int stm32_dac_read_raw(struct iio_dev *indio_dev,
 112                               struct iio_chan_spec const *chan,
 113                               int *val, int *val2, long mask)
 114 {
 115         struct stm32_dac *dac = iio_priv(indio_dev);
 116
 117         switch (mask) {
 118         case IIO_CHAN_INFO_RAW:
 119                 return stm32_dac_get_value(dac, chan->channel, val);
 120         case IIO_CHAN_INFO_SCALE:
 121                 *val = dac->common->vref_mv;
 122                 *val2 = chan->scan_type.realbits;
 123                 return IIO_VAL_FRACTIONAL_LOG2;
 124         default:
 125                 return -EINVAL;
 126         }
 127 }
 128
 129 static int stm32_dac_write_raw(struct iio_dev *indio_dev,
 130                                struct iio_chan_spec const *chan,
 131                                int val, int val2, long mask)
 132 {
 133         struct stm32_dac *dac = iio_priv(indio_dev);
 134
 135         switch (mask) {
 136         case IIO_CHAN_INFO_RAW:
 137                 return stm32_dac_set_value(dac, chan->channel, val);
 138         default:
 139                 return -EINVAL;
 140         }
 141 }
 142
 143 static int stm32_dac_debugfs_reg_access(struct iio_dev *indio_dev,
 144                                         unsigned reg, unsigned writeval,
 145                                         unsigned *readval)
 146 {
 147         struct stm32_dac *dac = iio_priv(indio_dev);
 148
 149         if (!readval)
 150                 return regmap_write(dac->common->regmap, reg, writeval);
 151         else
 152                 return regmap_read(dac->common->regmap, reg, readval);
 153 }
 154
 155 static const struct iio_info stm32_dac_iio_info = {
 156         .read_raw = stm32_dac_read_raw,
 157         .write_raw = stm32_dac_write_raw,
 158         .debugfs_reg_access = stm32_dac_debugfs_reg_access,
 159 };
 160
 161 static const char * const stm32_dac_powerdown_modes[] = {
 162         "three_state",
 163 };
 164
 165 static int stm32_dac_get_powerdown_mode(struct iio_dev *indio_dev,
 166                                         const struct iio_chan_spec *chan)
 167 {
 168         return 0;
 169 }
 170
 171 static int stm32_dac_set_powerdown_mode(struct iio_dev *indio_dev,
 172                                         const struct iio_chan_spec *chan,
 173                                         unsigned int type)
 174 {
 175         return 0;
 176 }
 177
 178 static ssize_t stm32_dac_read_powerdown(struct iio_dev *indio_dev,
 179                                         uintptr_t private,
 180                                         const struct iio_chan_spec *chan,
 181                                         char *buf)
 182 {
 183         int ret = stm32_dac_is_enabled(indio_dev, chan->channel);
 184
 185         if (ret < 0)
 186                 return ret;
 187
 188         return sprintf(buf, "%d\n", ret ? 0 : 1);
 189 }
 190
 191 static ssize_t stm32_dac_write_powerdown(struct iio_dev *indio_dev,
 192                                          uintptr_t private,
 193                                          const struct iio_chan_spec *chan,
 194                                          const char *buf, size_t len)
 195 {
 196         bool powerdown;
 197         int ret;
 198
 199         ret = strtobool(buf, &powerdown);
 200         if (ret)
 201                 return ret;
 202
 203         ret = stm32_dac_set_enable_state(indio_dev, chan->channel, !powerdown);
 204         if (ret)
 205                 return ret;
 206
 207         return len;
 208 }
 209
 210 static const struct iio_enum stm32_dac_powerdown_mode_en = {
 211         .items = stm32_dac_powerdown_modes,
 212         .num_items = ARRAY_SIZE(stm32_dac_powerdown_modes),
 213         .get = stm32_dac_get_powerdown_mode,
 214         .set = stm32_dac_set_powerdown_mode,
 215 };
 216
 217 static const struct iio_chan_spec_ext_info stm32_dac_ext_info[] = {
 218         {
 219                 .name = "powerdown",
 220                 .read = stm32_dac_read_powerdown,
 221                 .write = stm32_dac_write_powerdown,
 222                 .shared = IIO_SEPARATE,
 223         },
 224         IIO_ENUM("powerdown_mode", IIO_SEPARATE, &stm32_dac_powerdown_mode_en),
 225         IIO_ENUM_AVAILABLE("powerdown_mode", &stm32_dac_powerdown_mode_en),
 226         {},
 227 };
 228
 229 #define STM32_DAC_CHANNEL(chan, name) {                 \
 230         .type = IIO_VOLTAGE,                            \
 231         .indexed = 1,                                   \
 232         .output = 1,                                    \
 233         .channel = chan,                                \
 234         .info_mask_separate =                           \
 235                 BIT(IIO_CHAN_INFO_RAW) |                \
 236                 BIT(IIO_CHAN_INFO_SCALE),               \
 237         /* scan_index is always 0 as num_channels is 1 */ \
 238         .scan_type = {                                  \
 239                 .sign = 'u',                            \
 240                 .realbits = 12,                         \
 241                 .storagebits = 16,                      \
 242         },                                              \
 243         .datasheet_name = name,                         \
 244         .ext_info = stm32_dac_ext_info                  \
 245 }
 246
 247 static const struct iio_chan_spec stm32_dac_channels[] = {
 248         STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_1, "out1"),
 249         STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_2, "out2"),
 250 };
 251
 252 static int stm32_dac_chan_of_init(struct iio_dev *indio_dev)
 253 {
 254         struct device_node *np = indio_dev->dev.of_node;
 255         unsigned int i;
 256         u32 channel;
 257         int ret;
 258
 259         ret = of_property_read_u32(np, "reg", &channel);
 260         if (ret) {
 261                 dev_err(&indio_dev->dev, "Failed to read reg property\n");
 262                 return ret;
 263         }
 264
 265         for (i = 0; i < ARRAY_SIZE(stm32_dac_channels); i++) {
 266                 if (stm32_dac_channels[i].channel == channel)
 267                         break;
 268         }
 269         if (i >= ARRAY_SIZE(stm32_dac_channels)) {
 270                 dev_err(&indio_dev->dev, "Invalid reg property\n");
 271                 return -EINVAL;
 272         }
 273
 274         indio_dev->channels = &stm32_dac_channels[i];
 275         /*
 276          * Expose only one channel here, as they can be used independently,
 277          * with separate trigger. Then separate IIO devices are instantiated
 278          * to manage this.
 279          */
 280         indio_dev->num_channels = 1;
 281
 282         return 0;
 283 };
 284
 285 static int stm32_dac_probe(struct platform_device *pdev)
 286 {
 287         struct device_node *np = pdev->dev.of_node;
 288         struct iio_dev *indio_dev;
 289         struct stm32_dac *dac;
 290         int ret;
 291
 292         if (!np)
 293                 return -ENODEV;
 294
 295         indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*dac));
 296         if (!indio_dev)
 297                 return -ENOMEM;
 298         platform_set_drvdata(pdev, indio_dev);
 299
 300         dac = iio_priv(indio_dev);
 301         dac->common = dev_get_drvdata(pdev->dev.parent);
 302         indio_dev->name = dev_name(&pdev->dev);
 303         indio_dev->dev.parent = &pdev->dev;
 304         indio_dev->dev.of_node = pdev->dev.of_node;
 305         indio_dev->info = &stm32_dac_iio_info;
 306         indio_dev->modes = INDIO_DIRECT_MODE;
 307
 308         ret = stm32_dac_chan_of_init(indio_dev);
 309         if (ret < 0)
 310                 return ret;
 311
 312         return devm_iio_device_register(&pdev->dev, indio_dev);
 313 }
 314
 315 static const struct of_device_id stm32_dac_of_match[] = {
 316         { .compatible = "st,stm32-dac", },
 317         {},
 318 };
 319 MODULE_DEVICE_TABLE(of, stm32_dac_of_match);
 320
 321 static struct platform_driver stm32_dac_driver = {
 322         .probe = stm32_dac_probe,
 323         .driver = {
 324                 .name = "stm32-dac",
 325                 .of_match_table = stm32_dac_of_match,
 326         },
 327 };
 328 module_platform_driver(stm32_dac_driver);
 329
 330 MODULE_ALIAS("platform:stm32-dac");
 331 MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
 332 MODULE_DESCRIPTION("STMicroelectronics STM32 DAC driver");
 333 MODULE_LICENSE("GPL v2");