drivers/iio/health/max30102.c

   1 /*
   2  * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
   3  *
   4  * Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  *
  16  * TODO: proximity power saving feature
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/init.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/delay.h>
  23 #include <linux/err.h>
  24 #include <linux/irq.h>
  25 #include <linux/i2c.h>
  26 #include <linux/mutex.h>
  27 #include <linux/of.h>
  28 #include <linux/regmap.h>
  29 #include <linux/iio/iio.h>
  30 #include <linux/iio/buffer.h>
  31 #include <linux/iio/kfifo_buf.h>
  32
  33 #define MAX30102_REGMAP_NAME    "max30102_regmap"
  34 #define MAX30102_DRV_NAME       "max30102"
  35
  36 #define MAX30102_REG_INT_STATUS                 0x00
  37 #define MAX30102_REG_INT_STATUS_PWR_RDY         BIT(0)
  38 #define MAX30102_REG_INT_STATUS_PROX_INT        BIT(4)
  39 #define MAX30102_REG_INT_STATUS_ALC_OVF         BIT(5)
  40 #define MAX30102_REG_INT_STATUS_PPG_RDY         BIT(6)
  41 #define MAX30102_REG_INT_STATUS_FIFO_RDY        BIT(7)
  42
  43 #define MAX30102_REG_INT_ENABLE                 0x02
  44 #define MAX30102_REG_INT_ENABLE_PROX_INT_EN     BIT(4)
  45 #define MAX30102_REG_INT_ENABLE_ALC_OVF_EN      BIT(5)
  46 #define MAX30102_REG_INT_ENABLE_PPG_EN          BIT(6)
  47 #define MAX30102_REG_INT_ENABLE_FIFO_EN         BIT(7)
  48 #define MAX30102_REG_INT_ENABLE_MASK            0xf0
  49 #define MAX30102_REG_INT_ENABLE_MASK_SHIFT      4
  50
  51 #define MAX30102_REG_FIFO_WR_PTR                0x04
  52 #define MAX30102_REG_FIFO_OVR_CTR               0x05
  53 #define MAX30102_REG_FIFO_RD_PTR                0x06
  54 #define MAX30102_REG_FIFO_DATA                  0x07
  55 #define MAX30102_REG_FIFO_DATA_ENTRY_LEN        6
  56
  57 #define MAX30102_REG_FIFO_CONFIG                0x08
  58 #define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES   BIT(1)
  59 #define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT      5
  60 #define MAX30102_REG_FIFO_CONFIG_AFULL          BIT(0)
  61
  62 #define MAX30102_REG_MODE_CONFIG                0x09
  63 #define MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN   BIT(0)
  64 #define MAX30102_REG_MODE_CONFIG_MODE_HR_EN     BIT(1)
  65 #define MAX30102_REG_MODE_CONFIG_MODE_MASK      0x03
  66 #define MAX30102_REG_MODE_CONFIG_PWR            BIT(7)
  67
  68 #define MAX30102_REG_SPO2_CONFIG                0x0a
  69 #define MAX30102_REG_SPO2_CONFIG_PULSE_411_US   0x03
  70 #define MAX30102_REG_SPO2_CONFIG_SR_400HZ       0x03
  71 #define MAX30102_REG_SPO2_CONFIG_SR_MASK        0x07
  72 #define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT  2
  73 #define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0)
  74 #define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5
  75
  76 #define MAX30102_REG_RED_LED_CONFIG             0x0c
  77 #define MAX30102_REG_IR_LED_CONFIG              0x0d
  78
  79 #define MAX30102_REG_TEMP_CONFIG                0x21
  80 #define MAX30102_REG_TEMP_CONFIG_TEMP_EN        BIT(0)
  81
  82 #define MAX30102_REG_TEMP_INTEGER               0x1f
  83 #define MAX30102_REG_TEMP_FRACTION              0x20
  84
  85 struct max30102_data {
  86         struct i2c_client *client;
  87         struct iio_dev *indio_dev;
  88         struct mutex lock;
  89         struct regmap *regmap;
  90
  91         u8 buffer[8];
  92         __be32 processed_buffer[2]; /* 2 x 18-bit (padded to 32-bits) */
  93 };
  94
  95 static const struct regmap_config max30102_regmap_config = {
  96         .name = MAX30102_REGMAP_NAME,
  97
  98         .reg_bits = 8,
  99         .val_bits = 8,
 100 };
 101
 102 static const unsigned long max30102_scan_masks[] = {0x3, 0};
 103
 104 static const struct iio_chan_spec max30102_channels[] = {
 105         {
 106                 .type = IIO_INTENSITY,
 107                 .channel2 = IIO_MOD_LIGHT_RED,
 108                 .modified = 1,
 109
 110                 .scan_index = 0,
 111                 .scan_type = {
 112                         .sign = 'u',
 113                         .shift = 8,
 114                         .realbits = 18,
 115                         .storagebits = 32,
 116                         .endianness = IIO_BE,
 117                 },
 118         },
 119         {
 120                 .type = IIO_INTENSITY,
 121                 .channel2 = IIO_MOD_LIGHT_IR,
 122                 .modified = 1,
 123
 124                 .scan_index = 1,
 125                 .scan_type = {
 126                         .sign = 'u',
 127                         .shift = 8,
 128                         .realbits = 18,
 129                         .storagebits = 32,
 130                         .endianness = IIO_BE,
 131                 },
 132         },
 133         {
 134                 .type = IIO_TEMP,
 135                 .info_mask_separate =
 136                         BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
 137                 .scan_index = -1,
 138         },
 139 };
 140
 141 static int max30102_set_powermode(struct max30102_data *data, bool state)
 142 {
 143         return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
 144                                   MAX30102_REG_MODE_CONFIG_PWR,
 145                                   state ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
 146 }
 147
 148 static int max30102_buffer_postenable(struct iio_dev *indio_dev)
 149 {
 150         struct max30102_data *data = iio_priv(indio_dev);
 151
 152         return max30102_set_powermode(data, true);
 153 }
 154
 155 static int max30102_buffer_predisable(struct iio_dev *indio_dev)
 156 {
 157         struct max30102_data *data = iio_priv(indio_dev);
 158
 159         return max30102_set_powermode(data, false);
 160 }
 161
 162 static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
 163         .postenable = max30102_buffer_postenable,
 164         .predisable = max30102_buffer_predisable,
 165 };
 166
 167 static inline int max30102_fifo_count(struct max30102_data *data)
 168 {
 169         unsigned int val;
 170         int ret;
 171
 172         ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
 173         if (ret)
 174                 return ret;
 175
 176         /* FIFO has one sample slot left */
 177         if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
 178                 return 1;
 179
 180         return 0;
 181 }
 182
 183 static int max30102_read_measurement(struct max30102_data *data)
 184 {
 185         int ret;
 186         u8 *buffer = (u8 *) &data->buffer;
 187
 188         ret = i2c_smbus_read_i2c_block_data(data->client,
 189                                             MAX30102_REG_FIFO_DATA,
 190                                             MAX30102_REG_FIFO_DATA_ENTRY_LEN,
 191                                             buffer);
 192
 193         memcpy(&data->processed_buffer[0], &buffer[0], 3);
 194         memcpy(&data->processed_buffer[1], &buffer[3], 3);
 195
 196         return (ret == MAX30102_REG_FIFO_DATA_ENTRY_LEN) ? 0 : -EINVAL;
 197 }
 198
 199 static irqreturn_t max30102_interrupt_handler(int irq, void *private)
 200 {
 201         struct iio_dev *indio_dev = private;
 202         struct max30102_data *data = iio_priv(indio_dev);
 203         int ret, cnt = 0;
 204
 205         mutex_lock(&data->lock);
 206
 207         while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
 208                 ret = max30102_read_measurement(data);
 209                 if (ret)
 210                         break;
 211
 212                 iio_push_to_buffers(data->indio_dev, data->processed_buffer);
 213                 cnt--;
 214         }
 215
 216         mutex_unlock(&data->lock);
 217
 218         return IRQ_HANDLED;
 219 }
 220
 221 static int max30102_get_current_idx(unsigned int val, int *reg)
 222 {
 223         /* each step is 0.200 mA */
 224         *reg = val / 200;
 225
 226         return *reg > 0xff ? -EINVAL : 0;
 227 }
 228
 229 static int max30102_led_init(struct max30102_data *data)
 230 {
 231         struct device *dev = &data->client->dev;
 232         struct device_node *np = dev->of_node;
 233         unsigned int val;
 234         int reg, ret;
 235
 236         ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
 237         if (ret) {
 238                 dev_info(dev, "no red-led-current-microamp set\n");
 239
 240                 /* Default to 7 mA RED LED */
 241                 val = 7000;
 242         }
 243
 244         ret = max30102_get_current_idx(val, &reg);
 245         if (ret) {
 246                 dev_err(dev, "invalid RED LED current setting %d\n", val);
 247                 return ret;
 248         }
 249
 250         ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
 251         if (ret)
 252                 return ret;
 253
 254         ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
 255         if (ret) {
 256                 dev_info(dev, "no ir-led-current-microamp set\n");
 257
 258                 /* Default to 7 mA IR LED */
 259                 val = 7000;
 260         }
 261
 262         ret = max30102_get_current_idx(val, &reg);
 263         if (ret) {
 264                 dev_err(dev, "invalid IR LED current setting %d", val);
 265                 return ret;
 266         }
 267
 268         return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
 269 }
 270
 271 static int max30102_chip_init(struct max30102_data *data)
 272 {
 273         int ret;
 274
 275         /* setup LED current settings */
 276         ret = max30102_led_init(data);
 277         if (ret)
 278                 return ret;
 279
 280         /* enable 18-bit HR + SPO2 readings at 400Hz */
 281         ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
 282                                 (MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
 283                                  << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
 284                                 (MAX30102_REG_SPO2_CONFIG_SR_400HZ
 285                                  << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
 286                                  MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
 287         if (ret)
 288                 return ret;
 289
 290         /* enable SPO2 mode */
 291         ret = regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
 292                                  MAX30102_REG_MODE_CONFIG_MODE_MASK,
 293                                  MAX30102_REG_MODE_CONFIG_MODE_HR_EN |
 294                                  MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN);
 295         if (ret)
 296                 return ret;
 297
 298         /* average 4 samples + generate FIFO interrupt */
 299         ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
 300                                 (MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
 301                                  << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
 302                                  MAX30102_REG_FIFO_CONFIG_AFULL);
 303         if (ret)
 304                 return ret;
 305
 306         /* enable FIFO interrupt */
 307         return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
 308                                  MAX30102_REG_INT_ENABLE_MASK,
 309                                  MAX30102_REG_INT_ENABLE_FIFO_EN);
 310 }
 311
 312 static int max30102_read_temp(struct max30102_data *data, int *val)
 313 {
 314         int ret;
 315         unsigned int reg;
 316
 317         ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, &reg);
 318         if (ret < 0)
 319                 return ret;
 320         *val = reg << 4;
 321
 322         ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, &reg);
 323         if (ret < 0)
 324                 return ret;
 325
 326         *val |= reg & 0xf;
 327         *val = sign_extend32(*val, 11);
 328
 329         return 0;
 330 }
 331
 332 static int max30102_get_temp(struct max30102_data *data, int *val)
 333 {
 334         int ret;
 335
 336         /* start acquisition */
 337         ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
 338                                  MAX30102_REG_TEMP_CONFIG_TEMP_EN,
 339                                  MAX30102_REG_TEMP_CONFIG_TEMP_EN);
 340         if (ret)
 341                 return ret;
 342
 343         msleep(35);
 344
 345         return max30102_read_temp(data, val);
 346 }
 347
 348 static int max30102_read_raw(struct iio_dev *indio_dev,
 349                              struct iio_chan_spec const *chan,
 350                              int *val, int *val2, long mask)
 351 {
 352         struct max30102_data *data = iio_priv(indio_dev);
 353         int ret = -EINVAL;
 354
 355         switch (mask) {
 356         case IIO_CHAN_INFO_RAW:
 357                 /*
 358                  * Temperature reading can only be acquired while engine
 359                  * is running
 360                  */
 361                 mutex_lock(&indio_dev->mlock);
 362
 363                 if (!iio_buffer_enabled(indio_dev))
 364                         ret = -EBUSY;
 365                 else {
 366                         ret = max30102_get_temp(data, val);
 367                         if (!ret)
 368                                 ret = IIO_VAL_INT;
 369                 }
 370
 371                 mutex_unlock(&indio_dev->mlock);
 372                 break;
 373         case IIO_CHAN_INFO_SCALE:
 374                 *val = 1000;  /* 62.5 */
 375                 *val2 = 16;
 376                 ret = IIO_VAL_FRACTIONAL;
 377                 break;
 378         }
 379
 380         return ret;
 381 }
 382
 383 static const struct iio_info max30102_info = {
 384         .read_raw = max30102_read_raw,
 385 };
 386
 387 static int max30102_probe(struct i2c_client *client,
 388                           const struct i2c_device_id *id)
 389 {
 390         struct max30102_data *data;
 391         struct iio_buffer *buffer;
 392         struct iio_dev *indio_dev;
 393         int ret;
 394
 395         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
 396         if (!indio_dev)
 397                 return -ENOMEM;
 398
 399         buffer = devm_iio_kfifo_allocate(&client->dev);
 400         if (!buffer)
 401                 return -ENOMEM;
 402
 403         iio_device_attach_buffer(indio_dev, buffer);
 404
 405         indio_dev->name = MAX30102_DRV_NAME;
 406         indio_dev->channels = max30102_channels;
 407         indio_dev->info = &max30102_info;
 408         indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
 409         indio_dev->available_scan_masks = max30102_scan_masks;
 410         indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
 411         indio_dev->setup_ops = &max30102_buffer_setup_ops;
 412         indio_dev->dev.parent = &client->dev;
 413
 414         data = iio_priv(indio_dev);
 415         data->indio_dev = indio_dev;
 416         data->client = client;
 417
 418         mutex_init(&data->lock);
 419         i2c_set_clientdata(client, indio_dev);
 420
 421         data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
 422         if (IS_ERR(data->regmap)) {
 423                 dev_err(&client->dev, "regmap initialization failed.\n");
 424                 return PTR_ERR(data->regmap);
 425         }
 426         max30102_set_powermode(data, false);
 427
 428         ret = max30102_chip_init(data);
 429         if (ret)
 430                 return ret;
 431
 432         if (client->irq <= 0) {
 433                 dev_err(&client->dev, "no valid irq defined\n");
 434                 return -EINVAL;
 435         }
 436
 437         ret = devm_request_threaded_irq(&client->dev, client->irq,
 438                                         NULL, max30102_interrupt_handler,
 439                                         IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
 440                                         "max30102_irq", indio_dev);
 441         if (ret) {
 442                 dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
 443                 return ret;
 444         }
 445
 446         return iio_device_register(indio_dev);
 447 }
 448
 449 static int max30102_remove(struct i2c_client *client)
 450 {
 451         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 452         struct max30102_data *data = iio_priv(indio_dev);
 453
 454         iio_device_unregister(indio_dev);
 455         max30102_set_powermode(data, false);
 456
 457         return 0;
 458 }
 459
 460 static const struct i2c_device_id max30102_id[] = {
 461         { "max30102", 0 },
 462         {}
 463 };
 464 MODULE_DEVICE_TABLE(i2c, max30102_id);
 465
 466 static const struct of_device_id max30102_dt_ids[] = {
 467         { .compatible = "maxim,max30102" },
 468         { }
 469 };
 470 MODULE_DEVICE_TABLE(of, max30102_dt_ids);
 471
 472 static struct i2c_driver max30102_driver = {
 473         .driver = {
 474                 .name   = MAX30102_DRV_NAME,
 475                 .of_match_table = of_match_ptr(max30102_dt_ids),
 476         },
 477         .probe          = max30102_probe,
 478         .remove         = max30102_remove,
 479         .id_table       = max30102_id,
 480 };
 481 module_i2c_driver(max30102_driver);
 482
 483 MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
 484 MODULE_DESCRIPTION("MAX30102 heart rate and pulse oximeter sensor");
 485 MODULE_LICENSE("GPL");