2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
17 * - Redistributions in binary form must reproduce the above
18 * copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials
20 * provided with the distribution.
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #ifndef __IW_CXGB4_H__
32 #define __IW_CXGB4_H__
34 #include <linux/mutex.h>
35 #include <linux/list.h>
36 #include <linux/spinlock.h>
37 #include <linux/idr.h>
38 #include <linux/completion.h>
39 #include <linux/netdevice.h>
40 #include <linux/sched.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/inet.h>
44 #include <linux/wait.h>
45 #include <linux/kref.h>
46 #include <linux/timer.h>
49 #include <asm/byteorder.h>
51 #include <net/net_namespace.h>
53 #include <rdma/ib_verbs.h>
54 #include <rdma/iw_cm.h>
55 #include <rdma/rdma_netlink.h>
56 #include <rdma/iw_portmap.h>
59 #include "cxgb4_uld.h"
63 #define DRV_NAME "iw_cxgb4"
64 #define MOD DRV_NAME ":"
66 extern int c4iw_debug
;
67 #define PDBG(fmt, args...) \
70 printk(MOD fmt, ## args); \
75 #define PBL_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->pbl.start)
76 #define RQT_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->rq.start)
78 static inline void *cplhdr(struct sk_buff
*skb
)
83 #define C4IW_ID_TABLE_F_RANDOM 1 /* Pseudo-randomize the id's returned */
84 #define C4IW_ID_TABLE_F_EMPTY 2 /* Table is initially empty */
86 struct c4iw_id_table
{
88 u32 start
; /* logical minimal id */
89 u32 last
; /* hint for find */
95 struct c4iw_resource
{
96 struct c4iw_id_table tpt_table
;
97 struct c4iw_id_table qid_table
;
98 struct c4iw_id_table pdid_table
;
101 struct c4iw_qid_list
{
102 struct list_head entry
;
106 struct c4iw_dev_ucontext
{
107 struct list_head qpids
;
108 struct list_head cqids
;
112 enum c4iw_rdev_flags
{
113 T4_FATAL_ERROR
= (1<<0),
114 T4_STATUS_PAGE_DISABLED
= (1<<1),
126 struct c4iw_stat qid
;
128 struct c4iw_stat stag
;
129 struct c4iw_stat pbl
;
130 struct c4iw_stat rqt
;
131 struct c4iw_stat ocqp
;
135 u64 db_state_transitions
;
136 u64 db_fc_interruptions
;
138 u64 act_ofld_conn_fails
;
139 u64 pas_ofld_conn_fails
;
143 struct c4iw_hw_queue
{
144 int t4_eq_status_entries
;
154 struct wr_log_entry
{
155 struct timespec post_host_ts
;
156 struct timespec poll_host_ts
;
167 struct c4iw_resource resource
;
170 struct c4iw_dev_ucontext uctx
;
171 struct gen_pool
*pbl_pool
;
172 struct gen_pool
*rqt_pool
;
173 struct gen_pool
*ocqp_pool
;
175 struct cxgb4_lld_info lldi
;
176 unsigned long bar2_pa
;
177 void __iomem
*bar2_kva
;
178 unsigned long oc_mw_pa
;
179 void __iomem
*oc_mw_kva
;
180 struct c4iw_stats stats
;
181 struct c4iw_hw_queue hw_queue
;
182 struct t4_dev_status_page
*status_page
;
184 struct wr_log_entry
*wr_log
;
188 static inline int c4iw_fatal_error(struct c4iw_rdev
*rdev
)
190 return rdev
->flags
& T4_FATAL_ERROR
;
193 static inline int c4iw_num_stags(struct c4iw_rdev
*rdev
)
195 return (int)(rdev
->lldi
.vr
->stag
.size
>> 5);
198 #define C4IW_WR_TO (60*HZ)
200 struct c4iw_wr_wait
{
201 struct completion completion
;
205 static inline void c4iw_init_wr_wait(struct c4iw_wr_wait
*wr_waitp
)
208 init_completion(&wr_waitp
->completion
);
211 static inline void c4iw_wake_up(struct c4iw_wr_wait
*wr_waitp
, int ret
)
214 complete(&wr_waitp
->completion
);
217 static inline int c4iw_wait_for_reply(struct c4iw_rdev
*rdev
,
218 struct c4iw_wr_wait
*wr_waitp
,
224 if (c4iw_fatal_error(rdev
)) {
225 wr_waitp
->ret
= -EIO
;
229 ret
= wait_for_completion_timeout(&wr_waitp
->completion
, C4IW_WR_TO
);
231 PDBG("%s - Device %s not responding (disabling device) - tid %u qpid %u\n",
232 func
, pci_name(rdev
->lldi
.pdev
), hwtid
, qpid
);
233 rdev
->flags
|= T4_FATAL_ERROR
;
234 wr_waitp
->ret
= -EIO
;
238 PDBG("%s: FW reply %d tid %u qpid %u\n",
239 pci_name(rdev
->lldi
.pdev
), wr_waitp
->ret
, hwtid
, qpid
);
240 return wr_waitp
->ret
;
251 struct ib_device ibdev
;
252 struct c4iw_rdev rdev
;
253 u32 device_cap_flags
;
258 struct mutex db_mutex
;
259 struct dentry
*debugfs_root
;
260 enum db_state db_state
;
261 struct idr hwtid_idr
;
264 struct list_head db_fc_list
;
266 wait_queue_head_t wait
;
269 static inline struct c4iw_dev
*to_c4iw_dev(struct ib_device
*ibdev
)
271 return container_of(ibdev
, struct c4iw_dev
, ibdev
);
274 static inline struct c4iw_dev
*rdev_to_c4iw_dev(struct c4iw_rdev
*rdev
)
276 return container_of(rdev
, struct c4iw_dev
, rdev
);
279 static inline struct c4iw_cq
*get_chp(struct c4iw_dev
*rhp
, u32 cqid
)
281 return idr_find(&rhp
->cqidr
, cqid
);
284 static inline struct c4iw_qp
*get_qhp(struct c4iw_dev
*rhp
, u32 qpid
)
286 return idr_find(&rhp
->qpidr
, qpid
);
289 static inline struct c4iw_mr
*get_mhp(struct c4iw_dev
*rhp
, u32 mmid
)
291 return idr_find(&rhp
->mmidr
, mmid
);
294 static inline int _insert_handle(struct c4iw_dev
*rhp
, struct idr
*idr
,
295 void *handle
, u32 id
, int lock
)
300 idr_preload(GFP_KERNEL
);
301 spin_lock_irq(&rhp
->lock
);
304 ret
= idr_alloc(idr
, handle
, id
, id
+ 1, GFP_ATOMIC
);
307 spin_unlock_irq(&rhp
->lock
);
311 BUG_ON(ret
== -ENOSPC
);
312 return ret
< 0 ? ret
: 0;
315 static inline int insert_handle(struct c4iw_dev
*rhp
, struct idr
*idr
,
316 void *handle
, u32 id
)
318 return _insert_handle(rhp
, idr
, handle
, id
, 1);
321 static inline int insert_handle_nolock(struct c4iw_dev
*rhp
, struct idr
*idr
,
322 void *handle
, u32 id
)
324 return _insert_handle(rhp
, idr
, handle
, id
, 0);
327 static inline void _remove_handle(struct c4iw_dev
*rhp
, struct idr
*idr
,
331 spin_lock_irq(&rhp
->lock
);
334 spin_unlock_irq(&rhp
->lock
);
337 static inline void remove_handle(struct c4iw_dev
*rhp
, struct idr
*idr
, u32 id
)
339 _remove_handle(rhp
, idr
, id
, 1);
342 static inline void remove_handle_nolock(struct c4iw_dev
*rhp
,
343 struct idr
*idr
, u32 id
)
345 _remove_handle(rhp
, idr
, id
, 0);
348 extern uint c4iw_max_read_depth
;
350 static inline int cur_max_read_depth(struct c4iw_dev
*dev
)
352 return min(dev
->rdev
.lldi
.max_ordird_qp
, c4iw_max_read_depth
);
358 struct c4iw_dev
*rhp
;
361 static inline struct c4iw_pd
*to_c4iw_pd(struct ib_pd
*ibpd
)
363 return container_of(ibpd
, struct c4iw_pd
, ibpd
);
366 struct tpt_attributes
{
369 enum fw_ri_mem_perms perms
;
378 u32 remote_invaliate_disable
:1;
380 u32 mw_bind_enable
:1;
386 struct ib_umem
*umem
;
387 struct c4iw_dev
*rhp
;
389 struct tpt_attributes attr
;
396 static inline struct c4iw_mr
*to_c4iw_mr(struct ib_mr
*ibmr
)
398 return container_of(ibmr
, struct c4iw_mr
, ibmr
);
403 struct c4iw_dev
*rhp
;
405 struct tpt_attributes attr
;
408 static inline struct c4iw_mw
*to_c4iw_mw(struct ib_mw
*ibmw
)
410 return container_of(ibmw
, struct c4iw_mw
, ibmw
);
415 struct c4iw_dev
*rhp
;
418 spinlock_t comp_handler_lock
;
420 wait_queue_head_t wait
;
423 static inline struct c4iw_cq
*to_c4iw_cq(struct ib_cq
*ibcq
)
425 return container_of(ibcq
, struct c4iw_cq
, ibcq
);
428 struct c4iw_mpa_attributes
{
430 u8 recv_marker_enabled
;
431 u8 xmit_marker_enabled
;
433 u8 enhanced_rdma_conn
;
438 struct c4iw_qp_attributes
{
444 u32 sq_max_sges_rdma_write
;
448 u8 enable_rdma_write
;
450 u8 enable_mmid0_fastreg
;
455 char terminate_buffer
[52];
456 u32 terminate_msg_len
;
457 u8 is_terminate_local
;
458 struct c4iw_mpa_attributes mpa_attr
;
459 struct c4iw_ep
*llp_stream_handle
;
469 struct list_head db_fc_entry
;
470 struct c4iw_dev
*rhp
;
472 struct c4iw_qp_attributes attr
;
477 wait_queue_head_t wait
;
478 struct timer_list timer
;
480 struct completion rq_drained
;
481 struct completion sq_drained
;
484 static inline struct c4iw_qp
*to_c4iw_qp(struct ib_qp
*ibqp
)
486 return container_of(ibqp
, struct c4iw_qp
, ibqp
);
489 struct c4iw_ucontext
{
490 struct ib_ucontext ibucontext
;
491 struct c4iw_dev_ucontext uctx
;
493 spinlock_t mmap_lock
;
494 struct list_head mmaps
;
497 static inline struct c4iw_ucontext
*to_c4iw_ucontext(struct ib_ucontext
*c
)
499 return container_of(c
, struct c4iw_ucontext
, ibucontext
);
502 struct c4iw_mm_entry
{
503 struct list_head entry
;
509 static inline struct c4iw_mm_entry
*remove_mmap(struct c4iw_ucontext
*ucontext
,
510 u32 key
, unsigned len
)
512 struct list_head
*pos
, *nxt
;
513 struct c4iw_mm_entry
*mm
;
515 spin_lock(&ucontext
->mmap_lock
);
516 list_for_each_safe(pos
, nxt
, &ucontext
->mmaps
) {
518 mm
= list_entry(pos
, struct c4iw_mm_entry
, entry
);
519 if (mm
->key
== key
&& mm
->len
== len
) {
520 list_del_init(&mm
->entry
);
521 spin_unlock(&ucontext
->mmap_lock
);
522 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__
,
523 key
, (unsigned long long) mm
->addr
, mm
->len
);
527 spin_unlock(&ucontext
->mmap_lock
);
531 static inline void insert_mmap(struct c4iw_ucontext
*ucontext
,
532 struct c4iw_mm_entry
*mm
)
534 spin_lock(&ucontext
->mmap_lock
);
535 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__
,
536 mm
->key
, (unsigned long long) mm
->addr
, mm
->len
);
537 list_add_tail(&mm
->entry
, &ucontext
->mmaps
);
538 spin_unlock(&ucontext
->mmap_lock
);
541 enum c4iw_qp_attr_mask
{
542 C4IW_QP_ATTR_NEXT_STATE
= 1 << 0,
543 C4IW_QP_ATTR_SQ_DB
= 1<<1,
544 C4IW_QP_ATTR_RQ_DB
= 1<<2,
545 C4IW_QP_ATTR_ENABLE_RDMA_READ
= 1 << 7,
546 C4IW_QP_ATTR_ENABLE_RDMA_WRITE
= 1 << 8,
547 C4IW_QP_ATTR_ENABLE_RDMA_BIND
= 1 << 9,
548 C4IW_QP_ATTR_MAX_ORD
= 1 << 11,
549 C4IW_QP_ATTR_MAX_IRD
= 1 << 12,
550 C4IW_QP_ATTR_LLP_STREAM_HANDLE
= 1 << 22,
551 C4IW_QP_ATTR_STREAM_MSG_BUFFER
= 1 << 23,
552 C4IW_QP_ATTR_MPA_ATTR
= 1 << 24,
553 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE
= 1 << 25,
554 C4IW_QP_ATTR_VALID_MODIFY
= (C4IW_QP_ATTR_ENABLE_RDMA_READ
|
555 C4IW_QP_ATTR_ENABLE_RDMA_WRITE
|
556 C4IW_QP_ATTR_MAX_ORD
|
557 C4IW_QP_ATTR_MAX_IRD
|
558 C4IW_QP_ATTR_LLP_STREAM_HANDLE
|
559 C4IW_QP_ATTR_STREAM_MSG_BUFFER
|
560 C4IW_QP_ATTR_MPA_ATTR
|
561 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE
)
564 int c4iw_modify_qp(struct c4iw_dev
*rhp
,
566 enum c4iw_qp_attr_mask mask
,
567 struct c4iw_qp_attributes
*attrs
,
574 C4IW_QP_STATE_TERMINATE
,
575 C4IW_QP_STATE_CLOSING
,
579 static inline int c4iw_convert_state(enum ib_qp_state ib_state
)
584 return C4IW_QP_STATE_IDLE
;
586 return C4IW_QP_STATE_RTS
;
588 return C4IW_QP_STATE_CLOSING
;
590 return C4IW_QP_STATE_TERMINATE
;
592 return C4IW_QP_STATE_ERROR
;
598 static inline int to_ib_qp_state(int c4iw_qp_state
)
600 switch (c4iw_qp_state
) {
601 case C4IW_QP_STATE_IDLE
:
603 case C4IW_QP_STATE_RTS
:
605 case C4IW_QP_STATE_CLOSING
:
607 case C4IW_QP_STATE_TERMINATE
:
609 case C4IW_QP_STATE_ERROR
:
615 static inline u32
c4iw_ib_to_tpt_access(int a
)
617 return (a
& IB_ACCESS_REMOTE_WRITE
? FW_RI_MEM_ACCESS_REM_WRITE
: 0) |
618 (a
& IB_ACCESS_REMOTE_READ
? FW_RI_MEM_ACCESS_REM_READ
: 0) |
619 (a
& IB_ACCESS_LOCAL_WRITE
? FW_RI_MEM_ACCESS_LOCAL_WRITE
: 0) |
620 FW_RI_MEM_ACCESS_LOCAL_READ
;
623 static inline u32
c4iw_ib_to_tpt_bind_access(int acc
)
625 return (acc
& IB_ACCESS_REMOTE_WRITE
? FW_RI_MEM_ACCESS_REM_WRITE
: 0) |
626 (acc
& IB_ACCESS_REMOTE_READ
? FW_RI_MEM_ACCESS_REM_READ
: 0);
629 enum c4iw_mmid_state
{
630 C4IW_STAG_STATE_VALID
,
631 C4IW_STAG_STATE_INVALID
634 #define C4IW_NODE_DESC "cxgb4 Chelsio Communications"
636 #define MPA_KEY_REQ "MPA ID Req Frame"
637 #define MPA_KEY_REP "MPA ID Rep Frame"
639 #define MPA_MAX_PRIVATE_DATA 256
640 #define MPA_ENHANCED_RDMA_CONN 0x10
641 #define MPA_REJECT 0x20
643 #define MPA_MARKERS 0x80
644 #define MPA_FLAGS_MASK 0xE0
646 #define MPA_V2_PEER2PEER_MODEL 0x8000
647 #define MPA_V2_ZERO_LEN_FPDU_RTR 0x4000
648 #define MPA_V2_RDMA_WRITE_RTR 0x8000
649 #define MPA_V2_RDMA_READ_RTR 0x4000
650 #define MPA_V2_IRD_ORD_MASK 0x3FFF
652 #define c4iw_put_ep(ep) { \
653 PDBG("put_ep (via %s:%u) ep %p refcnt %d\n", __func__, __LINE__, \
654 ep, atomic_read(&((ep)->kref.refcount))); \
655 WARN_ON(atomic_read(&((ep)->kref.refcount)) < 1); \
656 kref_put(&((ep)->kref), _c4iw_free_ep); \
659 #define c4iw_get_ep(ep) { \
660 PDBG("get_ep (via %s:%u) ep %p, refcnt %d\n", __func__, __LINE__, \
661 ep, atomic_read(&((ep)->kref.refcount))); \
662 kref_get(&((ep)->kref)); \
664 void _c4iw_free_ep(struct kref
*kref
);
670 __be16 private_data_size
;
674 struct mpa_v2_conn_params
{
679 struct terminate_message
{
686 #define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28)
688 enum c4iw_layers_types
{
692 RDMAP_LOCAL_CATA
= 0x00,
693 RDMAP_REMOTE_PROT
= 0x01,
694 RDMAP_REMOTE_OP
= 0x02,
695 DDP_LOCAL_CATA
= 0x00,
696 DDP_TAGGED_ERR
= 0x01,
697 DDP_UNTAGGED_ERR
= 0x02,
701 enum c4iw_rdma_ecodes
{
702 RDMAP_INV_STAG
= 0x00,
703 RDMAP_BASE_BOUNDS
= 0x01,
704 RDMAP_ACC_VIOL
= 0x02,
705 RDMAP_STAG_NOT_ASSOC
= 0x03,
706 RDMAP_TO_WRAP
= 0x04,
707 RDMAP_INV_VERS
= 0x05,
708 RDMAP_INV_OPCODE
= 0x06,
709 RDMAP_STREAM_CATA
= 0x07,
710 RDMAP_GLOBAL_CATA
= 0x08,
711 RDMAP_CANT_INV_STAG
= 0x09,
712 RDMAP_UNSPECIFIED
= 0xff
715 enum c4iw_ddp_ecodes
{
716 DDPT_INV_STAG
= 0x00,
717 DDPT_BASE_BOUNDS
= 0x01,
718 DDPT_STAG_NOT_ASSOC
= 0x02,
720 DDPT_INV_VERS
= 0x04,
722 DDPU_INV_MSN_NOBUF
= 0x02,
723 DDPU_INV_MSN_RANGE
= 0x03,
725 DDPU_MSG_TOOBIG
= 0x05,
729 enum c4iw_mpa_ecodes
{
731 MPA_MARKER_ERR
= 0x03,
732 MPA_LOCAL_CATA
= 0x05,
733 MPA_INSUFF_IRD
= 0x06,
734 MPA_NOMATCH_RTR
= 0x07,
753 PEER_ABORT_IN_PROGRESS
= 0,
754 ABORT_REQ_IN_PROGRESS
= 1,
755 RELEASE_RESOURCES
= 2,
762 enum c4iw_ep_history
{
782 CONN_RPL_UPCALL
= 19,
783 ACT_RETRY_NOMEM
= 20,
784 ACT_RETRY_INUSE
= 21,
793 struct c4iw_ep_common
{
794 struct iw_cm_id
*cm_id
;
796 struct c4iw_dev
*dev
;
797 enum c4iw_ep_state state
;
800 struct sockaddr_storage local_addr
;
801 struct sockaddr_storage remote_addr
;
802 struct c4iw_wr_wait wr_wait
;
804 unsigned long history
;
807 struct c4iw_listen_ep
{
808 struct c4iw_ep_common com
;
813 struct c4iw_ep_stats
{
814 unsigned connect_neg_adv
;
815 unsigned abort_neg_adv
;
819 struct c4iw_ep_common com
;
820 struct c4iw_ep
*parent_ep
;
821 struct timer_list timer
;
822 struct list_head entry
;
827 struct l2t_entry
*l2t
;
828 struct dst_entry
*dst
;
829 struct sk_buff
*mpa_skb
;
830 struct c4iw_mpa_attributes mpa_attr
;
831 u8 mpa_pkt
[sizeof(struct mpa_message
) + MPA_MAX_PRIVATE_DATA
];
832 unsigned int mpa_pkt_len
;
845 u8 retry_with_mpa_v1
;
846 u8 tried_with_mpa_v1
;
847 unsigned int retry_count
;
850 struct c4iw_ep_stats stats
;
853 static inline struct c4iw_ep
*to_ep(struct iw_cm_id
*cm_id
)
855 return cm_id
->provider_data
;
858 static inline struct c4iw_listen_ep
*to_listen_ep(struct iw_cm_id
*cm_id
)
860 return cm_id
->provider_data
;
863 static inline int compute_wscale(int win
)
867 while (wscale
< 14 && (65535<<wscale
) < win
)
872 static inline int ocqp_supported(const struct cxgb4_lld_info
*infop
)
874 #if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64)
875 return infop
->vr
->ocq
.size
> 0;
881 u32
c4iw_id_alloc(struct c4iw_id_table
*alloc
);
882 void c4iw_id_free(struct c4iw_id_table
*alloc
, u32 obj
);
883 int c4iw_id_table_alloc(struct c4iw_id_table
*alloc
, u32 start
, u32 num
,
884 u32 reserved
, u32 flags
);
885 void c4iw_id_table_free(struct c4iw_id_table
*alloc
);
887 typedef int (*c4iw_handler_func
)(struct c4iw_dev
*dev
, struct sk_buff
*skb
);
889 int c4iw_ep_redirect(void *ctx
, struct dst_entry
*old
, struct dst_entry
*new,
890 struct l2t_entry
*l2t
);
891 void c4iw_put_qpid(struct c4iw_rdev
*rdev
, u32 qpid
,
892 struct c4iw_dev_ucontext
*uctx
);
893 u32
c4iw_get_resource(struct c4iw_id_table
*id_table
);
894 void c4iw_put_resource(struct c4iw_id_table
*id_table
, u32 entry
);
895 int c4iw_init_resource(struct c4iw_rdev
*rdev
, u32 nr_tpt
, u32 nr_pdid
);
896 int c4iw_init_ctrl_qp(struct c4iw_rdev
*rdev
);
897 int c4iw_pblpool_create(struct c4iw_rdev
*rdev
);
898 int c4iw_rqtpool_create(struct c4iw_rdev
*rdev
);
899 int c4iw_ocqp_pool_create(struct c4iw_rdev
*rdev
);
900 void c4iw_pblpool_destroy(struct c4iw_rdev
*rdev
);
901 void c4iw_rqtpool_destroy(struct c4iw_rdev
*rdev
);
902 void c4iw_ocqp_pool_destroy(struct c4iw_rdev
*rdev
);
903 void c4iw_destroy_resource(struct c4iw_resource
*rscp
);
904 int c4iw_destroy_ctrl_qp(struct c4iw_rdev
*rdev
);
905 int c4iw_register_device(struct c4iw_dev
*dev
);
906 void c4iw_unregister_device(struct c4iw_dev
*dev
);
907 int __init
c4iw_cm_init(void);
908 void c4iw_cm_term(void);
909 void c4iw_release_dev_ucontext(struct c4iw_rdev
*rdev
,
910 struct c4iw_dev_ucontext
*uctx
);
911 void c4iw_init_dev_ucontext(struct c4iw_rdev
*rdev
,
912 struct c4iw_dev_ucontext
*uctx
);
913 int c4iw_poll_cq(struct ib_cq
*ibcq
, int num_entries
, struct ib_wc
*wc
);
914 int c4iw_post_send(struct ib_qp
*ibqp
, struct ib_send_wr
*wr
,
915 struct ib_send_wr
**bad_wr
);
916 int c4iw_post_receive(struct ib_qp
*ibqp
, struct ib_recv_wr
*wr
,
917 struct ib_recv_wr
**bad_wr
);
918 int c4iw_connect(struct iw_cm_id
*cm_id
, struct iw_cm_conn_param
*conn_param
);
919 int c4iw_create_listen(struct iw_cm_id
*cm_id
, int backlog
);
920 int c4iw_destroy_listen(struct iw_cm_id
*cm_id
);
921 int c4iw_accept_cr(struct iw_cm_id
*cm_id
, struct iw_cm_conn_param
*conn_param
);
922 int c4iw_reject_cr(struct iw_cm_id
*cm_id
, const void *pdata
, u8 pdata_len
);
923 void c4iw_qp_add_ref(struct ib_qp
*qp
);
924 void c4iw_qp_rem_ref(struct ib_qp
*qp
);
925 struct ib_mr
*c4iw_alloc_mr(struct ib_pd
*pd
,
926 enum ib_mr_type mr_type
,
928 int c4iw_map_mr_sg(struct ib_mr
*ibmr
, struct scatterlist
*sg
, int sg_nents
,
929 unsigned int *sg_offset
);
930 int c4iw_dealloc_mw(struct ib_mw
*mw
);
931 struct ib_mw
*c4iw_alloc_mw(struct ib_pd
*pd
, enum ib_mw_type type
,
932 struct ib_udata
*udata
);
933 struct ib_mr
*c4iw_reg_user_mr(struct ib_pd
*pd
, u64 start
,
934 u64 length
, u64 virt
, int acc
,
935 struct ib_udata
*udata
);
936 struct ib_mr
*c4iw_get_dma_mr(struct ib_pd
*pd
, int acc
);
937 int c4iw_dereg_mr(struct ib_mr
*ib_mr
);
938 int c4iw_destroy_cq(struct ib_cq
*ib_cq
);
939 struct ib_cq
*c4iw_create_cq(struct ib_device
*ibdev
,
940 const struct ib_cq_init_attr
*attr
,
941 struct ib_ucontext
*ib_context
,
942 struct ib_udata
*udata
);
943 int c4iw_resize_cq(struct ib_cq
*cq
, int cqe
, struct ib_udata
*udata
);
944 int c4iw_arm_cq(struct ib_cq
*ibcq
, enum ib_cq_notify_flags flags
);
945 int c4iw_destroy_qp(struct ib_qp
*ib_qp
);
946 struct ib_qp
*c4iw_create_qp(struct ib_pd
*pd
,
947 struct ib_qp_init_attr
*attrs
,
948 struct ib_udata
*udata
);
949 int c4iw_ib_modify_qp(struct ib_qp
*ibqp
, struct ib_qp_attr
*attr
,
950 int attr_mask
, struct ib_udata
*udata
);
951 int c4iw_ib_query_qp(struct ib_qp
*ibqp
, struct ib_qp_attr
*attr
,
952 int attr_mask
, struct ib_qp_init_attr
*init_attr
);
953 struct ib_qp
*c4iw_get_qp(struct ib_device
*dev
, int qpn
);
954 u32
c4iw_rqtpool_alloc(struct c4iw_rdev
*rdev
, int size
);
955 void c4iw_rqtpool_free(struct c4iw_rdev
*rdev
, u32 addr
, int size
);
956 u32
c4iw_pblpool_alloc(struct c4iw_rdev
*rdev
, int size
);
957 void c4iw_pblpool_free(struct c4iw_rdev
*rdev
, u32 addr
, int size
);
958 u32
c4iw_ocqp_pool_alloc(struct c4iw_rdev
*rdev
, int size
);
959 void c4iw_ocqp_pool_free(struct c4iw_rdev
*rdev
, u32 addr
, int size
);
960 int c4iw_ofld_send(struct c4iw_rdev
*rdev
, struct sk_buff
*skb
);
961 void c4iw_flush_hw_cq(struct c4iw_cq
*chp
);
962 void c4iw_count_rcqes(struct t4_cq
*cq
, struct t4_wq
*wq
, int *count
);
963 int c4iw_ep_disconnect(struct c4iw_ep
*ep
, int abrupt
, gfp_t gfp
);
964 int c4iw_flush_rq(struct t4_wq
*wq
, struct t4_cq
*cq
, int count
);
965 int c4iw_flush_sq(struct c4iw_qp
*qhp
);
966 int c4iw_ev_handler(struct c4iw_dev
*rnicp
, u32 qid
);
967 u16
c4iw_rqes_posted(struct c4iw_qp
*qhp
);
968 int c4iw_post_terminate(struct c4iw_qp
*qhp
, struct t4_cqe
*err_cqe
);
969 u32
c4iw_get_cqid(struct c4iw_rdev
*rdev
, struct c4iw_dev_ucontext
*uctx
);
970 void c4iw_put_cqid(struct c4iw_rdev
*rdev
, u32 qid
,
971 struct c4iw_dev_ucontext
*uctx
);
972 u32
c4iw_get_qpid(struct c4iw_rdev
*rdev
, struct c4iw_dev_ucontext
*uctx
);
973 void c4iw_put_qpid(struct c4iw_rdev
*rdev
, u32 qid
,
974 struct c4iw_dev_ucontext
*uctx
);
975 void c4iw_ev_dispatch(struct c4iw_dev
*dev
, struct t4_cqe
*err_cqe
);
977 extern struct cxgb4_client t4c_client
;
978 extern c4iw_handler_func c4iw_handlers
[NUM_CPL_CMDS
];
979 void __iomem
*c4iw_bar2_addrs(struct c4iw_rdev
*rdev
, unsigned int qid
,
980 enum cxgb4_bar2_qtype qtype
,
981 unsigned int *pbar2_qid
, u64
*pbar2_pa
);
982 extern void c4iw_log_wr_stats(struct t4_wq
*wq
, struct t4_cqe
*cqe
);
983 extern int c4iw_wr_log
;
984 extern int db_fc_threshold
;
985 extern int db_coalescing_threshold
;
987 void c4iw_drain_rq(struct ib_qp
*qp
);
988 void c4iw_drain_sq(struct ib_qp
*qp
);