2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
17 * - Redistributions in binary form must reproduce the above
18 * copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials
20 * provided with the distribution.
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #ifndef __IW_CXGB4_H__
32 #define __IW_CXGB4_H__
34 #include <linux/mutex.h>
35 #include <linux/list.h>
36 #include <linux/spinlock.h>
37 #include <linux/idr.h>
38 #include <linux/completion.h>
39 #include <linux/netdevice.h>
40 #include <linux/sched.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/inet.h>
44 #include <linux/wait.h>
45 #include <linux/kref.h>
46 #include <linux/timer.h>
49 #include <asm/byteorder.h>
51 #include <net/net_namespace.h>
53 #include <rdma/ib_verbs.h>
54 #include <rdma/iw_cm.h>
55 #include <rdma/rdma_netlink.h>
56 #include <rdma/iw_portmap.h>
59 #include "cxgb4_uld.h"
63 #define DRV_NAME "iw_cxgb4"
64 #define MOD DRV_NAME ":"
66 extern int c4iw_debug
;
67 #define PDBG(fmt, args...) \
70 printk(MOD fmt, ## args); \
75 #define PBL_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->pbl.start)
76 #define RQT_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->rq.start)
78 static inline void *cplhdr(struct sk_buff
*skb
)
83 #define C4IW_ID_TABLE_F_RANDOM 1 /* Pseudo-randomize the id's returned */
84 #define C4IW_ID_TABLE_F_EMPTY 2 /* Table is initially empty */
86 struct c4iw_id_table
{
88 u32 start
; /* logical minimal id */
89 u32 last
; /* hint for find */
95 struct c4iw_resource
{
96 struct c4iw_id_table tpt_table
;
97 struct c4iw_id_table qid_table
;
98 struct c4iw_id_table pdid_table
;
101 struct c4iw_qid_list
{
102 struct list_head entry
;
106 struct c4iw_dev_ucontext
{
107 struct list_head qpids
;
108 struct list_head cqids
;
112 enum c4iw_rdev_flags
{
113 T4_FATAL_ERROR
= (1<<0),
114 T4_STATUS_PAGE_DISABLED
= (1<<1),
126 struct c4iw_stat qid
;
128 struct c4iw_stat stag
;
129 struct c4iw_stat pbl
;
130 struct c4iw_stat rqt
;
131 struct c4iw_stat ocqp
;
135 u64 db_state_transitions
;
136 u64 db_fc_interruptions
;
138 u64 act_ofld_conn_fails
;
139 u64 pas_ofld_conn_fails
;
143 struct c4iw_resource resource
;
144 unsigned long qpshift
;
146 unsigned long cqshift
;
148 struct c4iw_dev_ucontext uctx
;
149 struct gen_pool
*pbl_pool
;
150 struct gen_pool
*rqt_pool
;
151 struct gen_pool
*ocqp_pool
;
153 struct cxgb4_lld_info lldi
;
154 unsigned long bar2_pa
;
155 void __iomem
*bar2_kva
;
156 unsigned long oc_mw_pa
;
157 void __iomem
*oc_mw_kva
;
158 struct c4iw_stats stats
;
159 struct t4_dev_status_page
*status_page
;
162 static inline int c4iw_fatal_error(struct c4iw_rdev
*rdev
)
164 return rdev
->flags
& T4_FATAL_ERROR
;
167 static inline int c4iw_num_stags(struct c4iw_rdev
*rdev
)
169 return min((int)T4_MAX_NUM_STAG
, (int)(rdev
->lldi
.vr
->stag
.size
>> 5));
172 #define C4IW_WR_TO (30*HZ)
174 struct c4iw_wr_wait
{
175 struct completion completion
;
179 static inline void c4iw_init_wr_wait(struct c4iw_wr_wait
*wr_waitp
)
182 init_completion(&wr_waitp
->completion
);
185 static inline void c4iw_wake_up(struct c4iw_wr_wait
*wr_waitp
, int ret
)
188 complete(&wr_waitp
->completion
);
191 static inline int c4iw_wait_for_reply(struct c4iw_rdev
*rdev
,
192 struct c4iw_wr_wait
*wr_waitp
,
196 unsigned to
= C4IW_WR_TO
;
200 ret
= wait_for_completion_timeout(&wr_waitp
->completion
, to
);
202 printk(KERN_ERR MOD
"%s - Device %s not responding - "
203 "tid %u qpid %u\n", func
,
204 pci_name(rdev
->lldi
.pdev
), hwtid
, qpid
);
205 if (c4iw_fatal_error(rdev
)) {
206 wr_waitp
->ret
= -EIO
;
213 PDBG("%s: FW reply %d tid %u qpid %u\n",
214 pci_name(rdev
->lldi
.pdev
), wr_waitp
->ret
, hwtid
, qpid
);
215 return wr_waitp
->ret
;
226 struct ib_device ibdev
;
227 struct c4iw_rdev rdev
;
228 u32 device_cap_flags
;
233 struct mutex db_mutex
;
234 struct dentry
*debugfs_root
;
235 enum db_state db_state
;
236 struct idr hwtid_idr
;
239 struct list_head db_fc_list
;
242 static inline struct c4iw_dev
*to_c4iw_dev(struct ib_device
*ibdev
)
244 return container_of(ibdev
, struct c4iw_dev
, ibdev
);
247 static inline struct c4iw_dev
*rdev_to_c4iw_dev(struct c4iw_rdev
*rdev
)
249 return container_of(rdev
, struct c4iw_dev
, rdev
);
252 static inline struct c4iw_cq
*get_chp(struct c4iw_dev
*rhp
, u32 cqid
)
254 return idr_find(&rhp
->cqidr
, cqid
);
257 static inline struct c4iw_qp
*get_qhp(struct c4iw_dev
*rhp
, u32 qpid
)
259 return idr_find(&rhp
->qpidr
, qpid
);
262 static inline struct c4iw_mr
*get_mhp(struct c4iw_dev
*rhp
, u32 mmid
)
264 return idr_find(&rhp
->mmidr
, mmid
);
267 static inline int _insert_handle(struct c4iw_dev
*rhp
, struct idr
*idr
,
268 void *handle
, u32 id
, int lock
)
273 idr_preload(GFP_KERNEL
);
274 spin_lock_irq(&rhp
->lock
);
277 ret
= idr_alloc(idr
, handle
, id
, id
+ 1, GFP_ATOMIC
);
280 spin_unlock_irq(&rhp
->lock
);
284 BUG_ON(ret
== -ENOSPC
);
285 return ret
< 0 ? ret
: 0;
288 static inline int insert_handle(struct c4iw_dev
*rhp
, struct idr
*idr
,
289 void *handle
, u32 id
)
291 return _insert_handle(rhp
, idr
, handle
, id
, 1);
294 static inline int insert_handle_nolock(struct c4iw_dev
*rhp
, struct idr
*idr
,
295 void *handle
, u32 id
)
297 return _insert_handle(rhp
, idr
, handle
, id
, 0);
300 static inline void _remove_handle(struct c4iw_dev
*rhp
, struct idr
*idr
,
304 spin_lock_irq(&rhp
->lock
);
307 spin_unlock_irq(&rhp
->lock
);
310 static inline void remove_handle(struct c4iw_dev
*rhp
, struct idr
*idr
, u32 id
)
312 _remove_handle(rhp
, idr
, id
, 1);
315 static inline void remove_handle_nolock(struct c4iw_dev
*rhp
,
316 struct idr
*idr
, u32 id
)
318 _remove_handle(rhp
, idr
, id
, 0);
324 struct c4iw_dev
*rhp
;
327 static inline struct c4iw_pd
*to_c4iw_pd(struct ib_pd
*ibpd
)
329 return container_of(ibpd
, struct c4iw_pd
, ibpd
);
332 struct tpt_attributes
{
335 enum fw_ri_mem_perms perms
;
344 u32 remote_invaliate_disable
:1;
346 u32 mw_bind_enable
:1;
352 struct ib_umem
*umem
;
353 struct c4iw_dev
*rhp
;
355 struct tpt_attributes attr
;
358 static inline struct c4iw_mr
*to_c4iw_mr(struct ib_mr
*ibmr
)
360 return container_of(ibmr
, struct c4iw_mr
, ibmr
);
365 struct c4iw_dev
*rhp
;
367 struct tpt_attributes attr
;
370 static inline struct c4iw_mw
*to_c4iw_mw(struct ib_mw
*ibmw
)
372 return container_of(ibmw
, struct c4iw_mw
, ibmw
);
375 struct c4iw_fr_page_list
{
376 struct ib_fast_reg_page_list ibpl
;
377 DEFINE_DMA_UNMAP_ADDR(mapping
);
379 struct c4iw_dev
*dev
;
383 static inline struct c4iw_fr_page_list
*to_c4iw_fr_page_list(
384 struct ib_fast_reg_page_list
*ibpl
)
386 return container_of(ibpl
, struct c4iw_fr_page_list
, ibpl
);
391 struct c4iw_dev
*rhp
;
394 spinlock_t comp_handler_lock
;
396 wait_queue_head_t wait
;
399 static inline struct c4iw_cq
*to_c4iw_cq(struct ib_cq
*ibcq
)
401 return container_of(ibcq
, struct c4iw_cq
, ibcq
);
404 struct c4iw_mpa_attributes
{
406 u8 recv_marker_enabled
;
407 u8 xmit_marker_enabled
;
409 u8 enhanced_rdma_conn
;
414 struct c4iw_qp_attributes
{
420 u32 sq_max_sges_rdma_write
;
424 u8 enable_rdma_write
;
426 u8 enable_mmid0_fastreg
;
431 char terminate_buffer
[52];
432 u32 terminate_msg_len
;
433 u8 is_terminate_local
;
434 struct c4iw_mpa_attributes mpa_attr
;
435 struct c4iw_ep
*llp_stream_handle
;
445 struct list_head db_fc_entry
;
446 struct c4iw_dev
*rhp
;
448 struct c4iw_qp_attributes attr
;
453 wait_queue_head_t wait
;
454 struct timer_list timer
;
458 static inline struct c4iw_qp
*to_c4iw_qp(struct ib_qp
*ibqp
)
460 return container_of(ibqp
, struct c4iw_qp
, ibqp
);
463 struct c4iw_ucontext
{
464 struct ib_ucontext ibucontext
;
465 struct c4iw_dev_ucontext uctx
;
467 spinlock_t mmap_lock
;
468 struct list_head mmaps
;
471 static inline struct c4iw_ucontext
*to_c4iw_ucontext(struct ib_ucontext
*c
)
473 return container_of(c
, struct c4iw_ucontext
, ibucontext
);
476 struct c4iw_mm_entry
{
477 struct list_head entry
;
483 static inline struct c4iw_mm_entry
*remove_mmap(struct c4iw_ucontext
*ucontext
,
484 u32 key
, unsigned len
)
486 struct list_head
*pos
, *nxt
;
487 struct c4iw_mm_entry
*mm
;
489 spin_lock(&ucontext
->mmap_lock
);
490 list_for_each_safe(pos
, nxt
, &ucontext
->mmaps
) {
492 mm
= list_entry(pos
, struct c4iw_mm_entry
, entry
);
493 if (mm
->key
== key
&& mm
->len
== len
) {
494 list_del_init(&mm
->entry
);
495 spin_unlock(&ucontext
->mmap_lock
);
496 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__
,
497 key
, (unsigned long long) mm
->addr
, mm
->len
);
501 spin_unlock(&ucontext
->mmap_lock
);
505 static inline void insert_mmap(struct c4iw_ucontext
*ucontext
,
506 struct c4iw_mm_entry
*mm
)
508 spin_lock(&ucontext
->mmap_lock
);
509 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__
,
510 mm
->key
, (unsigned long long) mm
->addr
, mm
->len
);
511 list_add_tail(&mm
->entry
, &ucontext
->mmaps
);
512 spin_unlock(&ucontext
->mmap_lock
);
515 enum c4iw_qp_attr_mask
{
516 C4IW_QP_ATTR_NEXT_STATE
= 1 << 0,
517 C4IW_QP_ATTR_SQ_DB
= 1<<1,
518 C4IW_QP_ATTR_RQ_DB
= 1<<2,
519 C4IW_QP_ATTR_ENABLE_RDMA_READ
= 1 << 7,
520 C4IW_QP_ATTR_ENABLE_RDMA_WRITE
= 1 << 8,
521 C4IW_QP_ATTR_ENABLE_RDMA_BIND
= 1 << 9,
522 C4IW_QP_ATTR_MAX_ORD
= 1 << 11,
523 C4IW_QP_ATTR_MAX_IRD
= 1 << 12,
524 C4IW_QP_ATTR_LLP_STREAM_HANDLE
= 1 << 22,
525 C4IW_QP_ATTR_STREAM_MSG_BUFFER
= 1 << 23,
526 C4IW_QP_ATTR_MPA_ATTR
= 1 << 24,
527 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE
= 1 << 25,
528 C4IW_QP_ATTR_VALID_MODIFY
= (C4IW_QP_ATTR_ENABLE_RDMA_READ
|
529 C4IW_QP_ATTR_ENABLE_RDMA_WRITE
|
530 C4IW_QP_ATTR_MAX_ORD
|
531 C4IW_QP_ATTR_MAX_IRD
|
532 C4IW_QP_ATTR_LLP_STREAM_HANDLE
|
533 C4IW_QP_ATTR_STREAM_MSG_BUFFER
|
534 C4IW_QP_ATTR_MPA_ATTR
|
535 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE
)
538 int c4iw_modify_qp(struct c4iw_dev
*rhp
,
540 enum c4iw_qp_attr_mask mask
,
541 struct c4iw_qp_attributes
*attrs
,
548 C4IW_QP_STATE_TERMINATE
,
549 C4IW_QP_STATE_CLOSING
,
553 static inline int c4iw_convert_state(enum ib_qp_state ib_state
)
558 return C4IW_QP_STATE_IDLE
;
560 return C4IW_QP_STATE_RTS
;
562 return C4IW_QP_STATE_CLOSING
;
564 return C4IW_QP_STATE_TERMINATE
;
566 return C4IW_QP_STATE_ERROR
;
572 static inline int to_ib_qp_state(int c4iw_qp_state
)
574 switch (c4iw_qp_state
) {
575 case C4IW_QP_STATE_IDLE
:
577 case C4IW_QP_STATE_RTS
:
579 case C4IW_QP_STATE_CLOSING
:
581 case C4IW_QP_STATE_TERMINATE
:
583 case C4IW_QP_STATE_ERROR
:
589 static inline u32
c4iw_ib_to_tpt_access(int a
)
591 return (a
& IB_ACCESS_REMOTE_WRITE
? FW_RI_MEM_ACCESS_REM_WRITE
: 0) |
592 (a
& IB_ACCESS_REMOTE_READ
? FW_RI_MEM_ACCESS_REM_READ
: 0) |
593 (a
& IB_ACCESS_LOCAL_WRITE
? FW_RI_MEM_ACCESS_LOCAL_WRITE
: 0) |
594 FW_RI_MEM_ACCESS_LOCAL_READ
;
597 static inline u32
c4iw_ib_to_tpt_bind_access(int acc
)
599 return (acc
& IB_ACCESS_REMOTE_WRITE
? FW_RI_MEM_ACCESS_REM_WRITE
: 0) |
600 (acc
& IB_ACCESS_REMOTE_READ
? FW_RI_MEM_ACCESS_REM_READ
: 0);
603 enum c4iw_mmid_state
{
604 C4IW_STAG_STATE_VALID
,
605 C4IW_STAG_STATE_INVALID
608 #define C4IW_NODE_DESC "cxgb4 Chelsio Communications"
610 #define MPA_KEY_REQ "MPA ID Req Frame"
611 #define MPA_KEY_REP "MPA ID Rep Frame"
613 #define MPA_MAX_PRIVATE_DATA 256
614 #define MPA_ENHANCED_RDMA_CONN 0x10
615 #define MPA_REJECT 0x20
617 #define MPA_MARKERS 0x80
618 #define MPA_FLAGS_MASK 0xE0
620 #define MPA_V2_PEER2PEER_MODEL 0x8000
621 #define MPA_V2_ZERO_LEN_FPDU_RTR 0x4000
622 #define MPA_V2_RDMA_WRITE_RTR 0x8000
623 #define MPA_V2_RDMA_READ_RTR 0x4000
624 #define MPA_V2_IRD_ORD_MASK 0x3FFF
626 #define c4iw_put_ep(ep) { \
627 PDBG("put_ep (via %s:%u) ep %p refcnt %d\n", __func__, __LINE__, \
628 ep, atomic_read(&((ep)->kref.refcount))); \
629 WARN_ON(atomic_read(&((ep)->kref.refcount)) < 1); \
630 kref_put(&((ep)->kref), _c4iw_free_ep); \
633 #define c4iw_get_ep(ep) { \
634 PDBG("get_ep (via %s:%u) ep %p, refcnt %d\n", __func__, __LINE__, \
635 ep, atomic_read(&((ep)->kref.refcount))); \
636 kref_get(&((ep)->kref)); \
638 void _c4iw_free_ep(struct kref
*kref
);
644 __be16 private_data_size
;
648 struct mpa_v2_conn_params
{
653 struct terminate_message
{
660 #define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28)
662 enum c4iw_layers_types
{
666 RDMAP_LOCAL_CATA
= 0x00,
667 RDMAP_REMOTE_PROT
= 0x01,
668 RDMAP_REMOTE_OP
= 0x02,
669 DDP_LOCAL_CATA
= 0x00,
670 DDP_TAGGED_ERR
= 0x01,
671 DDP_UNTAGGED_ERR
= 0x02,
675 enum c4iw_rdma_ecodes
{
676 RDMAP_INV_STAG
= 0x00,
677 RDMAP_BASE_BOUNDS
= 0x01,
678 RDMAP_ACC_VIOL
= 0x02,
679 RDMAP_STAG_NOT_ASSOC
= 0x03,
680 RDMAP_TO_WRAP
= 0x04,
681 RDMAP_INV_VERS
= 0x05,
682 RDMAP_INV_OPCODE
= 0x06,
683 RDMAP_STREAM_CATA
= 0x07,
684 RDMAP_GLOBAL_CATA
= 0x08,
685 RDMAP_CANT_INV_STAG
= 0x09,
686 RDMAP_UNSPECIFIED
= 0xff
689 enum c4iw_ddp_ecodes
{
690 DDPT_INV_STAG
= 0x00,
691 DDPT_BASE_BOUNDS
= 0x01,
692 DDPT_STAG_NOT_ASSOC
= 0x02,
694 DDPT_INV_VERS
= 0x04,
696 DDPU_INV_MSN_NOBUF
= 0x02,
697 DDPU_INV_MSN_RANGE
= 0x03,
699 DDPU_MSG_TOOBIG
= 0x05,
703 enum c4iw_mpa_ecodes
{
705 MPA_MARKER_ERR
= 0x03,
706 MPA_LOCAL_CATA
= 0x05,
707 MPA_INSUFF_IRD
= 0x06,
708 MPA_NOMATCH_RTR
= 0x07,
727 PEER_ABORT_IN_PROGRESS
= 0,
728 ABORT_REQ_IN_PROGRESS
= 1,
729 RELEASE_RESOURCES
= 2,
736 enum c4iw_ep_history
{
756 CONN_RPL_UPCALL
= 19,
757 ACT_RETRY_NOMEM
= 20,
761 struct c4iw_ep_common
{
762 struct iw_cm_id
*cm_id
;
764 struct c4iw_dev
*dev
;
765 enum c4iw_ep_state state
;
768 struct sockaddr_storage local_addr
;
769 struct sockaddr_storage remote_addr
;
770 struct sockaddr_storage mapped_local_addr
;
771 struct sockaddr_storage mapped_remote_addr
;
772 struct c4iw_wr_wait wr_wait
;
774 unsigned long history
;
777 struct c4iw_listen_ep
{
778 struct c4iw_ep_common com
;
784 struct c4iw_ep_common com
;
785 struct c4iw_ep
*parent_ep
;
786 struct timer_list timer
;
787 struct list_head entry
;
792 struct l2t_entry
*l2t
;
793 struct dst_entry
*dst
;
794 struct sk_buff
*mpa_skb
;
795 struct c4iw_mpa_attributes mpa_attr
;
796 u8 mpa_pkt
[sizeof(struct mpa_message
) + MPA_MAX_PRIVATE_DATA
];
797 unsigned int mpa_pkt_len
;
810 u8 retry_with_mpa_v1
;
811 u8 tried_with_mpa_v1
;
812 unsigned int retry_count
;
817 static inline void print_addr(struct c4iw_ep_common
*epc
, const char *func
,
821 #define SINA(a) (&(((struct sockaddr_in *)(a))->sin_addr.s_addr))
822 #define SINP(a) ntohs(((struct sockaddr_in *)(a))->sin_port)
823 #define SIN6A(a) (&(((struct sockaddr_in6 *)(a))->sin6_addr))
824 #define SIN6P(a) ntohs(((struct sockaddr_in6 *)(a))->sin6_port)
827 switch (epc
->local_addr
.ss_family
) {
829 PDBG("%s %s %pI4:%u/%u <-> %pI4:%u/%u\n",
830 func
, msg
, SINA(&epc
->local_addr
),
831 SINP(&epc
->local_addr
),
832 SINP(&epc
->mapped_local_addr
),
833 SINA(&epc
->remote_addr
),
834 SINP(&epc
->remote_addr
),
835 SINP(&epc
->mapped_remote_addr
));
838 PDBG("%s %s %pI6:%u/%u <-> %pI6:%u/%u\n",
839 func
, msg
, SIN6A(&epc
->local_addr
),
840 SIN6P(&epc
->local_addr
),
841 SIN6P(&epc
->mapped_local_addr
),
842 SIN6A(&epc
->remote_addr
),
843 SIN6P(&epc
->remote_addr
),
844 SIN6P(&epc
->mapped_remote_addr
));
856 static inline struct c4iw_ep
*to_ep(struct iw_cm_id
*cm_id
)
858 return cm_id
->provider_data
;
861 static inline struct c4iw_listen_ep
*to_listen_ep(struct iw_cm_id
*cm_id
)
863 return cm_id
->provider_data
;
866 static inline int compute_wscale(int win
)
870 while (wscale
< 14 && (65535<<wscale
) < win
)
875 static inline int ocqp_supported(const struct cxgb4_lld_info
*infop
)
877 #if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64)
878 return infop
->vr
->ocq
.size
> 0;
884 u32
c4iw_id_alloc(struct c4iw_id_table
*alloc
);
885 void c4iw_id_free(struct c4iw_id_table
*alloc
, u32 obj
);
886 int c4iw_id_table_alloc(struct c4iw_id_table
*alloc
, u32 start
, u32 num
,
887 u32 reserved
, u32 flags
);
888 void c4iw_id_table_free(struct c4iw_id_table
*alloc
);
890 typedef int (*c4iw_handler_func
)(struct c4iw_dev
*dev
, struct sk_buff
*skb
);
892 int c4iw_ep_redirect(void *ctx
, struct dst_entry
*old
, struct dst_entry
*new,
893 struct l2t_entry
*l2t
);
894 void c4iw_put_qpid(struct c4iw_rdev
*rdev
, u32 qpid
,
895 struct c4iw_dev_ucontext
*uctx
);
896 u32
c4iw_get_resource(struct c4iw_id_table
*id_table
);
897 void c4iw_put_resource(struct c4iw_id_table
*id_table
, u32 entry
);
898 int c4iw_init_resource(struct c4iw_rdev
*rdev
, u32 nr_tpt
, u32 nr_pdid
);
899 int c4iw_init_ctrl_qp(struct c4iw_rdev
*rdev
);
900 int c4iw_pblpool_create(struct c4iw_rdev
*rdev
);
901 int c4iw_rqtpool_create(struct c4iw_rdev
*rdev
);
902 int c4iw_ocqp_pool_create(struct c4iw_rdev
*rdev
);
903 void c4iw_pblpool_destroy(struct c4iw_rdev
*rdev
);
904 void c4iw_rqtpool_destroy(struct c4iw_rdev
*rdev
);
905 void c4iw_ocqp_pool_destroy(struct c4iw_rdev
*rdev
);
906 void c4iw_destroy_resource(struct c4iw_resource
*rscp
);
907 int c4iw_destroy_ctrl_qp(struct c4iw_rdev
*rdev
);
908 int c4iw_register_device(struct c4iw_dev
*dev
);
909 void c4iw_unregister_device(struct c4iw_dev
*dev
);
910 int __init
c4iw_cm_init(void);
911 void __exit
c4iw_cm_term(void);
912 void c4iw_release_dev_ucontext(struct c4iw_rdev
*rdev
,
913 struct c4iw_dev_ucontext
*uctx
);
914 void c4iw_init_dev_ucontext(struct c4iw_rdev
*rdev
,
915 struct c4iw_dev_ucontext
*uctx
);
916 int c4iw_poll_cq(struct ib_cq
*ibcq
, int num_entries
, struct ib_wc
*wc
);
917 int c4iw_post_send(struct ib_qp
*ibqp
, struct ib_send_wr
*wr
,
918 struct ib_send_wr
**bad_wr
);
919 int c4iw_post_receive(struct ib_qp
*ibqp
, struct ib_recv_wr
*wr
,
920 struct ib_recv_wr
**bad_wr
);
921 int c4iw_bind_mw(struct ib_qp
*qp
, struct ib_mw
*mw
,
922 struct ib_mw_bind
*mw_bind
);
923 int c4iw_connect(struct iw_cm_id
*cm_id
, struct iw_cm_conn_param
*conn_param
);
924 int c4iw_create_listen(struct iw_cm_id
*cm_id
, int backlog
);
925 int c4iw_destroy_listen(struct iw_cm_id
*cm_id
);
926 int c4iw_accept_cr(struct iw_cm_id
*cm_id
, struct iw_cm_conn_param
*conn_param
);
927 int c4iw_reject_cr(struct iw_cm_id
*cm_id
, const void *pdata
, u8 pdata_len
);
928 void c4iw_qp_add_ref(struct ib_qp
*qp
);
929 void c4iw_qp_rem_ref(struct ib_qp
*qp
);
930 void c4iw_free_fastreg_pbl(struct ib_fast_reg_page_list
*page_list
);
931 struct ib_fast_reg_page_list
*c4iw_alloc_fastreg_pbl(
932 struct ib_device
*device
,
934 struct ib_mr
*c4iw_alloc_fast_reg_mr(struct ib_pd
*pd
, int pbl_depth
);
935 int c4iw_dealloc_mw(struct ib_mw
*mw
);
936 struct ib_mw
*c4iw_alloc_mw(struct ib_pd
*pd
, enum ib_mw_type type
);
937 struct ib_mr
*c4iw_reg_user_mr(struct ib_pd
*pd
, u64 start
,
938 u64 length
, u64 virt
, int acc
,
939 struct ib_udata
*udata
);
940 struct ib_mr
*c4iw_get_dma_mr(struct ib_pd
*pd
, int acc
);
941 struct ib_mr
*c4iw_register_phys_mem(struct ib_pd
*pd
,
942 struct ib_phys_buf
*buffer_list
,
946 int c4iw_reregister_phys_mem(struct ib_mr
*mr
,
949 struct ib_phys_buf
*buffer_list
,
951 int acc
, u64
*iova_start
);
952 int c4iw_dereg_mr(struct ib_mr
*ib_mr
);
953 int c4iw_destroy_cq(struct ib_cq
*ib_cq
);
954 struct ib_cq
*c4iw_create_cq(struct ib_device
*ibdev
, int entries
,
956 struct ib_ucontext
*ib_context
,
957 struct ib_udata
*udata
);
958 int c4iw_resize_cq(struct ib_cq
*cq
, int cqe
, struct ib_udata
*udata
);
959 int c4iw_arm_cq(struct ib_cq
*ibcq
, enum ib_cq_notify_flags flags
);
960 int c4iw_destroy_qp(struct ib_qp
*ib_qp
);
961 struct ib_qp
*c4iw_create_qp(struct ib_pd
*pd
,
962 struct ib_qp_init_attr
*attrs
,
963 struct ib_udata
*udata
);
964 int c4iw_ib_modify_qp(struct ib_qp
*ibqp
, struct ib_qp_attr
*attr
,
965 int attr_mask
, struct ib_udata
*udata
);
966 int c4iw_ib_query_qp(struct ib_qp
*ibqp
, struct ib_qp_attr
*attr
,
967 int attr_mask
, struct ib_qp_init_attr
*init_attr
);
968 struct ib_qp
*c4iw_get_qp(struct ib_device
*dev
, int qpn
);
969 u32
c4iw_rqtpool_alloc(struct c4iw_rdev
*rdev
, int size
);
970 void c4iw_rqtpool_free(struct c4iw_rdev
*rdev
, u32 addr
, int size
);
971 u32
c4iw_pblpool_alloc(struct c4iw_rdev
*rdev
, int size
);
972 void c4iw_pblpool_free(struct c4iw_rdev
*rdev
, u32 addr
, int size
);
973 u32
c4iw_ocqp_pool_alloc(struct c4iw_rdev
*rdev
, int size
);
974 void c4iw_ocqp_pool_free(struct c4iw_rdev
*rdev
, u32 addr
, int size
);
975 int c4iw_ofld_send(struct c4iw_rdev
*rdev
, struct sk_buff
*skb
);
976 void c4iw_flush_hw_cq(struct c4iw_cq
*chp
);
977 void c4iw_count_rcqes(struct t4_cq
*cq
, struct t4_wq
*wq
, int *count
);
978 int c4iw_ep_disconnect(struct c4iw_ep
*ep
, int abrupt
, gfp_t gfp
);
979 int c4iw_flush_rq(struct t4_wq
*wq
, struct t4_cq
*cq
, int count
);
980 int c4iw_flush_sq(struct c4iw_qp
*qhp
);
981 int c4iw_ev_handler(struct c4iw_dev
*rnicp
, u32 qid
);
982 u16
c4iw_rqes_posted(struct c4iw_qp
*qhp
);
983 int c4iw_post_terminate(struct c4iw_qp
*qhp
, struct t4_cqe
*err_cqe
);
984 u32
c4iw_get_cqid(struct c4iw_rdev
*rdev
, struct c4iw_dev_ucontext
*uctx
);
985 void c4iw_put_cqid(struct c4iw_rdev
*rdev
, u32 qid
,
986 struct c4iw_dev_ucontext
*uctx
);
987 u32
c4iw_get_qpid(struct c4iw_rdev
*rdev
, struct c4iw_dev_ucontext
*uctx
);
988 void c4iw_put_qpid(struct c4iw_rdev
*rdev
, u32 qid
,
989 struct c4iw_dev_ucontext
*uctx
);
990 void c4iw_ev_dispatch(struct c4iw_dev
*dev
, struct t4_cqe
*err_cqe
);
992 extern struct cxgb4_client t4c_client
;
993 extern c4iw_handler_func c4iw_handlers
[NUM_CPL_CMDS
];
994 extern int c4iw_max_read_depth
;
995 extern int db_fc_threshold
;
996 extern int db_coalescing_threshold
;