2 * Copyright(c) 2015, 2016 Intel Corporation.
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 #include <linux/firmware.h>
54 #define DEFAULT_PLATFORM_CONFIG_NAME "hfi1_platform.dat"
56 static int validate_scratch_checksum(struct hfi1_devdata
*dd
)
58 u64 checksum
= 0, temp_scratch
= 0;
61 temp_scratch
= read_csr(dd
, ASIC_CFG_SCRATCH
);
62 version
= (temp_scratch
& BITMAP_VERSION_SMASK
) >> BITMAP_VERSION_SHIFT
;
64 /* Prevent power on default of all zeroes from passing checksum */
66 dd_dev_err(dd
, "%s: Config bitmap uninitialized\n", __func__
);
68 "%s: Please update your BIOS to support active channels\n",
74 * ASIC scratch 0 only contains the checksum and bitmap version as
75 * fields of interest, both of which are handled separately from the
76 * loop below, so skip it
79 for (i
= 1; i
< ASIC_NUM_SCRATCH
; i
++) {
80 temp_scratch
= read_csr(dd
, ASIC_CFG_SCRATCH
+ (8 * i
));
81 for (j
= sizeof(u64
); j
!= 0; j
-= 2) {
82 checksum
+= (temp_scratch
& 0xFFFF);
87 while (checksum
>> 16)
88 checksum
= (checksum
& CHECKSUM_MASK
) + (checksum
>> 16);
90 temp_scratch
= read_csr(dd
, ASIC_CFG_SCRATCH
);
91 temp_scratch
&= CHECKSUM_SMASK
;
92 temp_scratch
>>= CHECKSUM_SHIFT
;
94 if (checksum
+ temp_scratch
== 0xFFFF)
97 dd_dev_err(dd
, "%s: Configuration bitmap corrupted\n", __func__
);
101 static void save_platform_config_fields(struct hfi1_devdata
*dd
)
103 struct hfi1_pportdata
*ppd
= dd
->pport
;
104 u64 temp_scratch
= 0, temp_dest
= 0;
106 temp_scratch
= read_csr(dd
, ASIC_CFG_SCRATCH_1
);
108 temp_dest
= temp_scratch
&
109 (dd
->hfi1_id
? PORT1_PORT_TYPE_SMASK
:
110 PORT0_PORT_TYPE_SMASK
);
111 ppd
->port_type
= temp_dest
>>
112 (dd
->hfi1_id
? PORT1_PORT_TYPE_SHIFT
:
113 PORT0_PORT_TYPE_SHIFT
);
115 temp_dest
= temp_scratch
&
116 (dd
->hfi1_id
? PORT1_LOCAL_ATTEN_SMASK
:
117 PORT0_LOCAL_ATTEN_SMASK
);
118 ppd
->local_atten
= temp_dest
>>
119 (dd
->hfi1_id
? PORT1_LOCAL_ATTEN_SHIFT
:
120 PORT0_LOCAL_ATTEN_SHIFT
);
122 temp_dest
= temp_scratch
&
123 (dd
->hfi1_id
? PORT1_REMOTE_ATTEN_SMASK
:
124 PORT0_REMOTE_ATTEN_SMASK
);
125 ppd
->remote_atten
= temp_dest
>>
126 (dd
->hfi1_id
? PORT1_REMOTE_ATTEN_SHIFT
:
127 PORT0_REMOTE_ATTEN_SHIFT
);
129 temp_dest
= temp_scratch
&
130 (dd
->hfi1_id
? PORT1_DEFAULT_ATTEN_SMASK
:
131 PORT0_DEFAULT_ATTEN_SMASK
);
132 ppd
->default_atten
= temp_dest
>>
133 (dd
->hfi1_id
? PORT1_DEFAULT_ATTEN_SHIFT
:
134 PORT0_DEFAULT_ATTEN_SHIFT
);
136 temp_scratch
= read_csr(dd
, dd
->hfi1_id
? ASIC_CFG_SCRATCH_3
:
139 ppd
->tx_preset_eq
= (temp_scratch
& TX_EQ_SMASK
) >> TX_EQ_SHIFT
;
140 ppd
->tx_preset_noeq
= (temp_scratch
& TX_NO_EQ_SMASK
) >> TX_NO_EQ_SHIFT
;
141 ppd
->rx_preset
= (temp_scratch
& RX_SMASK
) >> RX_SHIFT
;
143 ppd
->max_power_class
= (temp_scratch
& QSFP_MAX_POWER_SMASK
) >>
144 QSFP_MAX_POWER_SHIFT
;
146 ppd
->config_from_scratch
= true;
149 void get_platform_config(struct hfi1_devdata
*dd
)
152 u8
*temp_platform_config
= NULL
;
154 const struct firmware
*platform_config_file
= NULL
;
156 if (is_integrated(dd
)) {
157 if (validate_scratch_checksum(dd
)) {
158 save_platform_config_fields(dd
);
162 ret
= eprom_read_platform_config(dd
,
163 (void **)&temp_platform_config
,
167 dd
->platform_config
.data
= temp_platform_config
;
168 dd
->platform_config
.size
= esize
;
173 "%s: Failed to get platform config, falling back to sub-optimal default file\n",
176 ret
= request_firmware(&platform_config_file
,
177 DEFAULT_PLATFORM_CONFIG_NAME
,
181 "%s: No default platform config file found\n",
187 * Allocate separate memory block to store data and free firmware
188 * structure. This allows free_platform_config to treat EPROM and
189 * fallback configs in the same manner.
191 dd
->platform_config
.data
= kmemdup(platform_config_file
->data
,
192 platform_config_file
->size
,
194 dd
->platform_config
.size
= platform_config_file
->size
;
195 release_firmware(platform_config_file
);
198 void free_platform_config(struct hfi1_devdata
*dd
)
200 /* Release memory allocated for eprom or fallback file read. */
201 kfree(dd
->platform_config
.data
);
204 void get_port_type(struct hfi1_pportdata
*ppd
)
209 ret
= get_platform_config_field(ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
210 PORT_TABLE_PORT_TYPE
, &temp
,
213 ppd
->port_type
= PORT_TYPE_UNKNOWN
;
216 ppd
->port_type
= temp
;
219 int set_qsfp_tx(struct hfi1_pportdata
*ppd
, int on
)
221 u8 tx_ctrl_byte
= on
? 0x0 : 0xF;
224 ret
= qsfp_write(ppd
, ppd
->dd
->hfi1_id
, QSFP_TX_CTRL_BYTE_OFFS
,
226 /* we expected 1, so consider 0 an error */
234 static int qual_power(struct hfi1_pportdata
*ppd
)
236 u32 cable_power_class
= 0, power_class_max
= 0;
237 u8
*cache
= ppd
->qsfp_info
.cache
;
240 ret
= get_platform_config_field(
241 ppd
->dd
, PLATFORM_CONFIG_SYSTEM_TABLE
, 0,
242 SYSTEM_TABLE_QSFP_POWER_CLASS_MAX
, &power_class_max
, 4);
246 cable_power_class
= get_qsfp_power_class(cache
[QSFP_MOD_PWR_OFFS
]);
248 if (cable_power_class
> power_class_max
)
249 ppd
->offline_disabled_reason
=
250 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_POWER_POLICY
);
252 if (ppd
->offline_disabled_reason
==
253 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_POWER_POLICY
)) {
256 "%s: Port disabled due to system power restrictions\n",
263 static int qual_bitrate(struct hfi1_pportdata
*ppd
)
265 u16 lss
= ppd
->link_speed_supported
, lse
= ppd
->link_speed_enabled
;
266 u8
*cache
= ppd
->qsfp_info
.cache
;
268 if ((lss
& OPA_LINK_SPEED_25G
) && (lse
& OPA_LINK_SPEED_25G
) &&
269 cache
[QSFP_NOM_BIT_RATE_250_OFFS
] < 0x64)
270 ppd
->offline_disabled_reason
=
271 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_LINKSPEED_POLICY
);
273 if ((lss
& OPA_LINK_SPEED_12_5G
) && (lse
& OPA_LINK_SPEED_12_5G
) &&
274 cache
[QSFP_NOM_BIT_RATE_100_OFFS
] < 0x7D)
275 ppd
->offline_disabled_reason
=
276 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_LINKSPEED_POLICY
);
278 if (ppd
->offline_disabled_reason
==
279 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_LINKSPEED_POLICY
)) {
282 "%s: Cable failed bitrate check, disabling port\n",
289 static int set_qsfp_high_power(struct hfi1_pportdata
*ppd
)
291 u8 cable_power_class
= 0, power_ctrl_byte
= 0;
292 u8
*cache
= ppd
->qsfp_info
.cache
;
295 cable_power_class
= get_qsfp_power_class(cache
[QSFP_MOD_PWR_OFFS
]);
297 if (cable_power_class
> QSFP_POWER_CLASS_1
) {
298 power_ctrl_byte
= cache
[QSFP_PWR_CTRL_BYTE_OFFS
];
300 power_ctrl_byte
|= 1;
301 power_ctrl_byte
&= ~(0x2);
303 ret
= qsfp_write(ppd
, ppd
->dd
->hfi1_id
,
304 QSFP_PWR_CTRL_BYTE_OFFS
,
305 &power_ctrl_byte
, 1);
309 if (cable_power_class
> QSFP_POWER_CLASS_4
) {
310 power_ctrl_byte
|= (1 << 2);
311 ret
= qsfp_write(ppd
, ppd
->dd
->hfi1_id
,
312 QSFP_PWR_CTRL_BYTE_OFFS
,
313 &power_ctrl_byte
, 1);
318 /* SFF 8679 rev 1.7 LPMode Deassert time */
324 static void apply_rx_cdr(struct hfi1_pportdata
*ppd
,
329 u8
*cache
= ppd
->qsfp_info
.cache
;
330 int cable_power_class
;
332 if (!((cache
[QSFP_MOD_PWR_OFFS
] & 0x4) &&
333 (cache
[QSFP_CDR_INFO_OFFS
] & 0x40)))
336 /* RX CDR present, bypass supported */
337 cable_power_class
= get_qsfp_power_class(cache
[QSFP_MOD_PWR_OFFS
]);
339 if (cable_power_class
<= QSFP_POWER_CLASS_3
) {
340 /* Power class <= 3, ignore config & turn RX CDR on */
341 *cdr_ctrl_byte
|= 0xF;
345 get_platform_config_field(
346 ppd
->dd
, PLATFORM_CONFIG_RX_PRESET_TABLE
,
347 rx_preset_index
, RX_PRESET_TABLE_QSFP_RX_CDR_APPLY
,
353 "%s: RX_CDR_APPLY is set to disabled\n",
357 get_platform_config_field(
358 ppd
->dd
, PLATFORM_CONFIG_RX_PRESET_TABLE
,
359 rx_preset_index
, RX_PRESET_TABLE_QSFP_RX_CDR
,
362 /* Expand cdr setting to all 4 lanes */
363 rx_preset
= (rx_preset
| (rx_preset
<< 1) |
364 (rx_preset
<< 2) | (rx_preset
<< 3));
367 *cdr_ctrl_byte
|= rx_preset
;
369 *cdr_ctrl_byte
&= rx_preset
;
370 /* Preserve current TX CDR status */
371 *cdr_ctrl_byte
|= (cache
[QSFP_CDR_CTRL_BYTE_OFFS
] & 0xF0);
375 static void apply_tx_cdr(struct hfi1_pportdata
*ppd
,
380 u8
*cache
= ppd
->qsfp_info
.cache
;
381 int cable_power_class
;
383 if (!((cache
[QSFP_MOD_PWR_OFFS
] & 0x8) &&
384 (cache
[QSFP_CDR_INFO_OFFS
] & 0x80)))
387 /* TX CDR present, bypass supported */
388 cable_power_class
= get_qsfp_power_class(cache
[QSFP_MOD_PWR_OFFS
]);
390 if (cable_power_class
<= QSFP_POWER_CLASS_3
) {
391 /* Power class <= 3, ignore config & turn TX CDR on */
392 *cdr_ctrl_byte
|= 0xF0;
396 get_platform_config_field(
398 PLATFORM_CONFIG_TX_PRESET_TABLE
, tx_preset_index
,
399 TX_PRESET_TABLE_QSFP_TX_CDR_APPLY
, &tx_preset
, 4);
404 "%s: TX_CDR_APPLY is set to disabled\n",
408 get_platform_config_field(
410 PLATFORM_CONFIG_TX_PRESET_TABLE
,
412 TX_PRESET_TABLE_QSFP_TX_CDR
, &tx_preset
, 4);
414 /* Expand cdr setting to all 4 lanes */
415 tx_preset
= (tx_preset
| (tx_preset
<< 1) |
416 (tx_preset
<< 2) | (tx_preset
<< 3));
419 *cdr_ctrl_byte
|= (tx_preset
<< 4);
421 /* Preserve current/determined RX CDR status */
422 *cdr_ctrl_byte
&= ((tx_preset
<< 4) | 0xF);
425 static void apply_cdr_settings(
426 struct hfi1_pportdata
*ppd
, u32 rx_preset_index
,
429 u8
*cache
= ppd
->qsfp_info
.cache
;
430 u8 cdr_ctrl_byte
= cache
[QSFP_CDR_CTRL_BYTE_OFFS
];
432 apply_rx_cdr(ppd
, rx_preset_index
, &cdr_ctrl_byte
);
434 apply_tx_cdr(ppd
, tx_preset_index
, &cdr_ctrl_byte
);
436 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, QSFP_CDR_CTRL_BYTE_OFFS
,
440 static void apply_tx_eq_auto(struct hfi1_pportdata
*ppd
)
442 u8
*cache
= ppd
->qsfp_info
.cache
;
445 if (!(cache
[QSFP_EQ_INFO_OFFS
] & 0x8))
447 /* Disable adaptive TX EQ if present */
448 tx_eq
= cache
[(128 * 3) + 241];
450 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, (256 * 3) + 241, &tx_eq
, 1);
453 static void apply_tx_eq_prog(struct hfi1_pportdata
*ppd
, u32 tx_preset_index
)
455 u8
*cache
= ppd
->qsfp_info
.cache
;
459 if (!(cache
[QSFP_EQ_INFO_OFFS
] & 0x4))
462 get_platform_config_field(
463 ppd
->dd
, PLATFORM_CONFIG_TX_PRESET_TABLE
,
464 tx_preset_index
, TX_PRESET_TABLE_QSFP_TX_EQ_APPLY
,
469 "%s: TX_EQ_APPLY is set to disabled\n",
473 get_platform_config_field(
474 ppd
->dd
, PLATFORM_CONFIG_TX_PRESET_TABLE
,
475 tx_preset_index
, TX_PRESET_TABLE_QSFP_TX_EQ
,
478 if (((cache
[(128 * 3) + 224] & 0xF0) >> 4) < tx_preset
) {
481 "%s: TX EQ %x unsupported\n",
482 __func__
, tx_preset
);
486 "%s: Applying EQ %x\n",
487 __func__
, cache
[608] & 0xF0);
489 tx_preset
= (cache
[608] & 0xF0) >> 4;
492 tx_eq
= tx_preset
| (tx_preset
<< 4);
493 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, (256 * 3) + 234, &tx_eq
, 1);
494 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, (256 * 3) + 235, &tx_eq
, 1);
497 static void apply_rx_eq_emp(struct hfi1_pportdata
*ppd
, u32 rx_preset_index
)
500 u8 rx_eq
, *cache
= ppd
->qsfp_info
.cache
;
502 if (!(cache
[QSFP_EQ_INFO_OFFS
] & 0x2))
504 get_platform_config_field(
505 ppd
->dd
, PLATFORM_CONFIG_RX_PRESET_TABLE
,
506 rx_preset_index
, RX_PRESET_TABLE_QSFP_RX_EMP_APPLY
,
512 "%s: RX_EMP_APPLY is set to disabled\n",
516 get_platform_config_field(
517 ppd
->dd
, PLATFORM_CONFIG_RX_PRESET_TABLE
,
518 rx_preset_index
, RX_PRESET_TABLE_QSFP_RX_EMP
,
521 if ((cache
[(128 * 3) + 224] & 0xF) < rx_preset
) {
524 "%s: Requested RX EMP %x\n",
525 __func__
, rx_preset
);
529 "%s: Applying supported EMP %x\n",
530 __func__
, cache
[608] & 0xF);
532 rx_preset
= cache
[608] & 0xF;
535 rx_eq
= rx_preset
| (rx_preset
<< 4);
537 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, (256 * 3) + 236, &rx_eq
, 1);
538 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, (256 * 3) + 237, &rx_eq
, 1);
541 static void apply_eq_settings(struct hfi1_pportdata
*ppd
,
542 u32 rx_preset_index
, u32 tx_preset_index
)
544 u8
*cache
= ppd
->qsfp_info
.cache
;
546 /* no point going on w/o a page 3 */
549 "%s: Upper page 03 not present\n",
554 apply_tx_eq_auto(ppd
);
556 apply_tx_eq_prog(ppd
, tx_preset_index
);
558 apply_rx_eq_emp(ppd
, rx_preset_index
);
561 static void apply_rx_amplitude_settings(
562 struct hfi1_pportdata
*ppd
, u32 rx_preset_index
,
566 u8 rx_amp
= 0, i
= 0, preferred
= 0, *cache
= ppd
->qsfp_info
.cache
;
568 /* no point going on w/o a page 3 */
571 "%s: Upper page 03 not present\n",
575 if (!(cache
[QSFP_EQ_INFO_OFFS
] & 0x1)) {
577 "%s: RX_AMP_APPLY is set to disabled\n",
582 get_platform_config_field(ppd
->dd
,
583 PLATFORM_CONFIG_RX_PRESET_TABLE
,
585 RX_PRESET_TABLE_QSFP_RX_AMP_APPLY
,
590 "%s: RX_AMP_APPLY is set to disabled\n",
594 get_platform_config_field(ppd
->dd
,
595 PLATFORM_CONFIG_RX_PRESET_TABLE
,
597 RX_PRESET_TABLE_QSFP_RX_AMP
,
601 "%s: Requested RX AMP %x\n",
605 for (i
= 0; i
< 4; i
++) {
606 if (cache
[(128 * 3) + 225] & (1 << i
)) {
608 if (preferred
== rx_preset
)
614 * Verify that preferred RX amplitude is not just a
615 * fall through of the default
617 if (!preferred
&& !(cache
[(128 * 3) + 225] & 0x1)) {
618 dd_dev_info(ppd
->dd
, "No supported RX AMP, not applying\n");
623 "%s: Applying RX AMP %x\n", __func__
, preferred
);
625 rx_amp
= preferred
| (preferred
<< 4);
626 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, (256 * 3) + 238, &rx_amp
, 1);
627 qsfp_write(ppd
, ppd
->dd
->hfi1_id
, (256 * 3) + 239, &rx_amp
, 1);
630 #define OPA_INVALID_INDEX 0xFFF
632 static void apply_tx_lanes(struct hfi1_pportdata
*ppd
, u8 field_id
,
633 u32 config_data
, const char *message
)
636 int ret
= HCMD_SUCCESS
;
638 for (i
= 0; i
< 4; i
++) {
639 ret
= load_8051_config(ppd
->dd
, field_id
, i
, config_data
);
640 if (ret
!= HCMD_SUCCESS
) {
643 "%s: %s for lane %u failed\n",
644 message
, __func__
, i
);
650 * Return a special SerDes setting for low power AOC cables. The power class
651 * threshold and setting being used were all found by empirical testing.
653 * Summary of the logic:
655 * if (QSFP and QSFP_TYPE == AOC and QSFP_POWER_CLASS < 4)
657 * return 0; // leave at default
659 static u8
aoc_low_power_setting(struct hfi1_pportdata
*ppd
)
661 u8
*cache
= ppd
->qsfp_info
.cache
;
665 if (ppd
->port_type
!= PORT_TYPE_QSFP
)
666 return 0; /* leave at default */
668 /* active optical cables only */
669 switch ((cache
[QSFP_MOD_TECH_OFFS
] & 0xF0) >> 4) {
670 case 0x0 ... 0x9: /* fallthrough */
671 case 0xC: /* fallthrough */
674 power_class
= get_qsfp_power_class(cache
[QSFP_MOD_PWR_OFFS
]);
675 if (power_class
< QSFP_POWER_CLASS_4
)
678 return 0; /* leave at default */
681 static void apply_tunings(
682 struct hfi1_pportdata
*ppd
, u32 tx_preset_index
,
683 u8 tuning_method
, u32 total_atten
, u8 limiting_active
)
686 u32 config_data
= 0, tx_preset
= 0;
687 u8 precur
= 0, attn
= 0, postcur
= 0, external_device_config
= 0;
688 u8
*cache
= ppd
->qsfp_info
.cache
;
690 /* Pass tuning method to 8051 */
691 read_8051_config(ppd
->dd
, LINK_TUNING_PARAMETERS
, GENERAL_CONFIG
,
693 config_data
&= ~(0xff << TUNING_METHOD_SHIFT
);
694 config_data
|= ((u32
)tuning_method
<< TUNING_METHOD_SHIFT
);
695 ret
= load_8051_config(ppd
->dd
, LINK_TUNING_PARAMETERS
, GENERAL_CONFIG
,
697 if (ret
!= HCMD_SUCCESS
)
698 dd_dev_err(ppd
->dd
, "%s: Failed to set tuning method\n",
701 /* Set same channel loss for both TX and RX */
702 config_data
= 0 | (total_atten
<< 16) | (total_atten
<< 24);
703 apply_tx_lanes(ppd
, CHANNEL_LOSS_SETTINGS
, config_data
,
704 "Setting channel loss");
706 /* Inform 8051 of cable capabilities */
707 if (ppd
->qsfp_info
.cache_valid
) {
708 external_device_config
=
709 ((cache
[QSFP_MOD_PWR_OFFS
] & 0x4) << 3) |
710 ((cache
[QSFP_MOD_PWR_OFFS
] & 0x8) << 2) |
711 ((cache
[QSFP_EQ_INFO_OFFS
] & 0x2) << 1) |
712 (cache
[QSFP_EQ_INFO_OFFS
] & 0x4);
713 ret
= read_8051_config(ppd
->dd
, DC_HOST_COMM_SETTINGS
,
714 GENERAL_CONFIG
, &config_data
);
715 /* Clear, then set the external device config field */
716 config_data
&= ~(u32
)0xFF;
717 config_data
|= external_device_config
;
718 ret
= load_8051_config(ppd
->dd
, DC_HOST_COMM_SETTINGS
,
719 GENERAL_CONFIG
, config_data
);
720 if (ret
!= HCMD_SUCCESS
)
722 "%s: Failed set ext device config params\n",
726 if (tx_preset_index
== OPA_INVALID_INDEX
) {
727 if (ppd
->port_type
== PORT_TYPE_QSFP
&& limiting_active
)
728 dd_dev_err(ppd
->dd
, "%s: Invalid Tx preset index\n",
733 /* Following for limiting active channels only */
734 get_platform_config_field(
735 ppd
->dd
, PLATFORM_CONFIG_TX_PRESET_TABLE
, tx_preset_index
,
736 TX_PRESET_TABLE_PRECUR
, &tx_preset
, 4);
739 get_platform_config_field(
740 ppd
->dd
, PLATFORM_CONFIG_TX_PRESET_TABLE
,
741 tx_preset_index
, TX_PRESET_TABLE_ATTN
, &tx_preset
, 4);
744 get_platform_config_field(
745 ppd
->dd
, PLATFORM_CONFIG_TX_PRESET_TABLE
,
746 tx_preset_index
, TX_PRESET_TABLE_POSTCUR
, &tx_preset
, 4);
751 * o The aoc_low_power_setting is applied to all lanes even
752 * though only lane 0's value is examined by the firmware.
753 * o A lingering low power setting after a cable swap does
754 * not occur. On cable unplug the 8051 is reset and
755 * restarted on cable insert. This resets all settings to
756 * their default, erasing any previous low power setting.
758 config_data
= precur
| (attn
<< 8) | (postcur
<< 16) |
759 (aoc_low_power_setting(ppd
) << 24);
761 apply_tx_lanes(ppd
, TX_EQ_SETTINGS
, config_data
,
762 "Applying TX settings");
765 /* Must be holding the QSFP i2c resource */
766 static int tune_active_qsfp(struct hfi1_pportdata
*ppd
, u32
*ptr_tx_preset
,
767 u32
*ptr_rx_preset
, u32
*ptr_total_atten
)
770 u16 lss
= ppd
->link_speed_supported
, lse
= ppd
->link_speed_enabled
;
771 u8
*cache
= ppd
->qsfp_info
.cache
;
773 ppd
->qsfp_info
.limiting_active
= 1;
775 ret
= set_qsfp_tx(ppd
, 0);
779 ret
= qual_power(ppd
);
783 ret
= qual_bitrate(ppd
);
788 * We'll change the QSFP memory contents from here on out, thus we set a
789 * flag here to remind ourselves to reset the QSFP module. This prevents
790 * reuse of stale settings established in our previous pass through.
792 if (ppd
->qsfp_info
.reset_needed
) {
794 refresh_qsfp_cache(ppd
, &ppd
->qsfp_info
);
796 ppd
->qsfp_info
.reset_needed
= 1;
799 ret
= set_qsfp_high_power(ppd
);
803 if (cache
[QSFP_EQ_INFO_OFFS
] & 0x4) {
804 ret
= get_platform_config_field(
806 PLATFORM_CONFIG_PORT_TABLE
, 0,
807 PORT_TABLE_TX_PRESET_IDX_ACTIVE_EQ
,
810 *ptr_tx_preset
= OPA_INVALID_INDEX
;
814 ret
= get_platform_config_field(
816 PLATFORM_CONFIG_PORT_TABLE
, 0,
817 PORT_TABLE_TX_PRESET_IDX_ACTIVE_NO_EQ
,
820 *ptr_tx_preset
= OPA_INVALID_INDEX
;
825 ret
= get_platform_config_field(
826 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
827 PORT_TABLE_RX_PRESET_IDX
, ptr_rx_preset
, 4);
829 *ptr_rx_preset
= OPA_INVALID_INDEX
;
833 if ((lss
& OPA_LINK_SPEED_25G
) && (lse
& OPA_LINK_SPEED_25G
))
834 get_platform_config_field(
835 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
836 PORT_TABLE_LOCAL_ATTEN_25G
, ptr_total_atten
, 4);
837 else if ((lss
& OPA_LINK_SPEED_12_5G
) && (lse
& OPA_LINK_SPEED_12_5G
))
838 get_platform_config_field(
839 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
840 PORT_TABLE_LOCAL_ATTEN_12G
, ptr_total_atten
, 4);
842 apply_cdr_settings(ppd
, *ptr_rx_preset
, *ptr_tx_preset
);
844 apply_eq_settings(ppd
, *ptr_rx_preset
, *ptr_tx_preset
);
846 apply_rx_amplitude_settings(ppd
, *ptr_rx_preset
, *ptr_tx_preset
);
848 ret
= set_qsfp_tx(ppd
, 1);
853 static int tune_qsfp(struct hfi1_pportdata
*ppd
,
854 u32
*ptr_tx_preset
, u32
*ptr_rx_preset
,
855 u8
*ptr_tuning_method
, u32
*ptr_total_atten
)
857 u32 cable_atten
= 0, remote_atten
= 0, platform_atten
= 0;
858 u16 lss
= ppd
->link_speed_supported
, lse
= ppd
->link_speed_enabled
;
860 u8
*cache
= ppd
->qsfp_info
.cache
;
862 switch ((cache
[QSFP_MOD_TECH_OFFS
] & 0xF0) >> 4) {
864 ret
= get_platform_config_field(
866 PLATFORM_CONFIG_PORT_TABLE
, 0,
867 PORT_TABLE_LOCAL_ATTEN_25G
,
872 if ((lss
& OPA_LINK_SPEED_25G
) && (lse
& OPA_LINK_SPEED_25G
))
873 cable_atten
= cache
[QSFP_CU_ATTEN_12G_OFFS
];
874 else if ((lss
& OPA_LINK_SPEED_12_5G
) &&
875 (lse
& OPA_LINK_SPEED_12_5G
))
876 cable_atten
= cache
[QSFP_CU_ATTEN_7G_OFFS
];
878 /* Fallback to configured attenuation if cable memory is bad */
879 if (cable_atten
== 0 || cable_atten
> 36) {
880 ret
= get_platform_config_field(
882 PLATFORM_CONFIG_SYSTEM_TABLE
, 0,
883 SYSTEM_TABLE_QSFP_ATTENUATION_DEFAULT_25G
,
889 ret
= get_platform_config_field(
890 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
891 PORT_TABLE_REMOTE_ATTEN_25G
, &remote_atten
, 4);
895 *ptr_total_atten
= platform_atten
+ cable_atten
+ remote_atten
;
897 *ptr_tuning_method
= OPA_PASSIVE_TUNING
;
899 case 0x0 ... 0x9: /* fallthrough */
900 case 0xC: /* fallthrough */
902 ret
= tune_active_qsfp(ppd
, ptr_tx_preset
, ptr_rx_preset
,
907 *ptr_tuning_method
= OPA_ACTIVE_TUNING
;
909 case 0xD: /* fallthrough */
912 dd_dev_warn(ppd
->dd
, "%s: Unknown/unsupported cable\n",
920 * This function communicates its success or failure via ppd->driver_link_ready
921 * Thus, it depends on its association with start_link(...) which checks
922 * driver_link_ready before proceeding with the link negotiation and
923 * initialization process.
925 void tune_serdes(struct hfi1_pportdata
*ppd
)
929 u32 remote_atten
= 0, platform_atten
= 0;
930 u32 rx_preset_index
, tx_preset_index
;
931 u8 tuning_method
= 0, limiting_active
= 0;
932 struct hfi1_devdata
*dd
= ppd
->dd
;
934 rx_preset_index
= OPA_INVALID_INDEX
;
935 tx_preset_index
= OPA_INVALID_INDEX
;
937 /* the link defaults to enabled */
938 ppd
->link_enabled
= 1;
939 /* the driver link ready state defaults to not ready */
940 ppd
->driver_link_ready
= 0;
941 ppd
->offline_disabled_reason
= HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE
);
943 /* Skip the tuning for testing (loopback != none) and simulations */
944 if (loopback
!= LOOPBACK_NONE
||
945 ppd
->dd
->icode
== ICODE_FUNCTIONAL_SIMULATOR
) {
946 ppd
->driver_link_ready
= 1;
948 if (qsfp_mod_present(ppd
)) {
949 ret
= acquire_chip_resource(ppd
->dd
,
950 qsfp_resource(ppd
->dd
),
953 dd_dev_err(ppd
->dd
, "%s: hfi%d: cannot lock i2c chain\n",
954 __func__
, (int)ppd
->dd
->hfi1_id
);
958 refresh_qsfp_cache(ppd
, &ppd
->qsfp_info
);
959 release_chip_resource(ppd
->dd
, qsfp_resource(ppd
->dd
));
965 switch (ppd
->port_type
) {
966 case PORT_TYPE_DISCONNECTED
:
967 ppd
->offline_disabled_reason
=
968 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_DISCONNECTED
);
969 dd_dev_warn(dd
, "%s: Port disconnected, disabling port\n",
972 case PORT_TYPE_FIXED
:
973 /* platform_atten, remote_atten pre-zeroed to catch error */
974 get_platform_config_field(
975 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
976 PORT_TABLE_LOCAL_ATTEN_25G
, &platform_atten
, 4);
978 get_platform_config_field(
979 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
980 PORT_TABLE_REMOTE_ATTEN_25G
, &remote_atten
, 4);
982 total_atten
= platform_atten
+ remote_atten
;
984 tuning_method
= OPA_PASSIVE_TUNING
;
986 case PORT_TYPE_VARIABLE
:
987 if (qsfp_mod_present(ppd
)) {
989 * platform_atten, remote_atten pre-zeroed to
992 get_platform_config_field(
993 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
994 PORT_TABLE_LOCAL_ATTEN_25G
,
997 get_platform_config_field(
998 ppd
->dd
, PLATFORM_CONFIG_PORT_TABLE
, 0,
999 PORT_TABLE_REMOTE_ATTEN_25G
,
1002 total_atten
= platform_atten
+ remote_atten
;
1004 tuning_method
= OPA_PASSIVE_TUNING
;
1006 ppd
->offline_disabled_reason
=
1007 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_CHASSIS_CONFIG
);
1011 case PORT_TYPE_QSFP
:
1012 if (qsfp_mod_present(ppd
)) {
1013 ret
= acquire_chip_resource(ppd
->dd
,
1014 qsfp_resource(ppd
->dd
),
1017 dd_dev_err(ppd
->dd
, "%s: hfi%d: cannot lock i2c chain\n",
1018 __func__
, (int)ppd
->dd
->hfi1_id
);
1021 refresh_qsfp_cache(ppd
, &ppd
->qsfp_info
);
1023 if (ppd
->qsfp_info
.cache_valid
) {
1024 ret
= tune_qsfp(ppd
,
1031 * We may have modified the QSFP memory, so
1032 * update the cache to reflect the changes
1034 refresh_qsfp_cache(ppd
, &ppd
->qsfp_info
);
1036 ppd
->qsfp_info
.limiting_active
;
1039 "%s: Reading QSFP memory failed\n",
1041 ret
= -EINVAL
; /* a fail indication */
1043 release_chip_resource(ppd
->dd
, qsfp_resource(ppd
->dd
));
1047 ppd
->offline_disabled_reason
=
1049 OPA_LINKDOWN_REASON_LOCAL_MEDIA_NOT_INSTALLED
);
1054 dd_dev_warn(ppd
->dd
, "%s: Unknown port type\n", __func__
);
1055 ppd
->port_type
= PORT_TYPE_UNKNOWN
;
1056 tuning_method
= OPA_UNKNOWN_TUNING
;
1058 limiting_active
= 0;
1059 tx_preset_index
= OPA_INVALID_INDEX
;
1063 if (ppd
->offline_disabled_reason
==
1064 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE
))
1065 apply_tunings(ppd
, tx_preset_index
, tuning_method
,
1066 total_atten
, limiting_active
);
1069 ppd
->driver_link_ready
= 1;
1073 ppd
->driver_link_ready
= 0;