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1 /*
2 * Copyright(c) 2015 - 2017 Intel Corporation.
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47 #include <linux/mm.h>
48 #include <linux/types.h>
49 #include <linux/device.h>
50 #include <linux/dmapool.h>
51 #include <linux/slab.h>
52 #include <linux/list.h>
53 #include <linux/highmem.h>
54 #include <linux/io.h>
55 #include <linux/uio.h>
56 #include <linux/rbtree.h>
57 #include <linux/spinlock.h>
58 #include <linux/delay.h>
59 #include <linux/kthread.h>
60 #include <linux/mmu_context.h>
61 #include <linux/module.h>
62 #include <linux/vmalloc.h>
63 #include <linux/string.h>
64
65 #include "hfi.h"
66 #include "sdma.h"
67 #include "mmu_rb.h"
68 #include "user_sdma.h"
69 #include "verbs.h" /* for the headers */
70 #include "common.h" /* for struct hfi1_tid_info */
71 #include "trace.h"
72
73 static uint hfi1_sdma_comp_ring_size = 128;
74 module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
75 MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
76
77 static unsigned initial_pkt_count = 8;
78
79 static int user_sdma_send_pkts(struct user_sdma_request *req,
80 unsigned maxpkts);
81 static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status);
82 static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq);
83 static void user_sdma_free_request(struct user_sdma_request *req, bool unpin);
84 static int pin_vector_pages(struct user_sdma_request *req,
85 struct user_sdma_iovec *iovec);
86 static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
87 unsigned start, unsigned npages);
88 static int check_header_template(struct user_sdma_request *req,
89 struct hfi1_pkt_header *hdr, u32 lrhlen,
90 u32 datalen);
91 static int set_txreq_header(struct user_sdma_request *req,
92 struct user_sdma_txreq *tx, u32 datalen);
93 static int set_txreq_header_ahg(struct user_sdma_request *req,
94 struct user_sdma_txreq *tx, u32 len);
95 static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
96 struct hfi1_user_sdma_comp_q *cq,
97 u16 idx, enum hfi1_sdma_comp_state state,
98 int ret);
99 static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags);
100 static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len);
101
102 static int defer_packet_queue(
103 struct sdma_engine *sde,
104 struct iowait *wait,
105 struct sdma_txreq *txreq,
106 uint seq,
107 bool pkts_sent);
108 static void activate_packet_queue(struct iowait *wait, int reason);
109 static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
110 unsigned long len);
111 static int sdma_rb_insert(void *arg, struct mmu_rb_node *mnode);
112 static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
113 void *arg2, bool *stop);
114 static void sdma_rb_remove(void *arg, struct mmu_rb_node *mnode);
115 static int sdma_rb_invalidate(void *arg, struct mmu_rb_node *mnode);
116
117 static struct mmu_rb_ops sdma_rb_ops = {
118 .filter = sdma_rb_filter,
119 .insert = sdma_rb_insert,
120 .evict = sdma_rb_evict,
121 .remove = sdma_rb_remove,
122 .invalidate = sdma_rb_invalidate
123 };
124
125 static int defer_packet_queue(
126 struct sdma_engine *sde,
127 struct iowait *wait,
128 struct sdma_txreq *txreq,
129 uint seq,
130 bool pkts_sent)
131 {
132 struct hfi1_user_sdma_pkt_q *pq =
133 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
134 struct hfi1_ibdev *dev = &pq->dd->verbs_dev;
135
136 write_seqlock(&dev->iowait_lock);
137 if (sdma_progress(sde, seq, txreq))
138 goto eagain;
139 /*
140 * We are assuming that if the list is enqueued somewhere, it
141 * is to the dmawait list since that is the only place where
142 * it is supposed to be enqueued.
143 */
144 xchg(&pq->state, SDMA_PKT_Q_DEFERRED);
145 if (list_empty(&pq->busy.list))
146 iowait_queue(pkts_sent, &pq->busy, &sde->dmawait);
147 write_sequnlock(&dev->iowait_lock);
148 return -EBUSY;
149 eagain:
150 write_sequnlock(&dev->iowait_lock);
151 return -EAGAIN;
152 }
153
154 static void activate_packet_queue(struct iowait *wait, int reason)
155 {
156 struct hfi1_user_sdma_pkt_q *pq =
157 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
158 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
159 wake_up(&wait->wait_dma);
160 };
161
162 int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt,
163 struct hfi1_filedata *fd)
164 {
165 int ret = -ENOMEM;
166 char buf[64];
167 struct hfi1_devdata *dd;
168 struct hfi1_user_sdma_comp_q *cq;
169 struct hfi1_user_sdma_pkt_q *pq;
170
171 if (!uctxt || !fd)
172 return -EBADF;
173
174 if (!hfi1_sdma_comp_ring_size)
175 return -EINVAL;
176
177 dd = uctxt->dd;
178
179 pq = kzalloc(sizeof(*pq), GFP_KERNEL);
180 if (!pq)
181 return -ENOMEM;
182
183 pq->dd = dd;
184 pq->ctxt = uctxt->ctxt;
185 pq->subctxt = fd->subctxt;
186 pq->n_max_reqs = hfi1_sdma_comp_ring_size;
187 atomic_set(&pq->n_reqs, 0);
188 init_waitqueue_head(&pq->wait);
189 atomic_set(&pq->n_locked, 0);
190 pq->mm = fd->mm;
191
192 iowait_init(&pq->busy, 0, NULL, defer_packet_queue,
193 activate_packet_queue, NULL);
194 pq->reqidx = 0;
195
196 pq->reqs = kcalloc(hfi1_sdma_comp_ring_size,
197 sizeof(*pq->reqs),
198 GFP_KERNEL);
199 if (!pq->reqs)
200 goto pq_reqs_nomem;
201
202 pq->req_in_use = kcalloc(BITS_TO_LONGS(hfi1_sdma_comp_ring_size),
203 sizeof(*pq->req_in_use),
204 GFP_KERNEL);
205 if (!pq->req_in_use)
206 goto pq_reqs_no_in_use;
207
208 snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt,
209 fd->subctxt);
210 pq->txreq_cache = kmem_cache_create(buf,
211 sizeof(struct user_sdma_txreq),
212 L1_CACHE_BYTES,
213 SLAB_HWCACHE_ALIGN,
214 NULL);
215 if (!pq->txreq_cache) {
216 dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n",
217 uctxt->ctxt);
218 goto pq_txreq_nomem;
219 }
220
221 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
222 if (!cq)
223 goto cq_nomem;
224
225 cq->comps = vmalloc_user(PAGE_ALIGN(sizeof(*cq->comps)
226 * hfi1_sdma_comp_ring_size));
227 if (!cq->comps)
228 goto cq_comps_nomem;
229
230 cq->nentries = hfi1_sdma_comp_ring_size;
231
232 ret = hfi1_mmu_rb_register(pq, pq->mm, &sdma_rb_ops, dd->pport->hfi1_wq,
233 &pq->handler);
234 if (ret) {
235 dd_dev_err(dd, "Failed to register with MMU %d", ret);
236 goto pq_mmu_fail;
237 }
238
239 fd->pq = pq;
240 fd->cq = cq;
241
242 return 0;
243
244 pq_mmu_fail:
245 vfree(cq->comps);
246 cq_comps_nomem:
247 kfree(cq);
248 cq_nomem:
249 kmem_cache_destroy(pq->txreq_cache);
250 pq_txreq_nomem:
251 kfree(pq->req_in_use);
252 pq_reqs_no_in_use:
253 kfree(pq->reqs);
254 pq_reqs_nomem:
255 kfree(pq);
256
257 return ret;
258 }
259
260 int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd,
261 struct hfi1_ctxtdata *uctxt)
262 {
263 struct hfi1_user_sdma_pkt_q *pq;
264
265 trace_hfi1_sdma_user_free_queues(uctxt->dd, uctxt->ctxt, fd->subctxt);
266
267 pq = fd->pq;
268 if (pq) {
269 if (pq->handler)
270 hfi1_mmu_rb_unregister(pq->handler);
271 iowait_sdma_drain(&pq->busy);
272 /* Wait until all requests have been freed. */
273 wait_event_interruptible(
274 pq->wait,
275 !atomic_read(&pq->n_reqs));
276 kfree(pq->reqs);
277 kfree(pq->req_in_use);
278 kmem_cache_destroy(pq->txreq_cache);
279 kfree(pq);
280 fd->pq = NULL;
281 }
282 if (fd->cq) {
283 vfree(fd->cq->comps);
284 kfree(fd->cq);
285 fd->cq = NULL;
286 }
287 return 0;
288 }
289
290 static u8 dlid_to_selector(u16 dlid)
291 {
292 static u8 mapping[256];
293 static int initialized;
294 static u8 next;
295 int hash;
296
297 if (!initialized) {
298 memset(mapping, 0xFF, 256);
299 initialized = 1;
300 }
301
302 hash = ((dlid >> 8) ^ dlid) & 0xFF;
303 if (mapping[hash] == 0xFF) {
304 mapping[hash] = next;
305 next = (next + 1) & 0x7F;
306 }
307
308 return mapping[hash];
309 }
310
311 /**
312 * hfi1_user_sdma_process_request() - Process and start a user sdma request
313 * @fd: valid file descriptor
314 * @iovec: array of io vectors to process
315 * @dim: overall iovec array size
316 * @count: number of io vector array entries processed
317 */
318 int hfi1_user_sdma_process_request(struct hfi1_filedata *fd,
319 struct iovec *iovec, unsigned long dim,
320 unsigned long *count)
321 {
322 int ret = 0, i;
323 struct hfi1_ctxtdata *uctxt = fd->uctxt;
324 struct hfi1_user_sdma_pkt_q *pq = fd->pq;
325 struct hfi1_user_sdma_comp_q *cq = fd->cq;
326 struct hfi1_devdata *dd = pq->dd;
327 unsigned long idx = 0;
328 u8 pcount = initial_pkt_count;
329 struct sdma_req_info info;
330 struct user_sdma_request *req;
331 u8 opcode, sc, vl;
332 u16 pkey;
333 u32 slid;
334 u16 dlid;
335 u32 selector;
336
337 if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) {
338 hfi1_cdbg(
339 SDMA,
340 "[%u:%u:%u] First vector not big enough for header %lu/%lu",
341 dd->unit, uctxt->ctxt, fd->subctxt,
342 iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr));
343 return -EINVAL;
344 }
345 ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info));
346 if (ret) {
347 hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)",
348 dd->unit, uctxt->ctxt, fd->subctxt, ret);
349 return -EFAULT;
350 }
351
352 trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, fd->subctxt,
353 (u16 *)&info);
354 if (info.comp_idx >= hfi1_sdma_comp_ring_size) {
355 hfi1_cdbg(SDMA,
356 "[%u:%u:%u:%u] Invalid comp index",
357 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
358 return -EINVAL;
359 }
360
361 /*
362 * Sanity check the header io vector count. Need at least 1 vector
363 * (header) and cannot be larger than the actual io vector count.
364 */
365 if (req_iovcnt(info.ctrl) < 1 || req_iovcnt(info.ctrl) > dim) {
366 hfi1_cdbg(SDMA,
367 "[%u:%u:%u:%u] Invalid iov count %d, dim %ld",
368 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx,
369 req_iovcnt(info.ctrl), dim);
370 return -EINVAL;
371 }
372
373 if (!info.fragsize) {
374 hfi1_cdbg(SDMA,
375 "[%u:%u:%u:%u] Request does not specify fragsize",
376 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
377 return -EINVAL;
378 }
379
380 /* Try to claim the request. */
381 if (test_and_set_bit(info.comp_idx, pq->req_in_use)) {
382 hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in use",
383 dd->unit, uctxt->ctxt, fd->subctxt,
384 info.comp_idx);
385 return -EBADSLT;
386 }
387 /*
388 * All safety checks have been done and this request has been claimed.
389 */
390 trace_hfi1_sdma_user_process_request(dd, uctxt->ctxt, fd->subctxt,
391 info.comp_idx);
392 req = pq->reqs + info.comp_idx;
393 req->data_iovs = req_iovcnt(info.ctrl) - 1; /* subtract header vector */
394 req->data_len = 0;
395 req->pq = pq;
396 req->cq = cq;
397 req->ahg_idx = -1;
398 req->iov_idx = 0;
399 req->sent = 0;
400 req->seqnum = 0;
401 req->seqcomp = 0;
402 req->seqsubmitted = 0;
403 req->tids = NULL;
404 req->has_error = 0;
405 INIT_LIST_HEAD(&req->txps);
406
407 memcpy(&req->info, &info, sizeof(info));
408
409 /* The request is initialized, count it */
410 atomic_inc(&pq->n_reqs);
411
412 if (req_opcode(info.ctrl) == EXPECTED) {
413 /* expected must have a TID info and at least one data vector */
414 if (req->data_iovs < 2) {
415 SDMA_DBG(req,
416 "Not enough vectors for expected request");
417 ret = -EINVAL;
418 goto free_req;
419 }
420 req->data_iovs--;
421 }
422
423 if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) {
424 SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs,
425 MAX_VECTORS_PER_REQ);
426 ret = -EINVAL;
427 goto free_req;
428 }
429 /* Copy the header from the user buffer */
430 ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info),
431 sizeof(req->hdr));
432 if (ret) {
433 SDMA_DBG(req, "Failed to copy header template (%d)", ret);
434 ret = -EFAULT;
435 goto free_req;
436 }
437
438 /* If Static rate control is not enabled, sanitize the header. */
439 if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL))
440 req->hdr.pbc[2] = 0;
441
442 /* Validate the opcode. Do not trust packets from user space blindly. */
443 opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff;
444 if ((opcode & USER_OPCODE_CHECK_MASK) !=
445 USER_OPCODE_CHECK_VAL) {
446 SDMA_DBG(req, "Invalid opcode (%d)", opcode);
447 ret = -EINVAL;
448 goto free_req;
449 }
450 /*
451 * Validate the vl. Do not trust packets from user space blindly.
452 * VL comes from PBC, SC comes from LRH, and the VL needs to
453 * match the SC look up.
454 */
455 vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF;
456 sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) |
457 (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4));
458 if (vl >= dd->pport->vls_operational ||
459 vl != sc_to_vlt(dd, sc)) {
460 SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl);
461 ret = -EINVAL;
462 goto free_req;
463 }
464
465 /* Checking P_KEY for requests from user-space */
466 pkey = (u16)be32_to_cpu(req->hdr.bth[0]);
467 slid = be16_to_cpu(req->hdr.lrh[3]);
468 if (egress_pkey_check(dd->pport, slid, pkey, sc, PKEY_CHECK_INVALID)) {
469 ret = -EINVAL;
470 goto free_req;
471 }
472
473 /*
474 * Also should check the BTH.lnh. If it says the next header is GRH then
475 * the RXE parsing will be off and will land in the middle of the KDETH
476 * or miss it entirely.
477 */
478 if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) {
479 SDMA_DBG(req, "User tried to pass in a GRH");
480 ret = -EINVAL;
481 goto free_req;
482 }
483
484 req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]);
485 /*
486 * Calculate the initial TID offset based on the values of
487 * KDETH.OFFSET and KDETH.OM that are passed in.
488 */
489 req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
490 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
491 KDETH_OM_LARGE : KDETH_OM_SMALL);
492 trace_hfi1_sdma_user_initial_tidoffset(dd, uctxt->ctxt, fd->subctxt,
493 info.comp_idx, req->tidoffset);
494 idx++;
495
496 /* Save all the IO vector structures */
497 for (i = 0; i < req->data_iovs; i++) {
498 req->iovs[i].offset = 0;
499 INIT_LIST_HEAD(&req->iovs[i].list);
500 memcpy(&req->iovs[i].iov,
501 iovec + idx++,
502 sizeof(req->iovs[i].iov));
503 ret = pin_vector_pages(req, &req->iovs[i]);
504 if (ret) {
505 req->data_iovs = i;
506 goto free_req;
507 }
508 req->data_len += req->iovs[i].iov.iov_len;
509 }
510 trace_hfi1_sdma_user_data_length(dd, uctxt->ctxt, fd->subctxt,
511 info.comp_idx, req->data_len);
512 if (pcount > req->info.npkts)
513 pcount = req->info.npkts;
514 /*
515 * Copy any TID info
516 * User space will provide the TID info only when the
517 * request type is EXPECTED. This is true even if there is
518 * only one packet in the request and the header is already
519 * setup. The reason for the singular TID case is that the
520 * driver needs to perform safety checks.
521 */
522 if (req_opcode(req->info.ctrl) == EXPECTED) {
523 u16 ntids = iovec[idx].iov_len / sizeof(*req->tids);
524 u32 *tmp;
525
526 if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) {
527 ret = -EINVAL;
528 goto free_req;
529 }
530
531 /*
532 * We have to copy all of the tids because they may vary
533 * in size and, therefore, the TID count might not be
534 * equal to the pkt count. However, there is no way to
535 * tell at this point.
536 */
537 tmp = memdup_user(iovec[idx].iov_base,
538 ntids * sizeof(*req->tids));
539 if (IS_ERR(tmp)) {
540 ret = PTR_ERR(tmp);
541 SDMA_DBG(req, "Failed to copy %d TIDs (%d)",
542 ntids, ret);
543 goto free_req;
544 }
545 req->tids = tmp;
546 req->n_tids = ntids;
547 req->tididx = 0;
548 idx++;
549 }
550
551 dlid = be16_to_cpu(req->hdr.lrh[1]);
552 selector = dlid_to_selector(dlid);
553 selector += uctxt->ctxt + fd->subctxt;
554 req->sde = sdma_select_user_engine(dd, selector, vl);
555
556 if (!req->sde || !sdma_running(req->sde)) {
557 ret = -ECOMM;
558 goto free_req;
559 }
560
561 /* We don't need an AHG entry if the request contains only one packet */
562 if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG))
563 req->ahg_idx = sdma_ahg_alloc(req->sde);
564
565 set_comp_state(pq, cq, info.comp_idx, QUEUED, 0);
566 pq->state = SDMA_PKT_Q_ACTIVE;
567 /* Send the first N packets in the request to buy us some time */
568 ret = user_sdma_send_pkts(req, pcount);
569 if (unlikely(ret < 0 && ret != -EBUSY))
570 goto free_req;
571
572 /*
573 * This is a somewhat blocking send implementation.
574 * The driver will block the caller until all packets of the
575 * request have been submitted to the SDMA engine. However, it
576 * will not wait for send completions.
577 */
578 while (req->seqsubmitted != req->info.npkts) {
579 ret = user_sdma_send_pkts(req, pcount);
580 if (ret < 0) {
581 if (ret != -EBUSY)
582 goto free_req;
583 wait_event_interruptible_timeout(
584 pq->busy.wait_dma,
585 (pq->state == SDMA_PKT_Q_ACTIVE),
586 msecs_to_jiffies(
587 SDMA_IOWAIT_TIMEOUT));
588 }
589 }
590 *count += idx;
591 return 0;
592 free_req:
593 /*
594 * If the submitted seqsubmitted == npkts, the completion routine
595 * controls the final state. If sequbmitted < npkts, wait for any
596 * outstanding packets to finish before cleaning up.
597 */
598 if (req->seqsubmitted < req->info.npkts) {
599 if (req->seqsubmitted)
600 wait_event(pq->busy.wait_dma,
601 (req->seqcomp == req->seqsubmitted - 1));
602 user_sdma_free_request(req, true);
603 pq_update(pq);
604 set_comp_state(pq, cq, info.comp_idx, ERROR, ret);
605 }
606 return ret;
607 }
608
609 static inline u32 compute_data_length(struct user_sdma_request *req,
610 struct user_sdma_txreq *tx)
611 {
612 /*
613 * Determine the proper size of the packet data.
614 * The size of the data of the first packet is in the header
615 * template. However, it includes the header and ICRC, which need
616 * to be subtracted.
617 * The minimum representable packet data length in a header is 4 bytes,
618 * therefore, when the data length request is less than 4 bytes, there's
619 * only one packet, and the packet data length is equal to that of the
620 * request data length.
621 * The size of the remaining packets is the minimum of the frag
622 * size (MTU) or remaining data in the request.
623 */
624 u32 len;
625
626 if (!req->seqnum) {
627 if (req->data_len < sizeof(u32))
628 len = req->data_len;
629 else
630 len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) -
631 (sizeof(tx->hdr) - 4));
632 } else if (req_opcode(req->info.ctrl) == EXPECTED) {
633 u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) *
634 PAGE_SIZE;
635 /*
636 * Get the data length based on the remaining space in the
637 * TID pair.
638 */
639 len = min(tidlen - req->tidoffset, (u32)req->info.fragsize);
640 /* If we've filled up the TID pair, move to the next one. */
641 if (unlikely(!len) && ++req->tididx < req->n_tids &&
642 req->tids[req->tididx]) {
643 tidlen = EXP_TID_GET(req->tids[req->tididx],
644 LEN) * PAGE_SIZE;
645 req->tidoffset = 0;
646 len = min_t(u32, tidlen, req->info.fragsize);
647 }
648 /*
649 * Since the TID pairs map entire pages, make sure that we
650 * are not going to try to send more data that we have
651 * remaining.
652 */
653 len = min(len, req->data_len - req->sent);
654 } else {
655 len = min(req->data_len - req->sent, (u32)req->info.fragsize);
656 }
657 trace_hfi1_sdma_user_compute_length(req->pq->dd,
658 req->pq->ctxt,
659 req->pq->subctxt,
660 req->info.comp_idx,
661 len);
662 return len;
663 }
664
665 static inline u32 pad_len(u32 len)
666 {
667 if (len & (sizeof(u32) - 1))
668 len += sizeof(u32) - (len & (sizeof(u32) - 1));
669 return len;
670 }
671
672 static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len)
673 {
674 /* (Size of complete header - size of PBC) + 4B ICRC + data length */
675 return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len);
676 }
677
678 static int user_sdma_txadd_ahg(struct user_sdma_request *req,
679 struct user_sdma_txreq *tx,
680 u32 datalen)
681 {
682 int ret;
683 u16 pbclen = le16_to_cpu(req->hdr.pbc[0]);
684 u32 lrhlen = get_lrh_len(req->hdr, pad_len(datalen));
685 struct hfi1_user_sdma_pkt_q *pq = req->pq;
686
687 /*
688 * Copy the request header into the tx header
689 * because the HW needs a cacheline-aligned
690 * address.
691 * This copy can be optimized out if the hdr
692 * member of user_sdma_request were also
693 * cacheline aligned.
694 */
695 memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr));
696 if (PBC2LRH(pbclen) != lrhlen) {
697 pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
698 tx->hdr.pbc[0] = cpu_to_le16(pbclen);
699 }
700 ret = check_header_template(req, &tx->hdr, lrhlen, datalen);
701 if (ret)
702 return ret;
703 ret = sdma_txinit_ahg(&tx->txreq, SDMA_TXREQ_F_AHG_COPY,
704 sizeof(tx->hdr) + datalen, req->ahg_idx,
705 0, NULL, 0, user_sdma_txreq_cb);
706 if (ret)
707 return ret;
708 ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq, &tx->hdr, sizeof(tx->hdr));
709 if (ret)
710 sdma_txclean(pq->dd, &tx->txreq);
711 return ret;
712 }
713
714 static int user_sdma_txadd(struct user_sdma_request *req,
715 struct user_sdma_txreq *tx,
716 struct user_sdma_iovec *iovec, u32 datalen,
717 u32 *queued_ptr, u32 *data_sent_ptr,
718 u64 *iov_offset_ptr)
719 {
720 int ret;
721 unsigned int pageidx, len;
722 unsigned long base, offset;
723 u64 iov_offset = *iov_offset_ptr;
724 u32 queued = *queued_ptr, data_sent = *data_sent_ptr;
725 struct hfi1_user_sdma_pkt_q *pq = req->pq;
726
727 base = (unsigned long)iovec->iov.iov_base;
728 offset = offset_in_page(base + iovec->offset + iov_offset);
729 pageidx = (((iovec->offset + iov_offset + base) - (base & PAGE_MASK)) >>
730 PAGE_SHIFT);
731 len = offset + req->info.fragsize > PAGE_SIZE ?
732 PAGE_SIZE - offset : req->info.fragsize;
733 len = min((datalen - queued), len);
734 ret = sdma_txadd_page(pq->dd, &tx->txreq, iovec->pages[pageidx],
735 offset, len);
736 if (ret) {
737 SDMA_DBG(req, "SDMA txreq add page failed %d\n", ret);
738 return ret;
739 }
740 iov_offset += len;
741 queued += len;
742 data_sent += len;
743 if (unlikely(queued < datalen && pageidx == iovec->npages &&
744 req->iov_idx < req->data_iovs - 1)) {
745 iovec->offset += iov_offset;
746 iovec = &req->iovs[++req->iov_idx];
747 iov_offset = 0;
748 }
749
750 *queued_ptr = queued;
751 *data_sent_ptr = data_sent;
752 *iov_offset_ptr = iov_offset;
753 return ret;
754 }
755
756 static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts)
757 {
758 int ret = 0, count;
759 unsigned npkts = 0;
760 struct user_sdma_txreq *tx = NULL;
761 struct hfi1_user_sdma_pkt_q *pq = NULL;
762 struct user_sdma_iovec *iovec = NULL;
763
764 if (!req->pq)
765 return -EINVAL;
766
767 pq = req->pq;
768
769 /* If tx completion has reported an error, we are done. */
770 if (READ_ONCE(req->has_error))
771 return -EFAULT;
772
773 /*
774 * Check if we might have sent the entire request already
775 */
776 if (unlikely(req->seqnum == req->info.npkts)) {
777 if (!list_empty(&req->txps))
778 goto dosend;
779 return ret;
780 }
781
782 if (!maxpkts || maxpkts > req->info.npkts - req->seqnum)
783 maxpkts = req->info.npkts - req->seqnum;
784
785 while (npkts < maxpkts) {
786 u32 datalen = 0, queued = 0, data_sent = 0;
787 u64 iov_offset = 0;
788
789 /*
790 * Check whether any of the completions have come back
791 * with errors. If so, we are not going to process any
792 * more packets from this request.
793 */
794 if (READ_ONCE(req->has_error))
795 return -EFAULT;
796
797 tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL);
798 if (!tx)
799 return -ENOMEM;
800
801 tx->flags = 0;
802 tx->req = req;
803 INIT_LIST_HEAD(&tx->list);
804
805 /*
806 * For the last packet set the ACK request
807 * and disable header suppression.
808 */
809 if (req->seqnum == req->info.npkts - 1)
810 tx->flags |= (TXREQ_FLAGS_REQ_ACK |
811 TXREQ_FLAGS_REQ_DISABLE_SH);
812
813 /*
814 * Calculate the payload size - this is min of the fragment
815 * (MTU) size or the remaining bytes in the request but only
816 * if we have payload data.
817 */
818 if (req->data_len) {
819 iovec = &req->iovs[req->iov_idx];
820 if (READ_ONCE(iovec->offset) == iovec->iov.iov_len) {
821 if (++req->iov_idx == req->data_iovs) {
822 ret = -EFAULT;
823 goto free_tx;
824 }
825 iovec = &req->iovs[req->iov_idx];
826 WARN_ON(iovec->offset);
827 }
828
829 datalen = compute_data_length(req, tx);
830
831 /*
832 * Disable header suppression for the payload <= 8DWS.
833 * If there is an uncorrectable error in the receive
834 * data FIFO when the received payload size is less than
835 * or equal to 8DWS then the RxDmaDataFifoRdUncErr is
836 * not reported.There is set RHF.EccErr if the header
837 * is not suppressed.
838 */
839 if (!datalen) {
840 SDMA_DBG(req,
841 "Request has data but pkt len is 0");
842 ret = -EFAULT;
843 goto free_tx;
844 } else if (datalen <= 32) {
845 tx->flags |= TXREQ_FLAGS_REQ_DISABLE_SH;
846 }
847 }
848
849 if (req->ahg_idx >= 0) {
850 if (!req->seqnum) {
851 ret = user_sdma_txadd_ahg(req, tx, datalen);
852 if (ret)
853 goto free_tx;
854 } else {
855 int changes;
856
857 changes = set_txreq_header_ahg(req, tx,
858 datalen);
859 if (changes < 0) {
860 ret = changes;
861 goto free_tx;
862 }
863 }
864 } else {
865 ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
866 datalen, user_sdma_txreq_cb);
867 if (ret)
868 goto free_tx;
869 /*
870 * Modify the header for this packet. This only needs
871 * to be done if we are not going to use AHG. Otherwise,
872 * the HW will do it based on the changes we gave it
873 * during sdma_txinit_ahg().
874 */
875 ret = set_txreq_header(req, tx, datalen);
876 if (ret)
877 goto free_txreq;
878 }
879
880 /*
881 * If the request contains any data vectors, add up to
882 * fragsize bytes to the descriptor.
883 */
884 while (queued < datalen &&
885 (req->sent + data_sent) < req->data_len) {
886 ret = user_sdma_txadd(req, tx, iovec, datalen,
887 &queued, &data_sent, &iov_offset);
888 if (ret)
889 goto free_txreq;
890 }
891 /*
892 * The txreq was submitted successfully so we can update
893 * the counters.
894 */
895 req->koffset += datalen;
896 if (req_opcode(req->info.ctrl) == EXPECTED)
897 req->tidoffset += datalen;
898 req->sent += data_sent;
899 if (req->data_len)
900 iovec->offset += iov_offset;
901 list_add_tail(&tx->txreq.list, &req->txps);
902 /*
903 * It is important to increment this here as it is used to
904 * generate the BTH.PSN and, therefore, can't be bulk-updated
905 * outside of the loop.
906 */
907 tx->seqnum = req->seqnum++;
908 npkts++;
909 }
910 dosend:
911 ret = sdma_send_txlist(req->sde, &pq->busy, &req->txps, &count);
912 req->seqsubmitted += count;
913 if (req->seqsubmitted == req->info.npkts) {
914 /*
915 * The txreq has already been submitted to the HW queue
916 * so we can free the AHG entry now. Corruption will not
917 * happen due to the sequential manner in which
918 * descriptors are processed.
919 */
920 if (req->ahg_idx >= 0)
921 sdma_ahg_free(req->sde, req->ahg_idx);
922 }
923 return ret;
924
925 free_txreq:
926 sdma_txclean(pq->dd, &tx->txreq);
927 free_tx:
928 kmem_cache_free(pq->txreq_cache, tx);
929 return ret;
930 }
931
932 static u32 sdma_cache_evict(struct hfi1_user_sdma_pkt_q *pq, u32 npages)
933 {
934 struct evict_data evict_data;
935
936 evict_data.cleared = 0;
937 evict_data.target = npages;
938 hfi1_mmu_rb_evict(pq->handler, &evict_data);
939 return evict_data.cleared;
940 }
941
942 static int pin_sdma_pages(struct user_sdma_request *req,
943 struct user_sdma_iovec *iovec,
944 struct sdma_mmu_node *node,
945 int npages)
946 {
947 int pinned, cleared;
948 struct page **pages;
949 struct hfi1_user_sdma_pkt_q *pq = req->pq;
950
951 pages = kcalloc(npages, sizeof(*pages), GFP_KERNEL);
952 if (!pages)
953 return -ENOMEM;
954 memcpy(pages, node->pages, node->npages * sizeof(*pages));
955
956 npages -= node->npages;
957 retry:
958 if (!hfi1_can_pin_pages(pq->dd, pq->mm,
959 atomic_read(&pq->n_locked), npages)) {
960 cleared = sdma_cache_evict(pq, npages);
961 if (cleared >= npages)
962 goto retry;
963 }
964 pinned = hfi1_acquire_user_pages(pq->mm,
965 ((unsigned long)iovec->iov.iov_base +
966 (node->npages * PAGE_SIZE)), npages, 0,
967 pages + node->npages);
968 if (pinned < 0) {
969 kfree(pages);
970 return pinned;
971 }
972 if (pinned != npages) {
973 unpin_vector_pages(pq->mm, pages, node->npages, pinned);
974 return -EFAULT;
975 }
976 kfree(node->pages);
977 node->rb.len = iovec->iov.iov_len;
978 node->pages = pages;
979 atomic_add(pinned, &pq->n_locked);
980 return pinned;
981 }
982
983 static void unpin_sdma_pages(struct sdma_mmu_node *node)
984 {
985 if (node->npages) {
986 unpin_vector_pages(node->pq->mm, node->pages, 0, node->npages);
987 atomic_sub(node->npages, &node->pq->n_locked);
988 }
989 }
990
991 static int pin_vector_pages(struct user_sdma_request *req,
992 struct user_sdma_iovec *iovec)
993 {
994 int ret = 0, pinned, npages;
995 struct hfi1_user_sdma_pkt_q *pq = req->pq;
996 struct sdma_mmu_node *node = NULL;
997 struct mmu_rb_node *rb_node;
998 struct iovec *iov;
999 bool extracted;
1000
1001 extracted =
1002 hfi1_mmu_rb_remove_unless_exact(pq->handler,
1003 (unsigned long)
1004 iovec->iov.iov_base,
1005 iovec->iov.iov_len, &rb_node);
1006 if (rb_node) {
1007 node = container_of(rb_node, struct sdma_mmu_node, rb);
1008 if (!extracted) {
1009 atomic_inc(&node->refcount);
1010 iovec->pages = node->pages;
1011 iovec->npages = node->npages;
1012 iovec->node = node;
1013 return 0;
1014 }
1015 }
1016
1017 if (!node) {
1018 node = kzalloc(sizeof(*node), GFP_KERNEL);
1019 if (!node)
1020 return -ENOMEM;
1021
1022 node->rb.addr = (unsigned long)iovec->iov.iov_base;
1023 node->pq = pq;
1024 atomic_set(&node->refcount, 0);
1025 }
1026
1027 iov = &iovec->iov;
1028 npages = num_user_pages((unsigned long)iov->iov_base, iov->iov_len);
1029 if (node->npages < npages) {
1030 pinned = pin_sdma_pages(req, iovec, node, npages);
1031 if (pinned < 0) {
1032 ret = pinned;
1033 goto bail;
1034 }
1035 node->npages += pinned;
1036 npages = node->npages;
1037 }
1038 iovec->pages = node->pages;
1039 iovec->npages = npages;
1040 iovec->node = node;
1041
1042 ret = hfi1_mmu_rb_insert(req->pq->handler, &node->rb);
1043 if (ret) {
1044 iovec->node = NULL;
1045 goto bail;
1046 }
1047 return 0;
1048 bail:
1049 unpin_sdma_pages(node);
1050 kfree(node);
1051 return ret;
1052 }
1053
1054 static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
1055 unsigned start, unsigned npages)
1056 {
1057 hfi1_release_user_pages(mm, pages + start, npages, false);
1058 kfree(pages);
1059 }
1060
1061 static int check_header_template(struct user_sdma_request *req,
1062 struct hfi1_pkt_header *hdr, u32 lrhlen,
1063 u32 datalen)
1064 {
1065 /*
1066 * Perform safety checks for any type of packet:
1067 * - transfer size is multiple of 64bytes
1068 * - packet length is multiple of 4 bytes
1069 * - packet length is not larger than MTU size
1070 *
1071 * These checks are only done for the first packet of the
1072 * transfer since the header is "given" to us by user space.
1073 * For the remainder of the packets we compute the values.
1074 */
1075 if (req->info.fragsize % PIO_BLOCK_SIZE || lrhlen & 0x3 ||
1076 lrhlen > get_lrh_len(*hdr, req->info.fragsize))
1077 return -EINVAL;
1078
1079 if (req_opcode(req->info.ctrl) == EXPECTED) {
1080 /*
1081 * The header is checked only on the first packet. Furthermore,
1082 * we ensure that at least one TID entry is copied when the
1083 * request is submitted. Therefore, we don't have to verify that
1084 * tididx points to something sane.
1085 */
1086 u32 tidval = req->tids[req->tididx],
1087 tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE,
1088 tididx = EXP_TID_GET(tidval, IDX),
1089 tidctrl = EXP_TID_GET(tidval, CTRL),
1090 tidoff;
1091 __le32 kval = hdr->kdeth.ver_tid_offset;
1092
1093 tidoff = KDETH_GET(kval, OFFSET) *
1094 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
1095 KDETH_OM_LARGE : KDETH_OM_SMALL);
1096 /*
1097 * Expected receive packets have the following
1098 * additional checks:
1099 * - offset is not larger than the TID size
1100 * - TIDCtrl values match between header and TID array
1101 * - TID indexes match between header and TID array
1102 */
1103 if ((tidoff + datalen > tidlen) ||
1104 KDETH_GET(kval, TIDCTRL) != tidctrl ||
1105 KDETH_GET(kval, TID) != tididx)
1106 return -EINVAL;
1107 }
1108 return 0;
1109 }
1110
1111 /*
1112 * Correctly set the BTH.PSN field based on type of
1113 * transfer - eager packets can just increment the PSN but
1114 * expected packets encode generation and sequence in the
1115 * BTH.PSN field so just incrementing will result in errors.
1116 */
1117 static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags)
1118 {
1119 u32 val = be32_to_cpu(bthpsn),
1120 mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull :
1121 0xffffffull),
1122 psn = val & mask;
1123 if (expct)
1124 psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK);
1125 else
1126 psn = psn + frags;
1127 return psn & mask;
1128 }
1129
1130 static int set_txreq_header(struct user_sdma_request *req,
1131 struct user_sdma_txreq *tx, u32 datalen)
1132 {
1133 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1134 struct hfi1_pkt_header *hdr = &tx->hdr;
1135 u8 omfactor; /* KDETH.OM */
1136 u16 pbclen;
1137 int ret;
1138 u32 tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
1139
1140 /* Copy the header template to the request before modification */
1141 memcpy(hdr, &req->hdr, sizeof(*hdr));
1142
1143 /*
1144 * Check if the PBC and LRH length are mismatched. If so
1145 * adjust both in the header.
1146 */
1147 pbclen = le16_to_cpu(hdr->pbc[0]);
1148 if (PBC2LRH(pbclen) != lrhlen) {
1149 pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
1150 hdr->pbc[0] = cpu_to_le16(pbclen);
1151 hdr->lrh[2] = cpu_to_be16(lrhlen >> 2);
1152 /*
1153 * Third packet
1154 * This is the first packet in the sequence that has
1155 * a "static" size that can be used for the rest of
1156 * the packets (besides the last one).
1157 */
1158 if (unlikely(req->seqnum == 2)) {
1159 /*
1160 * From this point on the lengths in both the
1161 * PBC and LRH are the same until the last
1162 * packet.
1163 * Adjust the template so we don't have to update
1164 * every packet
1165 */
1166 req->hdr.pbc[0] = hdr->pbc[0];
1167 req->hdr.lrh[2] = hdr->lrh[2];
1168 }
1169 }
1170 /*
1171 * We only have to modify the header if this is not the
1172 * first packet in the request. Otherwise, we use the
1173 * header given to us.
1174 */
1175 if (unlikely(!req->seqnum)) {
1176 ret = check_header_template(req, hdr, lrhlen, datalen);
1177 if (ret)
1178 return ret;
1179 goto done;
1180 }
1181
1182 hdr->bth[2] = cpu_to_be32(
1183 set_pkt_bth_psn(hdr->bth[2],
1184 (req_opcode(req->info.ctrl) == EXPECTED),
1185 req->seqnum));
1186
1187 /* Set ACK request on last packet */
1188 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
1189 hdr->bth[2] |= cpu_to_be32(1UL << 31);
1190
1191 /* Set the new offset */
1192 hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset);
1193 /* Expected packets have to fill in the new TID information */
1194 if (req_opcode(req->info.ctrl) == EXPECTED) {
1195 tidval = req->tids[req->tididx];
1196 /*
1197 * If the offset puts us at the end of the current TID,
1198 * advance everything.
1199 */
1200 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1201 PAGE_SIZE)) {
1202 req->tidoffset = 0;
1203 /*
1204 * Since we don't copy all the TIDs, all at once,
1205 * we have to check again.
1206 */
1207 if (++req->tididx > req->n_tids - 1 ||
1208 !req->tids[req->tididx]) {
1209 return -EINVAL;
1210 }
1211 tidval = req->tids[req->tididx];
1212 }
1213 omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >=
1214 KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE_SHIFT :
1215 KDETH_OM_SMALL_SHIFT;
1216 /* Set KDETH.TIDCtrl based on value for this TID. */
1217 KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL,
1218 EXP_TID_GET(tidval, CTRL));
1219 /* Set KDETH.TID based on value for this TID */
1220 KDETH_SET(hdr->kdeth.ver_tid_offset, TID,
1221 EXP_TID_GET(tidval, IDX));
1222 /* Clear KDETH.SH when DISABLE_SH flag is set */
1223 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH))
1224 KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0);
1225 /*
1226 * Set the KDETH.OFFSET and KDETH.OM based on size of
1227 * transfer.
1228 */
1229 trace_hfi1_sdma_user_tid_info(
1230 pq->dd, pq->ctxt, pq->subctxt, req->info.comp_idx,
1231 req->tidoffset, req->tidoffset >> omfactor,
1232 omfactor != KDETH_OM_SMALL_SHIFT);
1233 KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1234 req->tidoffset >> omfactor);
1235 KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
1236 omfactor != KDETH_OM_SMALL_SHIFT);
1237 }
1238 done:
1239 trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,
1240 req->info.comp_idx, hdr, tidval);
1241 return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr));
1242 }
1243
1244 static int set_txreq_header_ahg(struct user_sdma_request *req,
1245 struct user_sdma_txreq *tx, u32 datalen)
1246 {
1247 u32 ahg[AHG_KDETH_ARRAY_SIZE];
1248 int idx = 0;
1249 u8 omfactor; /* KDETH.OM */
1250 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1251 struct hfi1_pkt_header *hdr = &req->hdr;
1252 u16 pbclen = le16_to_cpu(hdr->pbc[0]);
1253 u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
1254 size_t array_size = ARRAY_SIZE(ahg);
1255
1256 if (PBC2LRH(pbclen) != lrhlen) {
1257 /* PBC.PbcLengthDWs */
1258 idx = ahg_header_set(ahg, idx, array_size, 0, 0, 12,
1259 (__force u16)cpu_to_le16(LRH2PBC(lrhlen)));
1260 if (idx < 0)
1261 return idx;
1262 /* LRH.PktLen (we need the full 16 bits due to byte swap) */
1263 idx = ahg_header_set(ahg, idx, array_size, 3, 0, 16,
1264 (__force u16)cpu_to_be16(lrhlen >> 2));
1265 if (idx < 0)
1266 return idx;
1267 }
1268
1269 /*
1270 * Do the common updates
1271 */
1272 /* BTH.PSN and BTH.A */
1273 val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) &
1274 (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
1275 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
1276 val32 |= 1UL << 31;
1277 idx = ahg_header_set(ahg, idx, array_size, 6, 0, 16,
1278 (__force u16)cpu_to_be16(val32 >> 16));
1279 if (idx < 0)
1280 return idx;
1281 idx = ahg_header_set(ahg, idx, array_size, 6, 16, 16,
1282 (__force u16)cpu_to_be16(val32 & 0xffff));
1283 if (idx < 0)
1284 return idx;
1285 /* KDETH.Offset */
1286 idx = ahg_header_set(ahg, idx, array_size, 15, 0, 16,
1287 (__force u16)cpu_to_le16(req->koffset & 0xffff));
1288 if (idx < 0)
1289 return idx;
1290 idx = ahg_header_set(ahg, idx, array_size, 15, 16, 16,
1291 (__force u16)cpu_to_le16(req->koffset >> 16));
1292 if (idx < 0)
1293 return idx;
1294 if (req_opcode(req->info.ctrl) == EXPECTED) {
1295 __le16 val;
1296
1297 tidval = req->tids[req->tididx];
1298
1299 /*
1300 * If the offset puts us at the end of the current TID,
1301 * advance everything.
1302 */
1303 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1304 PAGE_SIZE)) {
1305 req->tidoffset = 0;
1306 /*
1307 * Since we don't copy all the TIDs, all at once,
1308 * we have to check again.
1309 */
1310 if (++req->tididx > req->n_tids - 1 ||
1311 !req->tids[req->tididx])
1312 return -EINVAL;
1313 tidval = req->tids[req->tididx];
1314 }
1315 omfactor = ((EXP_TID_GET(tidval, LEN) *
1316 PAGE_SIZE) >=
1317 KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE_SHIFT :
1318 KDETH_OM_SMALL_SHIFT;
1319 /* KDETH.OM and KDETH.OFFSET (TID) */
1320 idx = ahg_header_set(
1321 ahg, idx, array_size, 7, 0, 16,
1322 ((!!(omfactor - KDETH_OM_SMALL_SHIFT)) << 15 |
1323 ((req->tidoffset >> omfactor)
1324 & 0x7fff)));
1325 if (idx < 0)
1326 return idx;
1327 /* KDETH.TIDCtrl, KDETH.TID, KDETH.Intr, KDETH.SH */
1328 val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) |
1329 (EXP_TID_GET(tidval, IDX) & 0x3ff));
1330
1331 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH)) {
1332 val |= cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1333 INTR) <<
1334 AHG_KDETH_INTR_SHIFT));
1335 } else {
1336 val |= KDETH_GET(hdr->kdeth.ver_tid_offset, SH) ?
1337 cpu_to_le16(0x1 << AHG_KDETH_SH_SHIFT) :
1338 cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1339 INTR) <<
1340 AHG_KDETH_INTR_SHIFT));
1341 }
1342
1343 idx = ahg_header_set(ahg, idx, array_size,
1344 7, 16, 14, (__force u16)val);
1345 if (idx < 0)
1346 return idx;
1347 }
1348
1349 trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
1350 req->info.comp_idx, req->sde->this_idx,
1351 req->ahg_idx, ahg, idx, tidval);
1352 sdma_txinit_ahg(&tx->txreq,
1353 SDMA_TXREQ_F_USE_AHG,
1354 datalen, req->ahg_idx, idx,
1355 ahg, sizeof(req->hdr),
1356 user_sdma_txreq_cb);
1357
1358 return idx;
1359 }
1360
1361 /**
1362 * user_sdma_txreq_cb() - SDMA tx request completion callback.
1363 * @txreq: valid sdma tx request
1364 * @status: success/failure of request
1365 *
1366 * Called when the SDMA progress state machine gets notification that
1367 * the SDMA descriptors for this tx request have been processed by the
1368 * DMA engine. Called in interrupt context.
1369 * Only do work on completed sequences.
1370 */
1371 static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
1372 {
1373 struct user_sdma_txreq *tx =
1374 container_of(txreq, struct user_sdma_txreq, txreq);
1375 struct user_sdma_request *req;
1376 struct hfi1_user_sdma_pkt_q *pq;
1377 struct hfi1_user_sdma_comp_q *cq;
1378 enum hfi1_sdma_comp_state state = COMPLETE;
1379
1380 if (!tx->req)
1381 return;
1382
1383 req = tx->req;
1384 pq = req->pq;
1385 cq = req->cq;
1386
1387 if (status != SDMA_TXREQ_S_OK) {
1388 SDMA_DBG(req, "SDMA completion with error %d",
1389 status);
1390 WRITE_ONCE(req->has_error, 1);
1391 state = ERROR;
1392 }
1393
1394 req->seqcomp = tx->seqnum;
1395 kmem_cache_free(pq->txreq_cache, tx);
1396
1397 /* sequence isn't complete? We are done */
1398 if (req->seqcomp != req->info.npkts - 1)
1399 return;
1400
1401 user_sdma_free_request(req, false);
1402 set_comp_state(pq, cq, req->info.comp_idx, state, status);
1403 pq_update(pq);
1404 }
1405
1406 static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq)
1407 {
1408 if (atomic_dec_and_test(&pq->n_reqs))
1409 wake_up(&pq->wait);
1410 }
1411
1412 static void user_sdma_free_request(struct user_sdma_request *req, bool unpin)
1413 {
1414 int i;
1415
1416 if (!list_empty(&req->txps)) {
1417 struct sdma_txreq *t, *p;
1418
1419 list_for_each_entry_safe(t, p, &req->txps, list) {
1420 struct user_sdma_txreq *tx =
1421 container_of(t, struct user_sdma_txreq, txreq);
1422 list_del_init(&t->list);
1423 sdma_txclean(req->pq->dd, t);
1424 kmem_cache_free(req->pq->txreq_cache, tx);
1425 }
1426 }
1427
1428 for (i = 0; i < req->data_iovs; i++) {
1429 struct sdma_mmu_node *node = req->iovs[i].node;
1430
1431 if (!node)
1432 continue;
1433
1434 req->iovs[i].node = NULL;
1435
1436 if (unpin)
1437 hfi1_mmu_rb_remove(req->pq->handler,
1438 &node->rb);
1439 else
1440 atomic_dec(&node->refcount);
1441 }
1442
1443 kfree(req->tids);
1444 clear_bit(req->info.comp_idx, req->pq->req_in_use);
1445 }
1446
1447 static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
1448 struct hfi1_user_sdma_comp_q *cq,
1449 u16 idx, enum hfi1_sdma_comp_state state,
1450 int ret)
1451 {
1452 if (state == ERROR)
1453 cq->comps[idx].errcode = -ret;
1454 smp_wmb(); /* make sure errcode is visible first */
1455 cq->comps[idx].status = state;
1456 trace_hfi1_sdma_user_completion(pq->dd, pq->ctxt, pq->subctxt,
1457 idx, state, ret);
1458 }
1459
1460 static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
1461 unsigned long len)
1462 {
1463 return (bool)(node->addr == addr);
1464 }
1465
1466 static int sdma_rb_insert(void *arg, struct mmu_rb_node *mnode)
1467 {
1468 struct sdma_mmu_node *node =
1469 container_of(mnode, struct sdma_mmu_node, rb);
1470
1471 atomic_inc(&node->refcount);
1472 return 0;
1473 }
1474
1475 /*
1476 * Return 1 to remove the node from the rb tree and call the remove op.
1477 *
1478 * Called with the rb tree lock held.
1479 */
1480 static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
1481 void *evict_arg, bool *stop)
1482 {
1483 struct sdma_mmu_node *node =
1484 container_of(mnode, struct sdma_mmu_node, rb);
1485 struct evict_data *evict_data = evict_arg;
1486
1487 /* is this node still being used? */
1488 if (atomic_read(&node->refcount))
1489 return 0; /* keep this node */
1490
1491 /* this node will be evicted, add its pages to our count */
1492 evict_data->cleared += node->npages;
1493
1494 /* have enough pages been cleared? */
1495 if (evict_data->cleared >= evict_data->target)
1496 *stop = true;
1497
1498 return 1; /* remove this node */
1499 }
1500
1501 static void sdma_rb_remove(void *arg, struct mmu_rb_node *mnode)
1502 {
1503 struct sdma_mmu_node *node =
1504 container_of(mnode, struct sdma_mmu_node, rb);
1505
1506 unpin_sdma_pages(node);
1507 kfree(node);
1508 }
1509
1510 static int sdma_rb_invalidate(void *arg, struct mmu_rb_node *mnode)
1511 {
1512 struct sdma_mmu_node *node =
1513 container_of(mnode, struct sdma_mmu_node, rb);
1514
1515 if (!atomic_read(&node->refcount))
1516 return 1;
1517 return 0;
1518 }