drivers/infiniband/hw/hns/hns_roce_hem.h

   1 /*
   2  * Copyright (c) 2016 Hisilicon Limited.
   3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef _HNS_ROCE_HEM_H
  35 #define _HNS_ROCE_HEM_H
  36
  37 #define HW_SYNC_TIMEOUT_MSECS           500
  38 #define HW_SYNC_SLEEP_TIME_INTERVAL     20
  39 #define BT_CMD_SYNC_SHIFT               31
  40
  41 enum {
  42         /* MAP HEM(Hardware Entry Memory) */
  43         HEM_TYPE_QPC = 0,
  44         HEM_TYPE_MTPT,
  45         HEM_TYPE_CQC,
  46         HEM_TYPE_SRQC,
  47
  48          /* UNMAP HEM */
  49         HEM_TYPE_MTT,
  50         HEM_TYPE_CQE,
  51         HEM_TYPE_IRRL,
  52         HEM_TYPE_TRRL,
  53 };
  54
  55 #define HNS_ROCE_HEM_CHUNK_LEN  \
  56          ((256 - sizeof(struct list_head) - 2 * sizeof(int)) /   \
  57          (sizeof(struct scatterlist)))
  58
  59 #define check_whether_bt_num_3(type, hop_num) \
  60         (type < HEM_TYPE_MTT && hop_num == 2)
  61
  62 #define check_whether_bt_num_2(type, hop_num) \
  63         ((type < HEM_TYPE_MTT && hop_num == 1) || \
  64         (type >= HEM_TYPE_MTT && hop_num == 2))
  65
  66 #define check_whether_bt_num_1(type, hop_num) \
  67         ((type < HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0) || \
  68         (type >= HEM_TYPE_MTT && hop_num == 1) || \
  69         (type >= HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0))
  70
  71 enum {
  72          HNS_ROCE_HEM_PAGE_SHIFT = 12,
  73          HNS_ROCE_HEM_PAGE_SIZE  = 1 << HNS_ROCE_HEM_PAGE_SHIFT,
  74 };
  75
  76 struct hns_roce_hem_chunk {
  77         struct list_head         list;
  78         int                      npages;
  79         int                      nsg;
  80         struct scatterlist       mem[HNS_ROCE_HEM_CHUNK_LEN];
  81         void                     *buf[HNS_ROCE_HEM_CHUNK_LEN];
  82 };
  83
  84 struct hns_roce_hem {
  85         struct list_head         chunk_list;
  86         int                      refcount;
  87 };
  88
  89 struct hns_roce_hem_iter {
  90         struct hns_roce_hem              *hem;
  91         struct hns_roce_hem_chunk        *chunk;
  92         int                              page_idx;
  93 };
  94
  95 struct hns_roce_hem_mhop {
  96         u32     hop_num;
  97         u32     buf_chunk_size;
  98         u32     bt_chunk_size;
  99         u32     ba_l0_num;
 100         u32     l0_idx;/* level 0 base address table index */
 101         u32     l1_idx;/* level 1 base address table index */
 102         u32     l2_idx;/* level 2 base address table index */
 103 };
 104
 105 void hns_roce_free_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem *hem);
 106 int hns_roce_table_get(struct hns_roce_dev *hr_dev,
 107                        struct hns_roce_hem_table *table, unsigned long obj);
 108 void hns_roce_table_put(struct hns_roce_dev *hr_dev,
 109                         struct hns_roce_hem_table *table, unsigned long obj);
 110 void *hns_roce_table_find(struct hns_roce_dev *hr_dev,
 111                           struct hns_roce_hem_table *table, unsigned long obj,
 112                           dma_addr_t *dma_handle);
 113 int hns_roce_table_get_range(struct hns_roce_dev *hr_dev,
 114                              struct hns_roce_hem_table *table,
 115                              unsigned long start, unsigned long end);
 116 void hns_roce_table_put_range(struct hns_roce_dev *hr_dev,
 117                               struct hns_roce_hem_table *table,
 118                               unsigned long start, unsigned long end);
 119 int hns_roce_init_hem_table(struct hns_roce_dev *hr_dev,
 120                             struct hns_roce_hem_table *table, u32 type,
 121                             unsigned long obj_size, unsigned long nobj,
 122                             int use_lowmem);
 123 void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev,
 124                                 struct hns_roce_hem_table *table);
 125 void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev);
 126 int hns_roce_calc_hem_mhop(struct hns_roce_dev *hr_dev,
 127                            struct hns_roce_hem_table *table, unsigned long *obj,
 128                            struct hns_roce_hem_mhop *mhop);
 129 bool hns_roce_check_whether_mhop(struct hns_roce_dev *hr_dev, u32 type);
 130
 131 static inline void hns_roce_hem_first(struct hns_roce_hem *hem,
 132                                       struct hns_roce_hem_iter *iter)
 133 {
 134         iter->hem = hem;
 135         iter->chunk = list_empty(&hem->chunk_list) ? NULL :
 136                                  list_entry(hem->chunk_list.next,
 137                                             struct hns_roce_hem_chunk, list);
 138         iter->page_idx = 0;
 139 }
 140
 141 static inline int hns_roce_hem_last(struct hns_roce_hem_iter *iter)
 142 {
 143         return !iter->chunk;
 144 }
 145
 146 static inline void hns_roce_hem_next(struct hns_roce_hem_iter *iter)
 147 {
 148         if (++iter->page_idx >= iter->chunk->nsg) {
 149                 if (iter->chunk->list.next == &iter->hem->chunk_list) {
 150                         iter->chunk = NULL;
 151                         return;
 152                 }
 153
 154                 iter->chunk = list_entry(iter->chunk->list.next,
 155                                          struct hns_roce_hem_chunk, list);
 156                 iter->page_idx = 0;
 157         }
 158 }
 159
 160 static inline dma_addr_t hns_roce_hem_addr(struct hns_roce_hem_iter *iter)
 161 {
 162         return sg_dma_address(&iter->chunk->mem[iter->page_idx]);
 163 }
 164
 165 #endif /*_HNS_ROCE_HEM_H*/