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1 /*
2 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #include <rdma/ib_mad.h>
35 #include <rdma/ib_user_verbs.h>
36 #include <linux/io.h>
37 #include <linux/utsname.h>
38
39 #include "ipath_kernel.h"
40 #include "ipath_verbs.h"
41 #include "ipath_common.h"
42
43 static unsigned int ib_ipath_qp_table_size = 251;
44 module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
45 MODULE_PARM_DESC(qp_table_size, "QP table size");
46
47 unsigned int ib_ipath_lkey_table_size = 12;
48 module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
49 S_IRUGO);
50 MODULE_PARM_DESC(lkey_table_size,
51 "LKEY table size in bits (2^n, 1 <= n <= 23)");
52
53 static unsigned int ib_ipath_max_pds = 0xFFFF;
54 module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
55 MODULE_PARM_DESC(max_pds,
56 "Maximum number of protection domains to support");
57
58 static unsigned int ib_ipath_max_ahs = 0xFFFF;
59 module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
60 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
61
62 unsigned int ib_ipath_max_cqes = 0x2FFFF;
63 module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
64 MODULE_PARM_DESC(max_cqes,
65 "Maximum number of completion queue entries to support");
66
67 unsigned int ib_ipath_max_cqs = 0x1FFFF;
68 module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
69 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
70
71 unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
72 module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
73 S_IWUSR | S_IRUGO);
74 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
75
76 unsigned int ib_ipath_max_qps = 16384;
77 module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
78 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
79
80 unsigned int ib_ipath_max_sges = 0x60;
81 module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
82 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
83
84 unsigned int ib_ipath_max_mcast_grps = 16384;
85 module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
86 S_IWUSR | S_IRUGO);
87 MODULE_PARM_DESC(max_mcast_grps,
88 "Maximum number of multicast groups to support");
89
90 unsigned int ib_ipath_max_mcast_qp_attached = 16;
91 module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
92 uint, S_IWUSR | S_IRUGO);
93 MODULE_PARM_DESC(max_mcast_qp_attached,
94 "Maximum number of attached QPs to support");
95
96 unsigned int ib_ipath_max_srqs = 1024;
97 module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
98 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
99
100 unsigned int ib_ipath_max_srq_sges = 128;
101 module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
102 uint, S_IWUSR | S_IRUGO);
103 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
104
105 unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
106 module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
107 uint, S_IWUSR | S_IRUGO);
108 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
109
110 static unsigned int ib_ipath_disable_sma;
111 module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
112 MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
113
114 const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
115 [IB_QPS_RESET] = 0,
116 [IB_QPS_INIT] = IPATH_POST_RECV_OK,
117 [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
118 [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
119 IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
120 [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
121 IPATH_POST_SEND_OK,
122 [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
123 [IB_QPS_ERR] = 0,
124 };
125
126 struct ipath_ucontext {
127 struct ib_ucontext ibucontext;
128 };
129
130 static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
131 *ibucontext)
132 {
133 return container_of(ibucontext, struct ipath_ucontext, ibucontext);
134 }
135
136 /*
137 * Translate ib_wr_opcode into ib_wc_opcode.
138 */
139 const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
140 [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
141 [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
142 [IB_WR_SEND] = IB_WC_SEND,
143 [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
144 [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
145 [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
146 [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
147 };
148
149 /*
150 * System image GUID.
151 */
152 static __be64 sys_image_guid;
153
154 /**
155 * ipath_copy_sge - copy data to SGE memory
156 * @ss: the SGE state
157 * @data: the data to copy
158 * @length: the length of the data
159 */
160 void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
161 {
162 struct ipath_sge *sge = &ss->sge;
163
164 while (length) {
165 u32 len = sge->length;
166
167 if (len > length)
168 len = length;
169 if (len > sge->sge_length)
170 len = sge->sge_length;
171 BUG_ON(len == 0);
172 memcpy(sge->vaddr, data, len);
173 sge->vaddr += len;
174 sge->length -= len;
175 sge->sge_length -= len;
176 if (sge->sge_length == 0) {
177 if (--ss->num_sge)
178 *sge = *ss->sg_list++;
179 } else if (sge->length == 0 && sge->mr != NULL) {
180 if (++sge->n >= IPATH_SEGSZ) {
181 if (++sge->m >= sge->mr->mapsz)
182 break;
183 sge->n = 0;
184 }
185 sge->vaddr =
186 sge->mr->map[sge->m]->segs[sge->n].vaddr;
187 sge->length =
188 sge->mr->map[sge->m]->segs[sge->n].length;
189 }
190 data += len;
191 length -= len;
192 }
193 }
194
195 /**
196 * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
197 * @ss: the SGE state
198 * @length: the number of bytes to skip
199 */
200 void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
201 {
202 struct ipath_sge *sge = &ss->sge;
203
204 while (length) {
205 u32 len = sge->length;
206
207 if (len > length)
208 len = length;
209 if (len > sge->sge_length)
210 len = sge->sge_length;
211 BUG_ON(len == 0);
212 sge->vaddr += len;
213 sge->length -= len;
214 sge->sge_length -= len;
215 if (sge->sge_length == 0) {
216 if (--ss->num_sge)
217 *sge = *ss->sg_list++;
218 } else if (sge->length == 0 && sge->mr != NULL) {
219 if (++sge->n >= IPATH_SEGSZ) {
220 if (++sge->m >= sge->mr->mapsz)
221 break;
222 sge->n = 0;
223 }
224 sge->vaddr =
225 sge->mr->map[sge->m]->segs[sge->n].vaddr;
226 sge->length =
227 sge->mr->map[sge->m]->segs[sge->n].length;
228 }
229 length -= len;
230 }
231 }
232
233 /**
234 * ipath_post_send - post a send on a QP
235 * @ibqp: the QP to post the send on
236 * @wr: the list of work requests to post
237 * @bad_wr: the first bad WR is put here
238 *
239 * This may be called from interrupt context.
240 */
241 static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
242 struct ib_send_wr **bad_wr)
243 {
244 struct ipath_qp *qp = to_iqp(ibqp);
245 int err = 0;
246
247 /* Check that state is OK to post send. */
248 if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK)) {
249 *bad_wr = wr;
250 err = -EINVAL;
251 goto bail;
252 }
253
254 for (; wr; wr = wr->next) {
255 switch (qp->ibqp.qp_type) {
256 case IB_QPT_UC:
257 case IB_QPT_RC:
258 err = ipath_post_ruc_send(qp, wr);
259 break;
260
261 case IB_QPT_SMI:
262 case IB_QPT_GSI:
263 case IB_QPT_UD:
264 err = ipath_post_ud_send(qp, wr);
265 break;
266
267 default:
268 err = -EINVAL;
269 }
270 if (err) {
271 *bad_wr = wr;
272 break;
273 }
274 }
275
276 bail:
277 return err;
278 }
279
280 /**
281 * ipath_post_receive - post a receive on a QP
282 * @ibqp: the QP to post the receive on
283 * @wr: the WR to post
284 * @bad_wr: the first bad WR is put here
285 *
286 * This may be called from interrupt context.
287 */
288 static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
289 struct ib_recv_wr **bad_wr)
290 {
291 struct ipath_qp *qp = to_iqp(ibqp);
292 struct ipath_rwq *wq = qp->r_rq.wq;
293 unsigned long flags;
294 int ret;
295
296 /* Check that state is OK to post receive. */
297 if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
298 *bad_wr = wr;
299 ret = -EINVAL;
300 goto bail;
301 }
302
303 for (; wr; wr = wr->next) {
304 struct ipath_rwqe *wqe;
305 u32 next;
306 int i;
307
308 if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
309 *bad_wr = wr;
310 ret = -ENOMEM;
311 goto bail;
312 }
313
314 spin_lock_irqsave(&qp->r_rq.lock, flags);
315 next = wq->head + 1;
316 if (next >= qp->r_rq.size)
317 next = 0;
318 if (next == wq->tail) {
319 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
320 *bad_wr = wr;
321 ret = -ENOMEM;
322 goto bail;
323 }
324
325 wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
326 wqe->wr_id = wr->wr_id;
327 wqe->num_sge = wr->num_sge;
328 for (i = 0; i < wr->num_sge; i++)
329 wqe->sg_list[i] = wr->sg_list[i];
330 /* Make sure queue entry is written before the head index. */
331 smp_wmb();
332 wq->head = next;
333 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
334 }
335 ret = 0;
336
337 bail:
338 return ret;
339 }
340
341 /**
342 * ipath_qp_rcv - processing an incoming packet on a QP
343 * @dev: the device the packet came on
344 * @hdr: the packet header
345 * @has_grh: true if the packet has a GRH
346 * @data: the packet data
347 * @tlen: the packet length
348 * @qp: the QP the packet came on
349 *
350 * This is called from ipath_ib_rcv() to process an incoming packet
351 * for the given QP.
352 * Called at interrupt level.
353 */
354 static void ipath_qp_rcv(struct ipath_ibdev *dev,
355 struct ipath_ib_header *hdr, int has_grh,
356 void *data, u32 tlen, struct ipath_qp *qp)
357 {
358 /* Check for valid receive state. */
359 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
360 dev->n_pkt_drops++;
361 return;
362 }
363
364 switch (qp->ibqp.qp_type) {
365 case IB_QPT_SMI:
366 case IB_QPT_GSI:
367 if (ib_ipath_disable_sma)
368 break;
369 /* FALLTHROUGH */
370 case IB_QPT_UD:
371 ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
372 break;
373
374 case IB_QPT_RC:
375 ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
376 break;
377
378 case IB_QPT_UC:
379 ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
380 break;
381
382 default:
383 break;
384 }
385 }
386
387 /**
388 * ipath_ib_rcv - process an incoming packet
389 * @arg: the device pointer
390 * @rhdr: the header of the packet
391 * @data: the packet data
392 * @tlen: the packet length
393 *
394 * This is called from ipath_kreceive() to process an incoming packet at
395 * interrupt level. Tlen is the length of the header + data + CRC in bytes.
396 */
397 void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
398 u32 tlen)
399 {
400 struct ipath_ib_header *hdr = rhdr;
401 struct ipath_other_headers *ohdr;
402 struct ipath_qp *qp;
403 u32 qp_num;
404 int lnh;
405 u8 opcode;
406 u16 lid;
407
408 if (unlikely(dev == NULL))
409 goto bail;
410
411 if (unlikely(tlen < 24)) { /* LRH+BTH+CRC */
412 dev->rcv_errors++;
413 goto bail;
414 }
415
416 /* Check for a valid destination LID (see ch. 7.11.1). */
417 lid = be16_to_cpu(hdr->lrh[1]);
418 if (lid < IPATH_MULTICAST_LID_BASE) {
419 lid &= ~((1 << (dev->mkeyprot_resv_lmc & 7)) - 1);
420 if (unlikely(lid != dev->dd->ipath_lid)) {
421 dev->rcv_errors++;
422 goto bail;
423 }
424 }
425
426 /* Check for GRH */
427 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
428 if (lnh == IPATH_LRH_BTH)
429 ohdr = &hdr->u.oth;
430 else if (lnh == IPATH_LRH_GRH)
431 ohdr = &hdr->u.l.oth;
432 else {
433 dev->rcv_errors++;
434 goto bail;
435 }
436
437 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
438 dev->opstats[opcode].n_bytes += tlen;
439 dev->opstats[opcode].n_packets++;
440
441 /* Get the destination QP number. */
442 qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
443 if (qp_num == IPATH_MULTICAST_QPN) {
444 struct ipath_mcast *mcast;
445 struct ipath_mcast_qp *p;
446
447 if (lnh != IPATH_LRH_GRH) {
448 dev->n_pkt_drops++;
449 goto bail;
450 }
451 mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
452 if (mcast == NULL) {
453 dev->n_pkt_drops++;
454 goto bail;
455 }
456 dev->n_multicast_rcv++;
457 list_for_each_entry_rcu(p, &mcast->qp_list, list)
458 ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
459 /*
460 * Notify ipath_multicast_detach() if it is waiting for us
461 * to finish.
462 */
463 if (atomic_dec_return(&mcast->refcount) <= 1)
464 wake_up(&mcast->wait);
465 } else {
466 qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
467 if (qp) {
468 dev->n_unicast_rcv++;
469 ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
470 tlen, qp);
471 /*
472 * Notify ipath_destroy_qp() if it is waiting
473 * for us to finish.
474 */
475 if (atomic_dec_and_test(&qp->refcount))
476 wake_up(&qp->wait);
477 } else
478 dev->n_pkt_drops++;
479 }
480
481 bail:;
482 }
483
484 /**
485 * ipath_ib_timer - verbs timer
486 * @arg: the device pointer
487 *
488 * This is called from ipath_do_rcv_timer() at interrupt level to check for
489 * QPs which need retransmits and to collect performance numbers.
490 */
491 static void ipath_ib_timer(struct ipath_ibdev *dev)
492 {
493 struct ipath_qp *resend = NULL;
494 struct list_head *last;
495 struct ipath_qp *qp;
496 unsigned long flags;
497
498 if (dev == NULL)
499 return;
500
501 spin_lock_irqsave(&dev->pending_lock, flags);
502 /* Start filling the next pending queue. */
503 if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
504 dev->pending_index = 0;
505 /* Save any requests still in the new queue, they have timed out. */
506 last = &dev->pending[dev->pending_index];
507 while (!list_empty(last)) {
508 qp = list_entry(last->next, struct ipath_qp, timerwait);
509 list_del_init(&qp->timerwait);
510 qp->timer_next = resend;
511 resend = qp;
512 atomic_inc(&qp->refcount);
513 }
514 last = &dev->rnrwait;
515 if (!list_empty(last)) {
516 qp = list_entry(last->next, struct ipath_qp, timerwait);
517 if (--qp->s_rnr_timeout == 0) {
518 do {
519 list_del_init(&qp->timerwait);
520 tasklet_hi_schedule(&qp->s_task);
521 if (list_empty(last))
522 break;
523 qp = list_entry(last->next, struct ipath_qp,
524 timerwait);
525 } while (qp->s_rnr_timeout == 0);
526 }
527 }
528 /*
529 * We should only be in the started state if pma_sample_start != 0
530 */
531 if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
532 --dev->pma_sample_start == 0) {
533 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
534 ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
535 &dev->ipath_rword,
536 &dev->ipath_spkts,
537 &dev->ipath_rpkts,
538 &dev->ipath_xmit_wait);
539 }
540 if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
541 if (dev->pma_sample_interval == 0) {
542 u64 ta, tb, tc, td, te;
543
544 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
545 ipath_snapshot_counters(dev->dd, &ta, &tb,
546 &tc, &td, &te);
547
548 dev->ipath_sword = ta - dev->ipath_sword;
549 dev->ipath_rword = tb - dev->ipath_rword;
550 dev->ipath_spkts = tc - dev->ipath_spkts;
551 dev->ipath_rpkts = td - dev->ipath_rpkts;
552 dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
553 }
554 else
555 dev->pma_sample_interval--;
556 }
557 spin_unlock_irqrestore(&dev->pending_lock, flags);
558
559 /* XXX What if timer fires again while this is running? */
560 for (qp = resend; qp != NULL; qp = qp->timer_next) {
561 struct ib_wc wc;
562
563 spin_lock_irqsave(&qp->s_lock, flags);
564 if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
565 dev->n_timeouts++;
566 ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
567 }
568 spin_unlock_irqrestore(&qp->s_lock, flags);
569
570 /* Notify ipath_destroy_qp() if it is waiting. */
571 if (atomic_dec_and_test(&qp->refcount))
572 wake_up(&qp->wait);
573 }
574 }
575
576 static void update_sge(struct ipath_sge_state *ss, u32 length)
577 {
578 struct ipath_sge *sge = &ss->sge;
579
580 sge->vaddr += length;
581 sge->length -= length;
582 sge->sge_length -= length;
583 if (sge->sge_length == 0) {
584 if (--ss->num_sge)
585 *sge = *ss->sg_list++;
586 } else if (sge->length == 0 && sge->mr != NULL) {
587 if (++sge->n >= IPATH_SEGSZ) {
588 if (++sge->m >= sge->mr->mapsz)
589 return;
590 sge->n = 0;
591 }
592 sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
593 sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
594 }
595 }
596
597 #ifdef __LITTLE_ENDIAN
598 static inline u32 get_upper_bits(u32 data, u32 shift)
599 {
600 return data >> shift;
601 }
602
603 static inline u32 set_upper_bits(u32 data, u32 shift)
604 {
605 return data << shift;
606 }
607
608 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
609 {
610 data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
611 data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
612 return data;
613 }
614 #else
615 static inline u32 get_upper_bits(u32 data, u32 shift)
616 {
617 return data << shift;
618 }
619
620 static inline u32 set_upper_bits(u32 data, u32 shift)
621 {
622 return data >> shift;
623 }
624
625 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
626 {
627 data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
628 data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
629 return data;
630 }
631 #endif
632
633 static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
634 u32 length)
635 {
636 u32 extra = 0;
637 u32 data = 0;
638 u32 last;
639
640 while (1) {
641 u32 len = ss->sge.length;
642 u32 off;
643
644 BUG_ON(len == 0);
645 if (len > length)
646 len = length;
647 if (len > ss->sge.sge_length)
648 len = ss->sge.sge_length;
649 /* If the source address is not aligned, try to align it. */
650 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
651 if (off) {
652 u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
653 ~(sizeof(u32) - 1));
654 u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
655 u32 y;
656
657 y = sizeof(u32) - off;
658 if (len > y)
659 len = y;
660 if (len + extra >= sizeof(u32)) {
661 data |= set_upper_bits(v, extra *
662 BITS_PER_BYTE);
663 len = sizeof(u32) - extra;
664 if (len == length) {
665 last = data;
666 break;
667 }
668 __raw_writel(data, piobuf);
669 piobuf++;
670 extra = 0;
671 data = 0;
672 } else {
673 /* Clear unused upper bytes */
674 data |= clear_upper_bytes(v, len, extra);
675 if (len == length) {
676 last = data;
677 break;
678 }
679 extra += len;
680 }
681 } else if (extra) {
682 /* Source address is aligned. */
683 u32 *addr = (u32 *) ss->sge.vaddr;
684 int shift = extra * BITS_PER_BYTE;
685 int ushift = 32 - shift;
686 u32 l = len;
687
688 while (l >= sizeof(u32)) {
689 u32 v = *addr;
690
691 data |= set_upper_bits(v, shift);
692 __raw_writel(data, piobuf);
693 data = get_upper_bits(v, ushift);
694 piobuf++;
695 addr++;
696 l -= sizeof(u32);
697 }
698 /*
699 * We still have 'extra' number of bytes leftover.
700 */
701 if (l) {
702 u32 v = *addr;
703
704 if (l + extra >= sizeof(u32)) {
705 data |= set_upper_bits(v, shift);
706 len -= l + extra - sizeof(u32);
707 if (len == length) {
708 last = data;
709 break;
710 }
711 __raw_writel(data, piobuf);
712 piobuf++;
713 extra = 0;
714 data = 0;
715 } else {
716 /* Clear unused upper bytes */
717 data |= clear_upper_bytes(v, l,
718 extra);
719 if (len == length) {
720 last = data;
721 break;
722 }
723 extra += l;
724 }
725 } else if (len == length) {
726 last = data;
727 break;
728 }
729 } else if (len == length) {
730 u32 w;
731
732 /*
733 * Need to round up for the last dword in the
734 * packet.
735 */
736 w = (len + 3) >> 2;
737 __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
738 piobuf += w - 1;
739 last = ((u32 *) ss->sge.vaddr)[w - 1];
740 break;
741 } else {
742 u32 w = len >> 2;
743
744 __iowrite32_copy(piobuf, ss->sge.vaddr, w);
745 piobuf += w;
746
747 extra = len & (sizeof(u32) - 1);
748 if (extra) {
749 u32 v = ((u32 *) ss->sge.vaddr)[w];
750
751 /* Clear unused upper bytes */
752 data = clear_upper_bytes(v, extra, 0);
753 }
754 }
755 update_sge(ss, len);
756 length -= len;
757 }
758 /* Update address before sending packet. */
759 update_sge(ss, length);
760 /* must flush early everything before trigger word */
761 ipath_flush_wc();
762 __raw_writel(last, piobuf);
763 /* be sure trigger word is written */
764 ipath_flush_wc();
765 }
766
767 /**
768 * ipath_verbs_send - send a packet
769 * @dd: the infinipath device
770 * @hdrwords: the number of words in the header
771 * @hdr: the packet header
772 * @len: the length of the packet in bytes
773 * @ss: the SGE to send
774 */
775 int ipath_verbs_send(struct ipath_devdata *dd, u32 hdrwords,
776 u32 *hdr, u32 len, struct ipath_sge_state *ss)
777 {
778 u32 __iomem *piobuf;
779 u32 plen;
780 int ret;
781
782 /* +1 is for the qword padding of pbc */
783 plen = hdrwords + ((len + 3) >> 2) + 1;
784 if (unlikely((plen << 2) > dd->ipath_ibmaxlen)) {
785 ret = -EINVAL;
786 goto bail;
787 }
788
789 /* Get a PIO buffer to use. */
790 piobuf = ipath_getpiobuf(dd, NULL);
791 if (unlikely(piobuf == NULL)) {
792 ret = -EBUSY;
793 goto bail;
794 }
795
796 /*
797 * Write len to control qword, no flags.
798 * We have to flush after the PBC for correctness on some cpus
799 * or WC buffer can be written out of order.
800 */
801 writeq(plen, piobuf);
802 ipath_flush_wc();
803 piobuf += 2;
804 if (len == 0) {
805 /*
806 * If there is just the header portion, must flush before
807 * writing last word of header for correctness, and after
808 * the last header word (trigger word).
809 */
810 __iowrite32_copy(piobuf, hdr, hdrwords - 1);
811 ipath_flush_wc();
812 __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
813 ipath_flush_wc();
814 ret = 0;
815 goto bail;
816 }
817
818 __iowrite32_copy(piobuf, hdr, hdrwords);
819 piobuf += hdrwords;
820
821 /* The common case is aligned and contained in one segment. */
822 if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
823 !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
824 u32 w;
825 u32 *addr = (u32 *) ss->sge.vaddr;
826
827 /* Update address before sending packet. */
828 update_sge(ss, len);
829 /* Need to round up for the last dword in the packet. */
830 w = (len + 3) >> 2;
831 __iowrite32_copy(piobuf, addr, w - 1);
832 /* must flush early everything before trigger word */
833 ipath_flush_wc();
834 __raw_writel(addr[w - 1], piobuf + w - 1);
835 /* be sure trigger word is written */
836 ipath_flush_wc();
837 ret = 0;
838 goto bail;
839 }
840 copy_io(piobuf, ss, len);
841 ret = 0;
842
843 bail:
844 return ret;
845 }
846
847 int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
848 u64 *rwords, u64 *spkts, u64 *rpkts,
849 u64 *xmit_wait)
850 {
851 int ret;
852
853 if (!(dd->ipath_flags & IPATH_INITTED)) {
854 /* no hardware, freeze, etc. */
855 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
856 ret = -EINVAL;
857 goto bail;
858 }
859 *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
860 *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
861 *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
862 *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
863 *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
864
865 ret = 0;
866
867 bail:
868 return ret;
869 }
870
871 /**
872 * ipath_get_counters - get various chip counters
873 * @dd: the infinipath device
874 * @cntrs: counters are placed here
875 *
876 * Return the counters needed by recv_pma_get_portcounters().
877 */
878 int ipath_get_counters(struct ipath_devdata *dd,
879 struct ipath_verbs_counters *cntrs)
880 {
881 int ret;
882
883 if (!(dd->ipath_flags & IPATH_INITTED)) {
884 /* no hardware, freeze, etc. */
885 ipath_dbg("unit %u not usable\n", dd->ipath_unit);
886 ret = -EINVAL;
887 goto bail;
888 }
889 cntrs->symbol_error_counter =
890 ipath_snap_cntr(dd, dd->ipath_cregs->cr_ibsymbolerrcnt);
891 cntrs->link_error_recovery_counter =
892 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkerrrecovcnt);
893 /*
894 * The link downed counter counts when the other side downs the
895 * connection. We add in the number of times we downed the link
896 * due to local link integrity errors to compensate.
897 */
898 cntrs->link_downed_counter =
899 ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkdowncnt);
900 cntrs->port_rcv_errors =
901 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rxdroppktcnt) +
902 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvovflcnt) +
903 ipath_snap_cntr(dd, dd->ipath_cregs->cr_portovflcnt) +
904 ipath_snap_cntr(dd, dd->ipath_cregs->cr_err_rlencnt) +
905 ipath_snap_cntr(dd, dd->ipath_cregs->cr_invalidrlencnt) +
906 ipath_snap_cntr(dd, dd->ipath_cregs->cr_erricrccnt) +
907 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errvcrccnt) +
908 ipath_snap_cntr(dd, dd->ipath_cregs->cr_errlpcrccnt) +
909 ipath_snap_cntr(dd, dd->ipath_cregs->cr_badformatcnt) +
910 dd->ipath_rxfc_unsupvl_errs;
911 cntrs->port_rcv_remphys_errors =
912 ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvebpcnt);
913 cntrs->port_xmit_discards =
914 ipath_snap_cntr(dd, dd->ipath_cregs->cr_unsupvlcnt);
915 cntrs->port_xmit_data =
916 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
917 cntrs->port_rcv_data =
918 ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
919 cntrs->port_xmit_packets =
920 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
921 cntrs->port_rcv_packets =
922 ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
923 cntrs->local_link_integrity_errors =
924 (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
925 dd->ipath_lli_errs : dd->ipath_lli_errors;
926 cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
927
928 ret = 0;
929
930 bail:
931 return ret;
932 }
933
934 /**
935 * ipath_ib_piobufavail - callback when a PIO buffer is available
936 * @arg: the device pointer
937 *
938 * This is called from ipath_intr() at interrupt level when a PIO buffer is
939 * available after ipath_verbs_send() returned an error that no buffers were
940 * available. Return 1 if we consumed all the PIO buffers and we still have
941 * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
942 * return zero).
943 */
944 int ipath_ib_piobufavail(struct ipath_ibdev *dev)
945 {
946 struct ipath_qp *qp;
947 unsigned long flags;
948
949 if (dev == NULL)
950 goto bail;
951
952 spin_lock_irqsave(&dev->pending_lock, flags);
953 while (!list_empty(&dev->piowait)) {
954 qp = list_entry(dev->piowait.next, struct ipath_qp,
955 piowait);
956 list_del_init(&qp->piowait);
957 clear_bit(IPATH_S_BUSY, &qp->s_busy);
958 tasklet_hi_schedule(&qp->s_task);
959 }
960 spin_unlock_irqrestore(&dev->pending_lock, flags);
961
962 bail:
963 return 0;
964 }
965
966 static int ipath_query_device(struct ib_device *ibdev,
967 struct ib_device_attr *props)
968 {
969 struct ipath_ibdev *dev = to_idev(ibdev);
970
971 memset(props, 0, sizeof(*props));
972
973 props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
974 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
975 IB_DEVICE_SYS_IMAGE_GUID;
976 props->page_size_cap = PAGE_SIZE;
977 props->vendor_id = dev->dd->ipath_vendorid;
978 props->vendor_part_id = dev->dd->ipath_deviceid;
979 props->hw_ver = dev->dd->ipath_pcirev;
980
981 props->sys_image_guid = dev->sys_image_guid;
982
983 props->max_mr_size = ~0ull;
984 props->max_qp = ib_ipath_max_qps;
985 props->max_qp_wr = ib_ipath_max_qp_wrs;
986 props->max_sge = ib_ipath_max_sges;
987 props->max_cq = ib_ipath_max_cqs;
988 props->max_ah = ib_ipath_max_ahs;
989 props->max_cqe = ib_ipath_max_cqes;
990 props->max_mr = dev->lk_table.max;
991 props->max_fmr = dev->lk_table.max;
992 props->max_map_per_fmr = 32767;
993 props->max_pd = ib_ipath_max_pds;
994 props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
995 props->max_qp_init_rd_atom = 255;
996 /* props->max_res_rd_atom */
997 props->max_srq = ib_ipath_max_srqs;
998 props->max_srq_wr = ib_ipath_max_srq_wrs;
999 props->max_srq_sge = ib_ipath_max_srq_sges;
1000 /* props->local_ca_ack_delay */
1001 props->atomic_cap = IB_ATOMIC_GLOB;
1002 props->max_pkeys = ipath_get_npkeys(dev->dd);
1003 props->max_mcast_grp = ib_ipath_max_mcast_grps;
1004 props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
1005 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
1006 props->max_mcast_grp;
1007
1008 return 0;
1009 }
1010
1011 const u8 ipath_cvt_physportstate[16] = {
1012 [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
1013 [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
1014 [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
1015 [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
1016 [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
1017 [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
1018 [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
1019 [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
1020 [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
1021 [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
1022 [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
1023 [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
1024 [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
1025 };
1026
1027 u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
1028 {
1029 return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
1030 }
1031
1032 static int ipath_query_port(struct ib_device *ibdev,
1033 u8 port, struct ib_port_attr *props)
1034 {
1035 struct ipath_ibdev *dev = to_idev(ibdev);
1036 enum ib_mtu mtu;
1037 u16 lid = dev->dd->ipath_lid;
1038 u64 ibcstat;
1039
1040 memset(props, 0, sizeof(*props));
1041 props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1042 props->lmc = dev->mkeyprot_resv_lmc & 7;
1043 props->sm_lid = dev->sm_lid;
1044 props->sm_sl = dev->sm_sl;
1045 ibcstat = dev->dd->ipath_lastibcstat;
1046 props->state = ((ibcstat >> 4) & 0x3) + 1;
1047 /* See phys_state_show() */
1048 props->phys_state = ipath_cvt_physportstate[
1049 dev->dd->ipath_lastibcstat & 0xf];
1050 props->port_cap_flags = dev->port_cap_flags;
1051 props->gid_tbl_len = 1;
1052 props->max_msg_sz = 0x80000000;
1053 props->pkey_tbl_len = ipath_get_npkeys(dev->dd);
1054 props->bad_pkey_cntr = ipath_get_cr_errpkey(dev->dd) -
1055 dev->z_pkey_violations;
1056 props->qkey_viol_cntr = dev->qkey_violations;
1057 props->active_width = IB_WIDTH_4X;
1058 /* See rate_show() */
1059 props->active_speed = 1; /* Regular 10Mbs speed. */
1060 props->max_vl_num = 1; /* VLCap = VL0 */
1061 props->init_type_reply = 0;
1062
1063 /*
1064 * Note: the chips support a maximum MTU of 4096, but the driver
1065 * hasn't implemented this feature yet, so set the maximum value
1066 * to 2048.
1067 */
1068 props->max_mtu = IB_MTU_2048;
1069 switch (dev->dd->ipath_ibmtu) {
1070 case 4096:
1071 mtu = IB_MTU_4096;
1072 break;
1073 case 2048:
1074 mtu = IB_MTU_2048;
1075 break;
1076 case 1024:
1077 mtu = IB_MTU_1024;
1078 break;
1079 case 512:
1080 mtu = IB_MTU_512;
1081 break;
1082 case 256:
1083 mtu = IB_MTU_256;
1084 break;
1085 default:
1086 mtu = IB_MTU_2048;
1087 }
1088 props->active_mtu = mtu;
1089 props->subnet_timeout = dev->subnet_timeout;
1090
1091 return 0;
1092 }
1093
1094 static int ipath_modify_device(struct ib_device *device,
1095 int device_modify_mask,
1096 struct ib_device_modify *device_modify)
1097 {
1098 int ret;
1099
1100 if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1101 IB_DEVICE_MODIFY_NODE_DESC)) {
1102 ret = -EOPNOTSUPP;
1103 goto bail;
1104 }
1105
1106 if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
1107 memcpy(device->node_desc, device_modify->node_desc, 64);
1108
1109 if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
1110 to_idev(device)->sys_image_guid =
1111 cpu_to_be64(device_modify->sys_image_guid);
1112
1113 ret = 0;
1114
1115 bail:
1116 return ret;
1117 }
1118
1119 static int ipath_modify_port(struct ib_device *ibdev,
1120 u8 port, int port_modify_mask,
1121 struct ib_port_modify *props)
1122 {
1123 struct ipath_ibdev *dev = to_idev(ibdev);
1124
1125 dev->port_cap_flags |= props->set_port_cap_mask;
1126 dev->port_cap_flags &= ~props->clr_port_cap_mask;
1127 if (port_modify_mask & IB_PORT_SHUTDOWN)
1128 ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
1129 if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
1130 dev->qkey_violations = 0;
1131 return 0;
1132 }
1133
1134 static int ipath_query_gid(struct ib_device *ibdev, u8 port,
1135 int index, union ib_gid *gid)
1136 {
1137 struct ipath_ibdev *dev = to_idev(ibdev);
1138 int ret;
1139
1140 if (index >= 1) {
1141 ret = -EINVAL;
1142 goto bail;
1143 }
1144 gid->global.subnet_prefix = dev->gid_prefix;
1145 gid->global.interface_id = dev->dd->ipath_guid;
1146
1147 ret = 0;
1148
1149 bail:
1150 return ret;
1151 }
1152
1153 static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
1154 struct ib_ucontext *context,
1155 struct ib_udata *udata)
1156 {
1157 struct ipath_ibdev *dev = to_idev(ibdev);
1158 struct ipath_pd *pd;
1159 struct ib_pd *ret;
1160
1161 /*
1162 * This is actually totally arbitrary. Some correctness tests
1163 * assume there's a maximum number of PDs that can be allocated.
1164 * We don't actually have this limit, but we fail the test if
1165 * we allow allocations of more than we report for this value.
1166 */
1167
1168 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1169 if (!pd) {
1170 ret = ERR_PTR(-ENOMEM);
1171 goto bail;
1172 }
1173
1174 spin_lock(&dev->n_pds_lock);
1175 if (dev->n_pds_allocated == ib_ipath_max_pds) {
1176 spin_unlock(&dev->n_pds_lock);
1177 kfree(pd);
1178 ret = ERR_PTR(-ENOMEM);
1179 goto bail;
1180 }
1181
1182 dev->n_pds_allocated++;
1183 spin_unlock(&dev->n_pds_lock);
1184
1185 /* ib_alloc_pd() will initialize pd->ibpd. */
1186 pd->user = udata != NULL;
1187
1188 ret = &pd->ibpd;
1189
1190 bail:
1191 return ret;
1192 }
1193
1194 static int ipath_dealloc_pd(struct ib_pd *ibpd)
1195 {
1196 struct ipath_pd *pd = to_ipd(ibpd);
1197 struct ipath_ibdev *dev = to_idev(ibpd->device);
1198
1199 spin_lock(&dev->n_pds_lock);
1200 dev->n_pds_allocated--;
1201 spin_unlock(&dev->n_pds_lock);
1202
1203 kfree(pd);
1204
1205 return 0;
1206 }
1207
1208 /**
1209 * ipath_create_ah - create an address handle
1210 * @pd: the protection domain
1211 * @ah_attr: the attributes of the AH
1212 *
1213 * This may be called from interrupt context.
1214 */
1215 static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
1216 struct ib_ah_attr *ah_attr)
1217 {
1218 struct ipath_ah *ah;
1219 struct ib_ah *ret;
1220 struct ipath_ibdev *dev = to_idev(pd->device);
1221 unsigned long flags;
1222
1223 /* A multicast address requires a GRH (see ch. 8.4.1). */
1224 if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
1225 ah_attr->dlid != IPATH_PERMISSIVE_LID &&
1226 !(ah_attr->ah_flags & IB_AH_GRH)) {
1227 ret = ERR_PTR(-EINVAL);
1228 goto bail;
1229 }
1230
1231 if (ah_attr->dlid == 0) {
1232 ret = ERR_PTR(-EINVAL);
1233 goto bail;
1234 }
1235
1236 if (ah_attr->port_num < 1 ||
1237 ah_attr->port_num > pd->device->phys_port_cnt) {
1238 ret = ERR_PTR(-EINVAL);
1239 goto bail;
1240 }
1241
1242 ah = kmalloc(sizeof *ah, GFP_ATOMIC);
1243 if (!ah) {
1244 ret = ERR_PTR(-ENOMEM);
1245 goto bail;
1246 }
1247
1248 spin_lock_irqsave(&dev->n_ahs_lock, flags);
1249 if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
1250 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1251 kfree(ah);
1252 ret = ERR_PTR(-ENOMEM);
1253 goto bail;
1254 }
1255
1256 dev->n_ahs_allocated++;
1257 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1258
1259 /* ib_create_ah() will initialize ah->ibah. */
1260 ah->attr = *ah_attr;
1261
1262 ret = &ah->ibah;
1263
1264 bail:
1265 return ret;
1266 }
1267
1268 /**
1269 * ipath_destroy_ah - destroy an address handle
1270 * @ibah: the AH to destroy
1271 *
1272 * This may be called from interrupt context.
1273 */
1274 static int ipath_destroy_ah(struct ib_ah *ibah)
1275 {
1276 struct ipath_ibdev *dev = to_idev(ibah->device);
1277 struct ipath_ah *ah = to_iah(ibah);
1278 unsigned long flags;
1279
1280 spin_lock_irqsave(&dev->n_ahs_lock, flags);
1281 dev->n_ahs_allocated--;
1282 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1283
1284 kfree(ah);
1285
1286 return 0;
1287 }
1288
1289 static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
1290 {
1291 struct ipath_ah *ah = to_iah(ibah);
1292
1293 *ah_attr = ah->attr;
1294
1295 return 0;
1296 }
1297
1298 /**
1299 * ipath_get_npkeys - return the size of the PKEY table for port 0
1300 * @dd: the infinipath device
1301 */
1302 unsigned ipath_get_npkeys(struct ipath_devdata *dd)
1303 {
1304 return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
1305 }
1306
1307 /**
1308 * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
1309 * @dd: the infinipath device
1310 * @index: the PKEY index
1311 */
1312 unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
1313 {
1314 unsigned ret;
1315
1316 if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
1317 ret = 0;
1318 else
1319 ret = dd->ipath_pd[0]->port_pkeys[index];
1320
1321 return ret;
1322 }
1323
1324 static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
1325 u16 *pkey)
1326 {
1327 struct ipath_ibdev *dev = to_idev(ibdev);
1328 int ret;
1329
1330 if (index >= ipath_get_npkeys(dev->dd)) {
1331 ret = -EINVAL;
1332 goto bail;
1333 }
1334
1335 *pkey = ipath_get_pkey(dev->dd, index);
1336 ret = 0;
1337
1338 bail:
1339 return ret;
1340 }
1341
1342 /**
1343 * ipath_alloc_ucontext - allocate a ucontest
1344 * @ibdev: the infiniband device
1345 * @udata: not used by the InfiniPath driver
1346 */
1347
1348 static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
1349 struct ib_udata *udata)
1350 {
1351 struct ipath_ucontext *context;
1352 struct ib_ucontext *ret;
1353
1354 context = kmalloc(sizeof *context, GFP_KERNEL);
1355 if (!context) {
1356 ret = ERR_PTR(-ENOMEM);
1357 goto bail;
1358 }
1359
1360 ret = &context->ibucontext;
1361
1362 bail:
1363 return ret;
1364 }
1365
1366 static int ipath_dealloc_ucontext(struct ib_ucontext *context)
1367 {
1368 kfree(to_iucontext(context));
1369 return 0;
1370 }
1371
1372 static int ipath_verbs_register_sysfs(struct ib_device *dev);
1373
1374 static void __verbs_timer(unsigned long arg)
1375 {
1376 struct ipath_devdata *dd = (struct ipath_devdata *) arg;
1377
1378 /* Handle verbs layer timeouts. */
1379 ipath_ib_timer(dd->verbs_dev);
1380
1381 mod_timer(&dd->verbs_timer, jiffies + 1);
1382 }
1383
1384 static int enable_timer(struct ipath_devdata *dd)
1385 {
1386 /*
1387 * Early chips had a design flaw where the chip and kernel idea
1388 * of the tail register don't always agree, and therefore we won't
1389 * get an interrupt on the next packet received.
1390 * If the board supports per packet receive interrupts, use it.
1391 * Otherwise, the timer function periodically checks for packets
1392 * to cover this case.
1393 * Either way, the timer is needed for verbs layer related
1394 * processing.
1395 */
1396 if (dd->ipath_flags & IPATH_GPIO_INTR) {
1397 ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
1398 0x2074076542310ULL);
1399 /* Enable GPIO bit 2 interrupt */
1400 dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
1401 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1402 dd->ipath_gpio_mask);
1403 }
1404
1405 init_timer(&dd->verbs_timer);
1406 dd->verbs_timer.function = __verbs_timer;
1407 dd->verbs_timer.data = (unsigned long)dd;
1408 dd->verbs_timer.expires = jiffies + 1;
1409 add_timer(&dd->verbs_timer);
1410
1411 return 0;
1412 }
1413
1414 static int disable_timer(struct ipath_devdata *dd)
1415 {
1416 /* Disable GPIO bit 2 interrupt */
1417 if (dd->ipath_flags & IPATH_GPIO_INTR) {
1418 u64 val;
1419 /* Disable GPIO bit 2 interrupt */
1420 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
1421 dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
1422 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1423 dd->ipath_gpio_mask);
1424 /*
1425 * We might want to undo changes to debugportselect,
1426 * but how?
1427 */
1428 }
1429
1430 del_timer_sync(&dd->verbs_timer);
1431
1432 return 0;
1433 }
1434
1435 /**
1436 * ipath_register_ib_device - register our device with the infiniband core
1437 * @dd: the device data structure
1438 * Return the allocated ipath_ibdev pointer or NULL on error.
1439 */
1440 int ipath_register_ib_device(struct ipath_devdata *dd)
1441 {
1442 struct ipath_verbs_counters cntrs;
1443 struct ipath_ibdev *idev;
1444 struct ib_device *dev;
1445 int ret;
1446
1447 idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
1448 if (idev == NULL) {
1449 ret = -ENOMEM;
1450 goto bail;
1451 }
1452
1453 dev = &idev->ibdev;
1454
1455 /* Only need to initialize non-zero fields. */
1456 spin_lock_init(&idev->n_pds_lock);
1457 spin_lock_init(&idev->n_ahs_lock);
1458 spin_lock_init(&idev->n_cqs_lock);
1459 spin_lock_init(&idev->n_qps_lock);
1460 spin_lock_init(&idev->n_srqs_lock);
1461 spin_lock_init(&idev->n_mcast_grps_lock);
1462
1463 spin_lock_init(&idev->qp_table.lock);
1464 spin_lock_init(&idev->lk_table.lock);
1465 idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1466 /* Set the prefix to the default value (see ch. 4.1.1) */
1467 idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
1468
1469 ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
1470 if (ret)
1471 goto err_qp;
1472
1473 /*
1474 * The top ib_ipath_lkey_table_size bits are used to index the
1475 * table. The lower 8 bits can be owned by the user (copied from
1476 * the LKEY). The remaining bits act as a generation number or tag.
1477 */
1478 idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
1479 idev->lk_table.table = kzalloc(idev->lk_table.max *
1480 sizeof(*idev->lk_table.table),
1481 GFP_KERNEL);
1482 if (idev->lk_table.table == NULL) {
1483 ret = -ENOMEM;
1484 goto err_lk;
1485 }
1486 INIT_LIST_HEAD(&idev->pending_mmaps);
1487 spin_lock_init(&idev->pending_lock);
1488 idev->mmap_offset = PAGE_SIZE;
1489 spin_lock_init(&idev->mmap_offset_lock);
1490 INIT_LIST_HEAD(&idev->pending[0]);
1491 INIT_LIST_HEAD(&idev->pending[1]);
1492 INIT_LIST_HEAD(&idev->pending[2]);
1493 INIT_LIST_HEAD(&idev->piowait);
1494 INIT_LIST_HEAD(&idev->rnrwait);
1495 idev->pending_index = 0;
1496 idev->port_cap_flags =
1497 IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
1498 idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1499 idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1500 idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1501 idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1502 idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1503 idev->link_width_enabled = 3; /* 1x or 4x */
1504
1505 /* Snapshot current HW counters to "clear" them. */
1506 ipath_get_counters(dd, &cntrs);
1507 idev->z_symbol_error_counter = cntrs.symbol_error_counter;
1508 idev->z_link_error_recovery_counter =
1509 cntrs.link_error_recovery_counter;
1510 idev->z_link_downed_counter = cntrs.link_downed_counter;
1511 idev->z_port_rcv_errors = cntrs.port_rcv_errors;
1512 idev->z_port_rcv_remphys_errors =
1513 cntrs.port_rcv_remphys_errors;
1514 idev->z_port_xmit_discards = cntrs.port_xmit_discards;
1515 idev->z_port_xmit_data = cntrs.port_xmit_data;
1516 idev->z_port_rcv_data = cntrs.port_rcv_data;
1517 idev->z_port_xmit_packets = cntrs.port_xmit_packets;
1518 idev->z_port_rcv_packets = cntrs.port_rcv_packets;
1519 idev->z_local_link_integrity_errors =
1520 cntrs.local_link_integrity_errors;
1521 idev->z_excessive_buffer_overrun_errors =
1522 cntrs.excessive_buffer_overrun_errors;
1523
1524 /*
1525 * The system image GUID is supposed to be the same for all
1526 * IB HCAs in a single system but since there can be other
1527 * device types in the system, we can't be sure this is unique.
1528 */
1529 if (!sys_image_guid)
1530 sys_image_guid = dd->ipath_guid;
1531 idev->sys_image_guid = sys_image_guid;
1532 idev->ib_unit = dd->ipath_unit;
1533 idev->dd = dd;
1534
1535 strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
1536 dev->owner = THIS_MODULE;
1537 dev->node_guid = dd->ipath_guid;
1538 dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
1539 dev->uverbs_cmd_mask =
1540 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1541 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1542 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1543 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1544 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1545 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
1546 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
1547 (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
1548 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1549 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1550 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1551 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1552 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1553 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1554 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
1555 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
1556 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1557 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1558 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1559 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1560 (1ull << IB_USER_VERBS_CMD_POST_SEND) |
1561 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
1562 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1563 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1564 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1565 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1566 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1567 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1568 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
1569 dev->node_type = RDMA_NODE_IB_CA;
1570 dev->phys_port_cnt = 1;
1571 dev->num_comp_vectors = 1;
1572 dev->dma_device = &dd->pcidev->dev;
1573 dev->query_device = ipath_query_device;
1574 dev->modify_device = ipath_modify_device;
1575 dev->query_port = ipath_query_port;
1576 dev->modify_port = ipath_modify_port;
1577 dev->query_pkey = ipath_query_pkey;
1578 dev->query_gid = ipath_query_gid;
1579 dev->alloc_ucontext = ipath_alloc_ucontext;
1580 dev->dealloc_ucontext = ipath_dealloc_ucontext;
1581 dev->alloc_pd = ipath_alloc_pd;
1582 dev->dealloc_pd = ipath_dealloc_pd;
1583 dev->create_ah = ipath_create_ah;
1584 dev->destroy_ah = ipath_destroy_ah;
1585 dev->query_ah = ipath_query_ah;
1586 dev->create_srq = ipath_create_srq;
1587 dev->modify_srq = ipath_modify_srq;
1588 dev->query_srq = ipath_query_srq;
1589 dev->destroy_srq = ipath_destroy_srq;
1590 dev->create_qp = ipath_create_qp;
1591 dev->modify_qp = ipath_modify_qp;
1592 dev->query_qp = ipath_query_qp;
1593 dev->destroy_qp = ipath_destroy_qp;
1594 dev->post_send = ipath_post_send;
1595 dev->post_recv = ipath_post_receive;
1596 dev->post_srq_recv = ipath_post_srq_receive;
1597 dev->create_cq = ipath_create_cq;
1598 dev->destroy_cq = ipath_destroy_cq;
1599 dev->resize_cq = ipath_resize_cq;
1600 dev->poll_cq = ipath_poll_cq;
1601 dev->req_notify_cq = ipath_req_notify_cq;
1602 dev->get_dma_mr = ipath_get_dma_mr;
1603 dev->reg_phys_mr = ipath_reg_phys_mr;
1604 dev->reg_user_mr = ipath_reg_user_mr;
1605 dev->dereg_mr = ipath_dereg_mr;
1606 dev->alloc_fmr = ipath_alloc_fmr;
1607 dev->map_phys_fmr = ipath_map_phys_fmr;
1608 dev->unmap_fmr = ipath_unmap_fmr;
1609 dev->dealloc_fmr = ipath_dealloc_fmr;
1610 dev->attach_mcast = ipath_multicast_attach;
1611 dev->detach_mcast = ipath_multicast_detach;
1612 dev->process_mad = ipath_process_mad;
1613 dev->mmap = ipath_mmap;
1614 dev->dma_ops = &ipath_dma_mapping_ops;
1615
1616 snprintf(dev->node_desc, sizeof(dev->node_desc),
1617 IPATH_IDSTR " %s", init_utsname()->nodename);
1618
1619 ret = ib_register_device(dev);
1620 if (ret)
1621 goto err_reg;
1622
1623 if (ipath_verbs_register_sysfs(dev))
1624 goto err_class;
1625
1626 enable_timer(dd);
1627
1628 goto bail;
1629
1630 err_class:
1631 ib_unregister_device(dev);
1632 err_reg:
1633 kfree(idev->lk_table.table);
1634 err_lk:
1635 kfree(idev->qp_table.table);
1636 err_qp:
1637 ib_dealloc_device(dev);
1638 ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1639 idev = NULL;
1640
1641 bail:
1642 dd->verbs_dev = idev;
1643 return ret;
1644 }
1645
1646 void ipath_unregister_ib_device(struct ipath_ibdev *dev)
1647 {
1648 struct ib_device *ibdev = &dev->ibdev;
1649
1650 disable_timer(dev->dd);
1651
1652 ib_unregister_device(ibdev);
1653
1654 if (!list_empty(&dev->pending[0]) ||
1655 !list_empty(&dev->pending[1]) ||
1656 !list_empty(&dev->pending[2]))
1657 ipath_dev_err(dev->dd, "pending list not empty!\n");
1658 if (!list_empty(&dev->piowait))
1659 ipath_dev_err(dev->dd, "piowait list not empty!\n");
1660 if (!list_empty(&dev->rnrwait))
1661 ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
1662 if (!ipath_mcast_tree_empty())
1663 ipath_dev_err(dev->dd, "multicast table memory leak!\n");
1664 /*
1665 * Note that ipath_unregister_ib_device() can be called before all
1666 * the QPs are destroyed!
1667 */
1668 ipath_free_all_qps(&dev->qp_table);
1669 kfree(dev->qp_table.table);
1670 kfree(dev->lk_table.table);
1671 ib_dealloc_device(ibdev);
1672 }
1673
1674 static ssize_t show_rev(struct class_device *cdev, char *buf)
1675 {
1676 struct ipath_ibdev *dev =
1677 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1678
1679 return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
1680 }
1681
1682 static ssize_t show_hca(struct class_device *cdev, char *buf)
1683 {
1684 struct ipath_ibdev *dev =
1685 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1686 int ret;
1687
1688 ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
1689 if (ret < 0)
1690 goto bail;
1691 strcat(buf, "\n");
1692 ret = strlen(buf);
1693
1694 bail:
1695 return ret;
1696 }
1697
1698 static ssize_t show_stats(struct class_device *cdev, char *buf)
1699 {
1700 struct ipath_ibdev *dev =
1701 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1702 int i;
1703 int len;
1704
1705 len = sprintf(buf,
1706 "RC resends %d\n"
1707 "RC no QACK %d\n"
1708 "RC ACKs %d\n"
1709 "RC SEQ NAKs %d\n"
1710 "RC RDMA seq %d\n"
1711 "RC RNR NAKs %d\n"
1712 "RC OTH NAKs %d\n"
1713 "RC timeouts %d\n"
1714 "RC RDMA dup %d\n"
1715 "RC stalls %d\n"
1716 "piobuf wait %d\n"
1717 "no piobuf %d\n"
1718 "PKT drops %d\n"
1719 "WQE errs %d\n",
1720 dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
1721 dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
1722 dev->n_other_naks, dev->n_timeouts,
1723 dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
1724 dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
1725 for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
1726 const struct ipath_opcode_stats *si = &dev->opstats[i];
1727
1728 if (!si->n_packets && !si->n_bytes)
1729 continue;
1730 len += sprintf(buf + len, "%02x %llu/%llu\n", i,
1731 (unsigned long long) si->n_packets,
1732 (unsigned long long) si->n_bytes);
1733 }
1734 return len;
1735 }
1736
1737 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1738 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1739 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
1740 static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
1741
1742 static struct class_device_attribute *ipath_class_attributes[] = {
1743 &class_device_attr_hw_rev,
1744 &class_device_attr_hca_type,
1745 &class_device_attr_board_id,
1746 &class_device_attr_stats
1747 };
1748
1749 static int ipath_verbs_register_sysfs(struct ib_device *dev)
1750 {
1751 int i;
1752 int ret;
1753
1754 for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
1755 if (class_device_create_file(&dev->class_dev,
1756 ipath_class_attributes[i])) {
1757 ret = 1;
1758 goto bail;
1759 }
1760
1761 ret = 0;
1762
1763 bail:
1764 return ret;
1765 }