2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 int mlx5_cmd_dump_fill_mkey(struct mlx5_core_dev
*dev
, u32
*mkey
)
37 u32 out
[MLX5_ST_SZ_DW(query_special_contexts_out
)] = {0};
38 u32 in
[MLX5_ST_SZ_DW(query_special_contexts_in
)] = {0};
41 MLX5_SET(query_special_contexts_in
, in
, opcode
,
42 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS
);
43 err
= mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
45 *mkey
= MLX5_GET(query_special_contexts_out
, out
,
50 int mlx5_cmd_null_mkey(struct mlx5_core_dev
*dev
, u32
*null_mkey
)
52 u32 out
[MLX5_ST_SZ_DW(query_special_contexts_out
)] = {};
53 u32 in
[MLX5_ST_SZ_DW(query_special_contexts_in
)] = {};
56 MLX5_SET(query_special_contexts_in
, in
, opcode
,
57 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS
);
58 err
= mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
60 *null_mkey
= MLX5_GET(query_special_contexts_out
, out
,
65 int mlx5_cmd_query_cong_params(struct mlx5_core_dev
*dev
, int cong_point
,
66 void *out
, int out_size
)
68 u32 in
[MLX5_ST_SZ_DW(query_cong_params_in
)] = { };
70 MLX5_SET(query_cong_params_in
, in
, opcode
,
71 MLX5_CMD_OP_QUERY_CONG_PARAMS
);
72 MLX5_SET(query_cong_params_in
, in
, cong_protocol
, cong_point
);
74 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, out_size
);
77 int mlx5_cmd_modify_cong_params(struct mlx5_core_dev
*dev
,
78 void *in
, int in_size
)
80 u32 out
[MLX5_ST_SZ_DW(modify_cong_params_out
)] = { };
82 return mlx5_cmd_exec(dev
, in
, in_size
, out
, sizeof(out
));
85 int mlx5_cmd_alloc_memic(struct mlx5_memic
*memic
, phys_addr_t
*addr
,
86 u64 length
, u32 alignment
)
88 struct mlx5_core_dev
*dev
= memic
->dev
;
89 u64 num_memic_hw_pages
= MLX5_CAP_DEV_MEM(dev
, memic_bar_size
)
91 u64 hw_start_addr
= MLX5_CAP64_DEV_MEM(dev
, memic_bar_start_addr
);
92 u32 max_alignment
= MLX5_CAP_DEV_MEM(dev
, log_max_memic_addr_alignment
);
93 u32 num_pages
= DIV_ROUND_UP(length
, PAGE_SIZE
);
94 u32 out
[MLX5_ST_SZ_DW(alloc_memic_out
)] = {};
95 u32 in
[MLX5_ST_SZ_DW(alloc_memic_in
)] = {};
100 if (!length
|| (length
& MLX5_MEMIC_ALLOC_SIZE_MASK
))
103 /* mlx5 device sets alignment as 64*2^driver_value
104 * so normalizing is needed.
106 mlx5_alignment
= (alignment
< MLX5_MEMIC_BASE_ALIGN
) ? 0 :
107 alignment
- MLX5_MEMIC_BASE_ALIGN
;
108 if (mlx5_alignment
> max_alignment
)
111 MLX5_SET(alloc_memic_in
, in
, opcode
, MLX5_CMD_OP_ALLOC_MEMIC
);
112 MLX5_SET(alloc_memic_in
, in
, range_size
, num_pages
* PAGE_SIZE
);
113 MLX5_SET(alloc_memic_in
, in
, memic_size
, length
);
114 MLX5_SET(alloc_memic_in
, in
, log_memic_addr_alignment
,
117 while (page_idx
< num_memic_hw_pages
) {
118 spin_lock(&memic
->memic_lock
);
119 page_idx
= bitmap_find_next_zero_area(memic
->memic_alloc_pages
,
124 if (page_idx
< num_memic_hw_pages
)
125 bitmap_set(memic
->memic_alloc_pages
,
126 page_idx
, num_pages
);
128 spin_unlock(&memic
->memic_lock
);
130 if (page_idx
>= num_memic_hw_pages
)
133 MLX5_SET64(alloc_memic_in
, in
, range_start_addr
,
134 hw_start_addr
+ (page_idx
* PAGE_SIZE
));
136 ret
= mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
138 spin_lock(&memic
->memic_lock
);
139 bitmap_clear(memic
->memic_alloc_pages
,
140 page_idx
, num_pages
);
141 spin_unlock(&memic
->memic_lock
);
143 if (ret
== -EAGAIN
) {
151 *addr
= pci_resource_start(dev
->pdev
, 0) +
152 MLX5_GET64(alloc_memic_out
, out
, memic_start_addr
);
160 int mlx5_cmd_dealloc_memic(struct mlx5_memic
*memic
, u64 addr
, u64 length
)
162 struct mlx5_core_dev
*dev
= memic
->dev
;
163 u64 hw_start_addr
= MLX5_CAP64_DEV_MEM(dev
, memic_bar_start_addr
);
164 u32 num_pages
= DIV_ROUND_UP(length
, PAGE_SIZE
);
165 u32 out
[MLX5_ST_SZ_DW(dealloc_memic_out
)] = {0};
166 u32 in
[MLX5_ST_SZ_DW(dealloc_memic_in
)] = {0};
170 addr
-= pci_resource_start(dev
->pdev
, 0);
171 start_page_idx
= (addr
- hw_start_addr
) >> PAGE_SHIFT
;
173 MLX5_SET(dealloc_memic_in
, in
, opcode
, MLX5_CMD_OP_DEALLOC_MEMIC
);
174 MLX5_SET64(dealloc_memic_in
, in
, memic_start_addr
, addr
);
175 MLX5_SET(dealloc_memic_in
, in
, memic_size
, length
);
177 err
= mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
180 spin_lock(&memic
->memic_lock
);
181 bitmap_clear(memic
->memic_alloc_pages
,
182 start_page_idx
, num_pages
);
183 spin_unlock(&memic
->memic_lock
);
189 int mlx5_cmd_query_ext_ppcnt_counters(struct mlx5_core_dev
*dev
, void *out
)
191 u32 in
[MLX5_ST_SZ_DW(ppcnt_reg
)] = {};
192 int sz
= MLX5_ST_SZ_BYTES(ppcnt_reg
);
194 MLX5_SET(ppcnt_reg
, in
, local_port
, 1);
196 MLX5_SET(ppcnt_reg
, in
, grp
, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP
);
197 return mlx5_core_access_reg(dev
, in
, sz
, out
, sz
, MLX5_REG_PPCNT
,
201 void mlx5_cmd_dealloc_pd(struct mlx5_core_dev
*dev
, u32 pdn
, u16 uid
)
203 u32 out
[MLX5_ST_SZ_DW(dealloc_pd_out
)] = {};
204 u32 in
[MLX5_ST_SZ_DW(dealloc_pd_in
)] = {};
206 MLX5_SET(dealloc_pd_in
, in
, opcode
, MLX5_CMD_OP_DEALLOC_PD
);
207 MLX5_SET(dealloc_pd_in
, in
, pd
, pdn
);
208 MLX5_SET(dealloc_pd_in
, in
, uid
, uid
);
209 mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
212 int mlx5_cmd_attach_mcg(struct mlx5_core_dev
*dev
, union ib_gid
*mgid
,
215 u32 out
[MLX5_ST_SZ_DW(attach_to_mcg_out
)] = {};
216 u32 in
[MLX5_ST_SZ_DW(attach_to_mcg_in
)] = {};
219 MLX5_SET(attach_to_mcg_in
, in
, opcode
, MLX5_CMD_OP_ATTACH_TO_MCG
);
220 MLX5_SET(attach_to_mcg_in
, in
, qpn
, qpn
);
221 MLX5_SET(attach_to_mcg_in
, in
, uid
, uid
);
222 gid
= MLX5_ADDR_OF(attach_to_mcg_in
, in
, multicast_gid
);
223 memcpy(gid
, mgid
, sizeof(*mgid
));
224 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
227 int mlx5_cmd_detach_mcg(struct mlx5_core_dev
*dev
, union ib_gid
*mgid
,
230 u32 out
[MLX5_ST_SZ_DW(detach_from_mcg_out
)] = {};
231 u32 in
[MLX5_ST_SZ_DW(detach_from_mcg_in
)] = {};
234 MLX5_SET(detach_from_mcg_in
, in
, opcode
, MLX5_CMD_OP_DETACH_FROM_MCG
);
235 MLX5_SET(detach_from_mcg_in
, in
, qpn
, qpn
);
236 MLX5_SET(detach_from_mcg_in
, in
, uid
, uid
);
237 gid
= MLX5_ADDR_OF(detach_from_mcg_in
, in
, multicast_gid
);
238 memcpy(gid
, mgid
, sizeof(*mgid
));
239 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));