drivers/infiniband/hw/mthca/mthca_dev.h

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
  33  */
  34
  35 #ifndef MTHCA_DEV_H
  36 #define MTHCA_DEV_H
  37
  38 #include <linux/spinlock.h>
  39 #include <linux/kernel.h>
  40 #include <linux/pci.h>
  41 #include <linux/dma-mapping.h>
  42 #include <asm/semaphore.h>
  43
  44 #include "mthca_provider.h"
  45 #include "mthca_doorbell.h"
  46
  47 #define DRV_NAME        "ib_mthca"
  48 #define PFX             DRV_NAME ": "
  49 #define DRV_VERSION     "0.06-pre"
  50 #define DRV_RELDATE     "November 8, 2004"
  51
  52 /* Types of supported HCA */
  53 enum {
  54         TAVOR,                  /* MT23108                        */
  55         ARBEL_COMPAT,           /* MT25208 in Tavor compat mode   */
  56         ARBEL_NATIVE            /* MT25208 with extended features */
  57 };
  58
  59 enum {
  60         MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
  61         MTHCA_FLAG_SRQ        = 1 << 2,
  62         MTHCA_FLAG_MSI        = 1 << 3,
  63         MTHCA_FLAG_MSI_X      = 1 << 4,
  64         MTHCA_FLAG_NO_LAM     = 1 << 5
  65 };
  66
  67 enum {
  68         MTHCA_MAX_PORTS = 2
  69 };
  70
  71 enum {
  72         MTHCA_EQ_CONTEXT_SIZE =  0x40,
  73         MTHCA_CQ_CONTEXT_SIZE =  0x40,
  74         MTHCA_QP_CONTEXT_SIZE = 0x200,
  75         MTHCA_RDB_ENTRY_SIZE  =  0x20,
  76         MTHCA_AV_SIZE         =  0x20,
  77         MTHCA_MGM_ENTRY_SIZE  =  0x40,
  78
  79         /* Arbel FW gives us these, but we need them for Tavor */
  80         MTHCA_MPT_ENTRY_SIZE  =  0x40,
  81         MTHCA_MTT_SEG_SIZE    =  0x40,
  82 };
  83
  84 enum {
  85         MTHCA_EQ_CMD,
  86         MTHCA_EQ_ASYNC,
  87         MTHCA_EQ_COMP,
  88         MTHCA_NUM_EQ
  89 };
  90
  91 struct mthca_cmd {
  92         int                       use_events;
  93         struct semaphore          hcr_sem;
  94         struct semaphore          poll_sem;
  95         struct semaphore          event_sem;
  96         int                       max_cmds;
  97         spinlock_t                context_lock;
  98         int                       free_head;
  99         struct mthca_cmd_context *context;
 100         u16                       token_mask;
 101 };
 102
 103 struct mthca_limits {
 104         int      num_ports;
 105         int      vl_cap;
 106         int      mtu_cap;
 107         int      gid_table_len;
 108         int      pkey_table_len;
 109         int      local_ca_ack_delay;
 110         int      num_uars;
 111         int      max_sg;
 112         int      num_qps;
 113         int      reserved_qps;
 114         int      num_srqs;
 115         int      reserved_srqs;
 116         int      num_eecs;
 117         int      reserved_eecs;
 118         int      num_cqs;
 119         int      reserved_cqs;
 120         int      num_eqs;
 121         int      reserved_eqs;
 122         int      num_mpts;
 123         int      num_mtt_segs;
 124         int      mtt_seg_size;
 125         int      reserved_mtts;
 126         int      reserved_mrws;
 127         int      reserved_uars;
 128         int      num_mgms;
 129         int      num_amgms;
 130         int      reserved_mcgs;
 131         int      num_pds;
 132         int      reserved_pds;
 133 };
 134
 135 struct mthca_alloc {
 136         u32            last;
 137         u32            top;
 138         u32            max;
 139         u32            mask;
 140         spinlock_t     lock;
 141         unsigned long *table;
 142 };
 143
 144 struct mthca_array {
 145         struct {
 146                 void    **page;
 147                 int       used;
 148         } *page_list;
 149 };
 150
 151 struct mthca_uar_table {
 152         struct mthca_alloc alloc;
 153         u64                uarc_base;
 154         int                uarc_size;
 155 };
 156
 157 struct mthca_pd_table {
 158         struct mthca_alloc alloc;
 159 };
 160
 161 struct mthca_mr_table {
 162         struct mthca_alloc      mpt_alloc;
 163         int                     max_mtt_order;
 164         unsigned long         **mtt_buddy;
 165         u64                     mtt_base;
 166         struct mthca_icm_table *mtt_table;
 167         struct mthca_icm_table *mpt_table;
 168 };
 169
 170 struct mthca_eq_table {
 171         struct mthca_alloc alloc;
 172         void __iomem      *clr_int;
 173         u32                clr_mask;
 174         u32                arm_mask;
 175         struct mthca_eq    eq[MTHCA_NUM_EQ];
 176         u64                icm_virt;
 177         struct page       *icm_page;
 178         dma_addr_t         icm_dma;
 179         int                have_irq;
 180         u8                 inta_pin;
 181 };
 182
 183 struct mthca_cq_table {
 184         struct mthca_alloc      alloc;
 185         spinlock_t              lock;
 186         struct mthca_array      cq;
 187         struct mthca_icm_table *table;
 188 };
 189
 190 struct mthca_qp_table {
 191         struct mthca_alloc      alloc;
 192         u32                     rdb_base;
 193         int                     rdb_shift;
 194         int                     sqp_start;
 195         spinlock_t              lock;
 196         struct mthca_array      qp;
 197         struct mthca_icm_table *qp_table;
 198         struct mthca_icm_table *eqp_table;
 199 };
 200
 201 struct mthca_av_table {
 202         struct pci_pool   *pool;
 203         int                num_ddr_avs;
 204         u64                ddr_av_base;
 205         void __iomem      *av_map;
 206         struct mthca_alloc alloc;
 207 };
 208
 209 struct mthca_mcg_table {
 210         struct semaphore        sem;
 211         struct mthca_alloc      alloc;
 212         struct mthca_icm_table *table;
 213 };
 214
 215 struct mthca_dev {
 216         struct ib_device  ib_dev;
 217         struct pci_dev   *pdev;
 218
 219         int              hca_type;
 220         unsigned long    mthca_flags;
 221         unsigned long    device_cap_flags;
 222
 223         u32              rev_id;
 224
 225         /* firmware info */
 226         u64              fw_ver;
 227         union {
 228                 struct {
 229                         u64 fw_start;
 230                         u64 fw_end;
 231                 }        tavor;
 232                 struct {
 233                         u64 clr_int_base;
 234                         u64 eq_arm_base;
 235                         u64 eq_set_ci_base;
 236                         struct mthca_icm *fw_icm;
 237                         struct mthca_icm *aux_icm;
 238                         u16 fw_pages;
 239                 }        arbel;
 240         }                fw;
 241
 242         u64              ddr_start;
 243         u64              ddr_end;
 244
 245         MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
 246         struct semaphore cap_mask_mutex;
 247
 248         void __iomem    *hcr;
 249         void __iomem    *kar;
 250         void __iomem    *clr_base;
 251         union {
 252                 struct {
 253                         void __iomem *ecr_base;
 254                 } tavor;
 255                 struct {
 256                         void __iomem *eq_arm;
 257                         void __iomem *eq_set_ci_base;
 258                 } arbel;
 259         } eq_regs;
 260
 261         struct mthca_cmd    cmd;
 262         struct mthca_limits limits;
 263
 264         struct mthca_uar_table uar_table;
 265         struct mthca_pd_table  pd_table;
 266         struct mthca_mr_table  mr_table;
 267         struct mthca_eq_table  eq_table;
 268         struct mthca_cq_table  cq_table;
 269         struct mthca_qp_table  qp_table;
 270         struct mthca_av_table  av_table;
 271         struct mthca_mcg_table mcg_table;
 272
 273         struct mthca_uar       driver_uar;
 274         struct mthca_db_table *db_tab;
 275         struct mthca_pd        driver_pd;
 276         struct mthca_mr        driver_mr;
 277
 278         struct ib_mad_agent  *send_agent[MTHCA_MAX_PORTS][2];
 279         struct ib_ah         *sm_ah[MTHCA_MAX_PORTS];
 280         spinlock_t            sm_lock;
 281 };
 282
 283 #define mthca_dbg(mdev, format, arg...) \
 284         dev_dbg(&mdev->pdev->dev, format, ## arg)
 285 #define mthca_err(mdev, format, arg...) \
 286         dev_err(&mdev->pdev->dev, format, ## arg)
 287 #define mthca_info(mdev, format, arg...) \
 288         dev_info(&mdev->pdev->dev, format, ## arg)
 289 #define mthca_warn(mdev, format, arg...) \
 290         dev_warn(&mdev->pdev->dev, format, ## arg)
 291
 292 extern void __buggy_use_of_MTHCA_GET(void);
 293 extern void __buggy_use_of_MTHCA_PUT(void);
 294
 295 #define MTHCA_GET(dest, source, offset)                               \
 296         do {                                                          \
 297                 void *__p = (char *) (source) + (offset);             \
 298                 switch (sizeof (dest)) {                              \
 299                         case 1: (dest) = *(u8 *) __p;       break;    \
 300                         case 2: (dest) = be16_to_cpup(__p); break;    \
 301                         case 4: (dest) = be32_to_cpup(__p); break;    \
 302                         case 8: (dest) = be64_to_cpup(__p); break;    \
 303                         default: __buggy_use_of_MTHCA_GET();          \
 304                 }                                                     \
 305         } while (0)
 306
 307 #define MTHCA_PUT(dest, source, offset)                               \
 308         do {                                                          \
 309                 __typeof__(source) *__p =                             \
 310                         (__typeof__(source) *) ((char *) (dest) + (offset)); \
 311                 switch (sizeof(source)) {                             \
 312                         case 1: *__p = (source);            break;    \
 313                         case 2: *__p = cpu_to_be16(source); break;    \
 314                         case 4: *__p = cpu_to_be32(source); break;    \
 315                         case 8: *__p = cpu_to_be64(source); break;    \
 316                         default: __buggy_use_of_MTHCA_PUT();          \
 317                 }                                                     \
 318         } while (0)
 319
 320 int mthca_reset(struct mthca_dev *mdev);
 321
 322 u32 mthca_alloc(struct mthca_alloc *alloc);
 323 void mthca_free(struct mthca_alloc *alloc, u32 obj);
 324 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
 325                      u32 reserved);
 326 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
 327 void *mthca_array_get(struct mthca_array *array, int index);
 328 int mthca_array_set(struct mthca_array *array, int index, void *value);
 329 void mthca_array_clear(struct mthca_array *array, int index);
 330 int mthca_array_init(struct mthca_array *array, int nent);
 331 void mthca_array_cleanup(struct mthca_array *array, int nent);
 332
 333 int mthca_init_uar_table(struct mthca_dev *dev);
 334 int mthca_init_pd_table(struct mthca_dev *dev);
 335 int mthca_init_mr_table(struct mthca_dev *dev);
 336 int mthca_init_eq_table(struct mthca_dev *dev);
 337 int mthca_init_cq_table(struct mthca_dev *dev);
 338 int mthca_init_qp_table(struct mthca_dev *dev);
 339 int mthca_init_av_table(struct mthca_dev *dev);
 340 int mthca_init_mcg_table(struct mthca_dev *dev);
 341
 342 void mthca_cleanup_uar_table(struct mthca_dev *dev);
 343 void mthca_cleanup_pd_table(struct mthca_dev *dev);
 344 void mthca_cleanup_mr_table(struct mthca_dev *dev);
 345 void mthca_cleanup_eq_table(struct mthca_dev *dev);
 346 void mthca_cleanup_cq_table(struct mthca_dev *dev);
 347 void mthca_cleanup_qp_table(struct mthca_dev *dev);
 348 void mthca_cleanup_av_table(struct mthca_dev *dev);
 349 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
 350
 351 int mthca_register_device(struct mthca_dev *dev);
 352 void mthca_unregister_device(struct mthca_dev *dev);
 353
 354 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
 355 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
 356
 357 int mthca_pd_alloc(struct mthca_dev *dev, struct mthca_pd *pd);
 358 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
 359
 360 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
 361                            u32 access, struct mthca_mr *mr);
 362 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
 363                         u64 *buffer_list, int buffer_size_shift,
 364                         int list_len, u64 iova, u64 total_size,
 365                         u32 access, struct mthca_mr *mr);
 366 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
 367
 368 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
 369 void mthca_unmap_eq_icm(struct mthca_dev *dev);
 370
 371 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
 372                   struct ib_wc *entry);
 373 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
 374 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
 375 int mthca_init_cq(struct mthca_dev *dev, int nent,
 376                   struct mthca_cq *cq);
 377 void mthca_free_cq(struct mthca_dev *dev,
 378                    struct mthca_cq *cq);
 379 void mthca_cq_event(struct mthca_dev *dev, u32 cqn);
 380 void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn);
 381
 382 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
 383                     enum ib_event_type event_type);
 384 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
 385 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 386                           struct ib_send_wr **bad_wr);
 387 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 388                              struct ib_recv_wr **bad_wr);
 389 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 390                           struct ib_send_wr **bad_wr);
 391 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 392                              struct ib_recv_wr **bad_wr);
 393 int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
 394                        int index, int *dbd, u32 *new_wqe);
 395 int mthca_alloc_qp(struct mthca_dev *dev,
 396                    struct mthca_pd *pd,
 397                    struct mthca_cq *send_cq,
 398                    struct mthca_cq *recv_cq,
 399                    enum ib_qp_type type,
 400                    enum ib_sig_type send_policy,
 401                    struct mthca_qp *qp);
 402 int mthca_alloc_sqp(struct mthca_dev *dev,
 403                     struct mthca_pd *pd,
 404                     struct mthca_cq *send_cq,
 405                     struct mthca_cq *recv_cq,
 406                     enum ib_sig_type send_policy,
 407                     int qpn,
 408                     int port,
 409                     struct mthca_sqp *sqp);
 410 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
 411 int mthca_create_ah(struct mthca_dev *dev,
 412                     struct mthca_pd *pd,
 413                     struct ib_ah_attr *ah_attr,
 414                     struct mthca_ah *ah);
 415 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
 416 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
 417                   struct ib_ud_header *header);
 418
 419 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
 420 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
 421
 422 int mthca_process_mad(struct ib_device *ibdev,
 423                       int mad_flags,
 424                       u8 port_num,
 425                       struct ib_wc *in_wc,
 426                       struct ib_grh *in_grh,
 427                       struct ib_mad *in_mad,
 428                       struct ib_mad *out_mad);
 429 int mthca_create_agents(struct mthca_dev *dev);
 430 void mthca_free_agents(struct mthca_dev *dev);
 431
 432 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
 433 {
 434         return container_of(ibdev, struct mthca_dev, ib_dev);
 435 }
 436
 437 #endif /* MTHCA_DEV_H */