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[mirror_ubuntu-artful-kernel.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
1 /* This file is part of the Emulex RoCE Device Driver for
2 * RoCE (RDMA over Converged Ethernet) adapters.
3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
4 * EMULEX and SLI are trademarks of Emulex.
5 * www.emulex.com
6 *
7 * This software is available to you under a choice of one of two licenses.
8 * You may choose to be licensed under the terms of the GNU General Public
9 * License (GPL) Version 2, available from the file COPYING in the main
10 * directory of this source tree, or the BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * - Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * Contact Information:
36 * linux-drivers@emulex.com
37 *
38 * Emulex
39 * 3333 Susan Street
40 * Costa Mesa, CA 92626
41 */
42
43 #include <linux/dma-mapping.h>
44 #include <rdma/ib_verbs.h>
45 #include <rdma/ib_user_verbs.h>
46 #include <rdma/iw_cm.h>
47 #include <rdma/ib_umem.h>
48 #include <rdma/ib_addr.h>
49 #include <rdma/ib_cache.h>
50
51 #include "ocrdma.h"
52 #include "ocrdma_hw.h"
53 #include "ocrdma_verbs.h"
54 #include <rdma/ocrdma-abi.h>
55
56 int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
57 {
58 if (index > 1)
59 return -EINVAL;
60
61 *pkey = 0xffff;
62 return 0;
63 }
64
65 int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
66 int index, union ib_gid *sgid)
67 {
68 int ret;
69 struct ocrdma_dev *dev;
70
71 dev = get_ocrdma_dev(ibdev);
72 memset(sgid, 0, sizeof(*sgid));
73 if (index >= OCRDMA_MAX_SGID)
74 return -EINVAL;
75
76 ret = ib_get_cached_gid(ibdev, port, index, sgid, NULL);
77 if (ret == -EAGAIN) {
78 memcpy(sgid, &zgid, sizeof(*sgid));
79 return 0;
80 }
81
82 return ret;
83 }
84
85 int ocrdma_add_gid(struct ib_device *device,
86 u8 port_num,
87 unsigned int index,
88 const union ib_gid *gid,
89 const struct ib_gid_attr *attr,
90 void **context) {
91 return 0;
92 }
93
94 int ocrdma_del_gid(struct ib_device *device,
95 u8 port_num,
96 unsigned int index,
97 void **context) {
98 return 0;
99 }
100
101 int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr,
102 struct ib_udata *uhw)
103 {
104 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
105
106 if (uhw->inlen || uhw->outlen)
107 return -EINVAL;
108
109 memset(attr, 0, sizeof *attr);
110 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
111 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
112 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
113 attr->max_mr_size = dev->attr.max_mr_size;
114 attr->page_size_cap = 0xffff000;
115 attr->vendor_id = dev->nic_info.pdev->vendor;
116 attr->vendor_part_id = dev->nic_info.pdev->device;
117 attr->hw_ver = dev->asic_id;
118 attr->max_qp = dev->attr.max_qp;
119 attr->max_ah = OCRDMA_MAX_AH;
120 attr->max_qp_wr = dev->attr.max_wqe;
121
122 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
123 IB_DEVICE_RC_RNR_NAK_GEN |
124 IB_DEVICE_SHUTDOWN_PORT |
125 IB_DEVICE_SYS_IMAGE_GUID |
126 IB_DEVICE_LOCAL_DMA_LKEY |
127 IB_DEVICE_MEM_MGT_EXTENSIONS;
128 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_recv_sge);
129 attr->max_sge_rd = dev->attr.max_rdma_sge;
130 attr->max_cq = dev->attr.max_cq;
131 attr->max_cqe = dev->attr.max_cqe;
132 attr->max_mr = dev->attr.max_mr;
133 attr->max_mw = dev->attr.max_mw;
134 attr->max_pd = dev->attr.max_pd;
135 attr->atomic_cap = 0;
136 attr->max_fmr = 0;
137 attr->max_map_per_fmr = 0;
138 attr->max_qp_rd_atom =
139 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
140 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
141 attr->max_srq = dev->attr.max_srq;
142 attr->max_srq_sge = dev->attr.max_srq_sge;
143 attr->max_srq_wr = dev->attr.max_rqe;
144 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
145 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
146 attr->max_pkeys = 1;
147 return 0;
148 }
149
150 struct net_device *ocrdma_get_netdev(struct ib_device *ibdev, u8 port_num)
151 {
152 struct ocrdma_dev *dev;
153 struct net_device *ndev = NULL;
154
155 rcu_read_lock();
156
157 dev = get_ocrdma_dev(ibdev);
158 if (dev)
159 ndev = dev->nic_info.netdev;
160 if (ndev)
161 dev_hold(ndev);
162
163 rcu_read_unlock();
164
165 return ndev;
166 }
167
168 static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
169 u8 *ib_speed, u8 *ib_width)
170 {
171 int status;
172 u8 speed;
173
174 status = ocrdma_mbx_get_link_speed(dev, &speed, NULL);
175 if (status)
176 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
177
178 switch (speed) {
179 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
180 *ib_speed = IB_SPEED_SDR;
181 *ib_width = IB_WIDTH_1X;
182 break;
183
184 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
185 *ib_speed = IB_SPEED_QDR;
186 *ib_width = IB_WIDTH_1X;
187 break;
188
189 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
190 *ib_speed = IB_SPEED_DDR;
191 *ib_width = IB_WIDTH_4X;
192 break;
193
194 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
195 *ib_speed = IB_SPEED_QDR;
196 *ib_width = IB_WIDTH_4X;
197 break;
198
199 default:
200 /* Unsupported */
201 *ib_speed = IB_SPEED_SDR;
202 *ib_width = IB_WIDTH_1X;
203 }
204 }
205
206 int ocrdma_query_port(struct ib_device *ibdev,
207 u8 port, struct ib_port_attr *props)
208 {
209 enum ib_port_state port_state;
210 struct ocrdma_dev *dev;
211 struct net_device *netdev;
212
213 /* props being zeroed by the caller, avoid zeroing it here */
214 dev = get_ocrdma_dev(ibdev);
215 if (port > 1) {
216 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
217 dev->id, port);
218 return -EINVAL;
219 }
220 netdev = dev->nic_info.netdev;
221 if (netif_running(netdev) && netif_oper_up(netdev)) {
222 port_state = IB_PORT_ACTIVE;
223 props->phys_state = 5;
224 } else {
225 port_state = IB_PORT_DOWN;
226 props->phys_state = 3;
227 }
228 props->max_mtu = IB_MTU_4096;
229 props->active_mtu = iboe_get_mtu(netdev->mtu);
230 props->lid = 0;
231 props->lmc = 0;
232 props->sm_lid = 0;
233 props->sm_sl = 0;
234 props->state = port_state;
235 props->port_cap_flags =
236 IB_PORT_CM_SUP |
237 IB_PORT_REINIT_SUP |
238 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP |
239 IB_PORT_IP_BASED_GIDS;
240 props->gid_tbl_len = OCRDMA_MAX_SGID;
241 props->pkey_tbl_len = 1;
242 props->bad_pkey_cntr = 0;
243 props->qkey_viol_cntr = 0;
244 get_link_speed_and_width(dev, &props->active_speed,
245 &props->active_width);
246 props->max_msg_sz = 0x80000000;
247 props->max_vl_num = 4;
248 return 0;
249 }
250
251 int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
252 struct ib_port_modify *props)
253 {
254 struct ocrdma_dev *dev;
255
256 dev = get_ocrdma_dev(ibdev);
257 if (port > 1) {
258 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
259 return -EINVAL;
260 }
261 return 0;
262 }
263
264 static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
265 unsigned long len)
266 {
267 struct ocrdma_mm *mm;
268
269 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
270 if (mm == NULL)
271 return -ENOMEM;
272 mm->key.phy_addr = phy_addr;
273 mm->key.len = len;
274 INIT_LIST_HEAD(&mm->entry);
275
276 mutex_lock(&uctx->mm_list_lock);
277 list_add_tail(&mm->entry, &uctx->mm_head);
278 mutex_unlock(&uctx->mm_list_lock);
279 return 0;
280 }
281
282 static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
283 unsigned long len)
284 {
285 struct ocrdma_mm *mm, *tmp;
286
287 mutex_lock(&uctx->mm_list_lock);
288 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
289 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
290 continue;
291
292 list_del(&mm->entry);
293 kfree(mm);
294 break;
295 }
296 mutex_unlock(&uctx->mm_list_lock);
297 }
298
299 static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
300 unsigned long len)
301 {
302 bool found = false;
303 struct ocrdma_mm *mm;
304
305 mutex_lock(&uctx->mm_list_lock);
306 list_for_each_entry(mm, &uctx->mm_head, entry) {
307 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
308 continue;
309
310 found = true;
311 break;
312 }
313 mutex_unlock(&uctx->mm_list_lock);
314 return found;
315 }
316
317
318 static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
319 {
320 u16 pd_bitmap_idx = 0;
321 const unsigned long *pd_bitmap;
322
323 if (dpp_pool) {
324 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
325 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
326 dev->pd_mgr->max_dpp_pd);
327 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
328 dev->pd_mgr->pd_dpp_count++;
329 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
330 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
331 } else {
332 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
333 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
334 dev->pd_mgr->max_normal_pd);
335 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
336 dev->pd_mgr->pd_norm_count++;
337 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
338 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
339 }
340 return pd_bitmap_idx;
341 }
342
343 static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
344 bool dpp_pool)
345 {
346 u16 pd_count;
347 u16 pd_bit_index;
348
349 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
350 dev->pd_mgr->pd_norm_count;
351 if (pd_count == 0)
352 return -EINVAL;
353
354 if (dpp_pool) {
355 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
356 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
357 return -EINVAL;
358 } else {
359 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
360 dev->pd_mgr->pd_dpp_count--;
361 }
362 } else {
363 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
364 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
365 return -EINVAL;
366 } else {
367 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
368 dev->pd_mgr->pd_norm_count--;
369 }
370 }
371
372 return 0;
373 }
374
375 static int ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
376 bool dpp_pool)
377 {
378 int status;
379
380 mutex_lock(&dev->dev_lock);
381 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
382 mutex_unlock(&dev->dev_lock);
383 return status;
384 }
385
386 static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
387 {
388 u16 pd_idx = 0;
389 int status = 0;
390
391 mutex_lock(&dev->dev_lock);
392 if (pd->dpp_enabled) {
393 /* try allocating DPP PD, if not available then normal PD */
394 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
395 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
396 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
397 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
398 } else if (dev->pd_mgr->pd_norm_count <
399 dev->pd_mgr->max_normal_pd) {
400 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
401 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
402 pd->dpp_enabled = false;
403 } else {
404 status = -EINVAL;
405 }
406 } else {
407 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
408 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
409 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
410 } else {
411 status = -EINVAL;
412 }
413 }
414 mutex_unlock(&dev->dev_lock);
415 return status;
416 }
417
418 static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
419 struct ocrdma_ucontext *uctx,
420 struct ib_udata *udata)
421 {
422 struct ocrdma_pd *pd = NULL;
423 int status;
424
425 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
426 if (!pd)
427 return ERR_PTR(-ENOMEM);
428
429 if (udata && uctx && dev->attr.max_dpp_pds) {
430 pd->dpp_enabled =
431 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
432 pd->num_dpp_qp =
433 pd->dpp_enabled ? (dev->nic_info.db_page_size /
434 dev->attr.wqe_size) : 0;
435 }
436
437 if (dev->pd_mgr->pd_prealloc_valid) {
438 status = ocrdma_get_pd_num(dev, pd);
439 if (status == 0) {
440 return pd;
441 } else {
442 kfree(pd);
443 return ERR_PTR(status);
444 }
445 }
446
447 retry:
448 status = ocrdma_mbx_alloc_pd(dev, pd);
449 if (status) {
450 if (pd->dpp_enabled) {
451 pd->dpp_enabled = false;
452 pd->num_dpp_qp = 0;
453 goto retry;
454 } else {
455 kfree(pd);
456 return ERR_PTR(status);
457 }
458 }
459
460 return pd;
461 }
462
463 static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
464 struct ocrdma_pd *pd)
465 {
466 return (uctx->cntxt_pd == pd ? true : false);
467 }
468
469 static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
470 struct ocrdma_pd *pd)
471 {
472 int status;
473
474 if (dev->pd_mgr->pd_prealloc_valid)
475 status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
476 else
477 status = ocrdma_mbx_dealloc_pd(dev, pd);
478
479 kfree(pd);
480 return status;
481 }
482
483 static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
484 struct ocrdma_ucontext *uctx,
485 struct ib_udata *udata)
486 {
487 int status = 0;
488
489 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
490 if (IS_ERR(uctx->cntxt_pd)) {
491 status = PTR_ERR(uctx->cntxt_pd);
492 uctx->cntxt_pd = NULL;
493 goto err;
494 }
495
496 uctx->cntxt_pd->uctx = uctx;
497 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
498 err:
499 return status;
500 }
501
502 static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
503 {
504 struct ocrdma_pd *pd = uctx->cntxt_pd;
505 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
506
507 if (uctx->pd_in_use) {
508 pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
509 __func__, dev->id, pd->id);
510 }
511 uctx->cntxt_pd = NULL;
512 (void)_ocrdma_dealloc_pd(dev, pd);
513 return 0;
514 }
515
516 static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
517 {
518 struct ocrdma_pd *pd = NULL;
519
520 mutex_lock(&uctx->mm_list_lock);
521 if (!uctx->pd_in_use) {
522 uctx->pd_in_use = true;
523 pd = uctx->cntxt_pd;
524 }
525 mutex_unlock(&uctx->mm_list_lock);
526
527 return pd;
528 }
529
530 static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
531 {
532 mutex_lock(&uctx->mm_list_lock);
533 uctx->pd_in_use = false;
534 mutex_unlock(&uctx->mm_list_lock);
535 }
536
537 struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
538 struct ib_udata *udata)
539 {
540 int status;
541 struct ocrdma_ucontext *ctx;
542 struct ocrdma_alloc_ucontext_resp resp;
543 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
544 struct pci_dev *pdev = dev->nic_info.pdev;
545 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
546
547 if (!udata)
548 return ERR_PTR(-EFAULT);
549 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
550 if (!ctx)
551 return ERR_PTR(-ENOMEM);
552 INIT_LIST_HEAD(&ctx->mm_head);
553 mutex_init(&ctx->mm_list_lock);
554
555 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
556 &ctx->ah_tbl.pa, GFP_KERNEL);
557 if (!ctx->ah_tbl.va) {
558 kfree(ctx);
559 return ERR_PTR(-ENOMEM);
560 }
561 memset(ctx->ah_tbl.va, 0, map_len);
562 ctx->ah_tbl.len = map_len;
563
564 memset(&resp, 0, sizeof(resp));
565 resp.ah_tbl_len = ctx->ah_tbl.len;
566 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
567
568 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
569 if (status)
570 goto map_err;
571
572 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
573 if (status)
574 goto pd_err;
575
576 resp.dev_id = dev->id;
577 resp.max_inline_data = dev->attr.max_inline_data;
578 resp.wqe_size = dev->attr.wqe_size;
579 resp.rqe_size = dev->attr.rqe_size;
580 resp.dpp_wqe_size = dev->attr.wqe_size;
581
582 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
583 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
584 if (status)
585 goto cpy_err;
586 return &ctx->ibucontext;
587
588 cpy_err:
589 pd_err:
590 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
591 map_err:
592 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
593 ctx->ah_tbl.pa);
594 kfree(ctx);
595 return ERR_PTR(status);
596 }
597
598 int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
599 {
600 int status;
601 struct ocrdma_mm *mm, *tmp;
602 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
603 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
604 struct pci_dev *pdev = dev->nic_info.pdev;
605
606 status = ocrdma_dealloc_ucontext_pd(uctx);
607
608 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
609 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
610 uctx->ah_tbl.pa);
611
612 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
613 list_del(&mm->entry);
614 kfree(mm);
615 }
616 kfree(uctx);
617 return status;
618 }
619
620 int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
621 {
622 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
623 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
624 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
625 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
626 unsigned long len = (vma->vm_end - vma->vm_start);
627 int status;
628 bool found;
629
630 if (vma->vm_start & (PAGE_SIZE - 1))
631 return -EINVAL;
632 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
633 if (!found)
634 return -EINVAL;
635
636 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
637 dev->nic_info.db_total_size)) &&
638 (len <= dev->nic_info.db_page_size)) {
639 if (vma->vm_flags & VM_READ)
640 return -EPERM;
641
642 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
643 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
644 len, vma->vm_page_prot);
645 } else if (dev->nic_info.dpp_unmapped_len &&
646 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
647 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
648 dev->nic_info.dpp_unmapped_len)) &&
649 (len <= dev->nic_info.dpp_unmapped_len)) {
650 if (vma->vm_flags & VM_READ)
651 return -EPERM;
652
653 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
654 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
655 len, vma->vm_page_prot);
656 } else {
657 status = remap_pfn_range(vma, vma->vm_start,
658 vma->vm_pgoff, len, vma->vm_page_prot);
659 }
660 return status;
661 }
662
663 static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
664 struct ib_ucontext *ib_ctx,
665 struct ib_udata *udata)
666 {
667 int status;
668 u64 db_page_addr;
669 u64 dpp_page_addr = 0;
670 u32 db_page_size;
671 struct ocrdma_alloc_pd_uresp rsp;
672 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
673
674 memset(&rsp, 0, sizeof(rsp));
675 rsp.id = pd->id;
676 rsp.dpp_enabled = pd->dpp_enabled;
677 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
678 db_page_size = dev->nic_info.db_page_size;
679
680 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
681 if (status)
682 return status;
683
684 if (pd->dpp_enabled) {
685 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
686 (pd->id * PAGE_SIZE);
687 status = ocrdma_add_mmap(uctx, dpp_page_addr,
688 PAGE_SIZE);
689 if (status)
690 goto dpp_map_err;
691 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
692 rsp.dpp_page_addr_lo = dpp_page_addr;
693 }
694
695 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
696 if (status)
697 goto ucopy_err;
698
699 pd->uctx = uctx;
700 return 0;
701
702 ucopy_err:
703 if (pd->dpp_enabled)
704 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
705 dpp_map_err:
706 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
707 return status;
708 }
709
710 struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
711 struct ib_ucontext *context,
712 struct ib_udata *udata)
713 {
714 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
715 struct ocrdma_pd *pd;
716 struct ocrdma_ucontext *uctx = NULL;
717 int status;
718 u8 is_uctx_pd = false;
719
720 if (udata && context) {
721 uctx = get_ocrdma_ucontext(context);
722 pd = ocrdma_get_ucontext_pd(uctx);
723 if (pd) {
724 is_uctx_pd = true;
725 goto pd_mapping;
726 }
727 }
728
729 pd = _ocrdma_alloc_pd(dev, uctx, udata);
730 if (IS_ERR(pd)) {
731 status = PTR_ERR(pd);
732 goto exit;
733 }
734
735 pd_mapping:
736 if (udata && context) {
737 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
738 if (status)
739 goto err;
740 }
741 return &pd->ibpd;
742
743 err:
744 if (is_uctx_pd) {
745 ocrdma_release_ucontext_pd(uctx);
746 } else {
747 status = _ocrdma_dealloc_pd(dev, pd);
748 }
749 exit:
750 return ERR_PTR(status);
751 }
752
753 int ocrdma_dealloc_pd(struct ib_pd *ibpd)
754 {
755 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
756 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
757 struct ocrdma_ucontext *uctx = NULL;
758 int status = 0;
759 u64 usr_db;
760
761 uctx = pd->uctx;
762 if (uctx) {
763 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
764 (pd->id * PAGE_SIZE);
765 if (pd->dpp_enabled)
766 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
767 usr_db = ocrdma_get_db_addr(dev, pd->id);
768 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
769
770 if (is_ucontext_pd(uctx, pd)) {
771 ocrdma_release_ucontext_pd(uctx);
772 return status;
773 }
774 }
775 status = _ocrdma_dealloc_pd(dev, pd);
776 return status;
777 }
778
779 static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
780 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
781 {
782 int status;
783
784 mr->hwmr.fr_mr = 0;
785 mr->hwmr.local_rd = 1;
786 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
787 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
788 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
789 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
790 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
791 mr->hwmr.num_pbls = num_pbls;
792
793 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
794 if (status)
795 return status;
796
797 mr->ibmr.lkey = mr->hwmr.lkey;
798 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
799 mr->ibmr.rkey = mr->hwmr.lkey;
800 return 0;
801 }
802
803 struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
804 {
805 int status;
806 struct ocrdma_mr *mr;
807 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
808 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
809
810 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
811 pr_err("%s err, invalid access rights\n", __func__);
812 return ERR_PTR(-EINVAL);
813 }
814
815 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
816 if (!mr)
817 return ERR_PTR(-ENOMEM);
818
819 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
820 OCRDMA_ADDR_CHECK_DISABLE);
821 if (status) {
822 kfree(mr);
823 return ERR_PTR(status);
824 }
825
826 return &mr->ibmr;
827 }
828
829 static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
830 struct ocrdma_hw_mr *mr)
831 {
832 struct pci_dev *pdev = dev->nic_info.pdev;
833 int i = 0;
834
835 if (mr->pbl_table) {
836 for (i = 0; i < mr->num_pbls; i++) {
837 if (!mr->pbl_table[i].va)
838 continue;
839 dma_free_coherent(&pdev->dev, mr->pbl_size,
840 mr->pbl_table[i].va,
841 mr->pbl_table[i].pa);
842 }
843 kfree(mr->pbl_table);
844 mr->pbl_table = NULL;
845 }
846 }
847
848 static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
849 u32 num_pbes)
850 {
851 u32 num_pbls = 0;
852 u32 idx = 0;
853 int status = 0;
854 u32 pbl_size;
855
856 do {
857 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
858 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
859 status = -EFAULT;
860 break;
861 }
862 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
863 num_pbls = num_pbls / (pbl_size / sizeof(u64));
864 idx++;
865 } while (num_pbls >= dev->attr.max_num_mr_pbl);
866
867 mr->hwmr.num_pbes = num_pbes;
868 mr->hwmr.num_pbls = num_pbls;
869 mr->hwmr.pbl_size = pbl_size;
870 return status;
871 }
872
873 static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
874 {
875 int status = 0;
876 int i;
877 u32 dma_len = mr->pbl_size;
878 struct pci_dev *pdev = dev->nic_info.pdev;
879 void *va;
880 dma_addr_t pa;
881
882 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
883 mr->num_pbls, GFP_KERNEL);
884
885 if (!mr->pbl_table)
886 return -ENOMEM;
887
888 for (i = 0; i < mr->num_pbls; i++) {
889 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
890 if (!va) {
891 ocrdma_free_mr_pbl_tbl(dev, mr);
892 status = -ENOMEM;
893 break;
894 }
895 memset(va, 0, dma_len);
896 mr->pbl_table[i].va = va;
897 mr->pbl_table[i].pa = pa;
898 }
899 return status;
900 }
901
902 static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
903 u32 num_pbes)
904 {
905 struct ocrdma_pbe *pbe;
906 struct scatterlist *sg;
907 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
908 struct ib_umem *umem = mr->umem;
909 int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0;
910
911 if (!mr->hwmr.num_pbes)
912 return;
913
914 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
915 pbe_cnt = 0;
916
917 shift = umem->page_shift;
918
919 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
920 pages = sg_dma_len(sg) >> shift;
921 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
922 /* store the page address in pbe */
923 pbe->pa_lo =
924 cpu_to_le32(sg_dma_address(sg) +
925 (pg_cnt << shift));
926 pbe->pa_hi =
927 cpu_to_le32(upper_32_bits(sg_dma_address(sg) +
928 (pg_cnt << shift)));
929 pbe_cnt += 1;
930 total_num_pbes += 1;
931 pbe++;
932
933 /* if done building pbes, issue the mbx cmd. */
934 if (total_num_pbes == num_pbes)
935 return;
936
937 /* if the given pbl is full storing the pbes,
938 * move to next pbl.
939 */
940 if (pbe_cnt ==
941 (mr->hwmr.pbl_size / sizeof(u64))) {
942 pbl_tbl++;
943 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
944 pbe_cnt = 0;
945 }
946
947 }
948 }
949 }
950
951 struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
952 u64 usr_addr, int acc, struct ib_udata *udata)
953 {
954 int status = -ENOMEM;
955 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
956 struct ocrdma_mr *mr;
957 struct ocrdma_pd *pd;
958 u32 num_pbes;
959
960 pd = get_ocrdma_pd(ibpd);
961
962 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
963 return ERR_PTR(-EINVAL);
964
965 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
966 if (!mr)
967 return ERR_PTR(status);
968 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
969 if (IS_ERR(mr->umem)) {
970 status = -EFAULT;
971 goto umem_err;
972 }
973 num_pbes = ib_umem_page_count(mr->umem);
974 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
975 if (status)
976 goto umem_err;
977
978 mr->hwmr.pbe_size = BIT(mr->umem->page_shift);
979 mr->hwmr.fbo = ib_umem_offset(mr->umem);
980 mr->hwmr.va = usr_addr;
981 mr->hwmr.len = len;
982 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
983 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
984 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
985 mr->hwmr.local_rd = 1;
986 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
987 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
988 if (status)
989 goto umem_err;
990 build_user_pbes(dev, mr, num_pbes);
991 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
992 if (status)
993 goto mbx_err;
994 mr->ibmr.lkey = mr->hwmr.lkey;
995 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
996 mr->ibmr.rkey = mr->hwmr.lkey;
997
998 return &mr->ibmr;
999
1000 mbx_err:
1001 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
1002 umem_err:
1003 kfree(mr);
1004 return ERR_PTR(status);
1005 }
1006
1007 int ocrdma_dereg_mr(struct ib_mr *ib_mr)
1008 {
1009 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1010 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
1011
1012 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
1013
1014 kfree(mr->pages);
1015 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
1016
1017 /* it could be user registered memory. */
1018 if (mr->umem)
1019 ib_umem_release(mr->umem);
1020 kfree(mr);
1021
1022 /* Don't stop cleanup, in case FW is unresponsive */
1023 if (dev->mqe_ctx.fw_error_state) {
1024 pr_err("%s(%d) fw not responding.\n",
1025 __func__, dev->id);
1026 }
1027 return 0;
1028 }
1029
1030 static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
1031 struct ib_udata *udata,
1032 struct ib_ucontext *ib_ctx)
1033 {
1034 int status;
1035 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
1036 struct ocrdma_create_cq_uresp uresp;
1037
1038 memset(&uresp, 0, sizeof(uresp));
1039 uresp.cq_id = cq->id;
1040 uresp.page_size = PAGE_ALIGN(cq->len);
1041 uresp.num_pages = 1;
1042 uresp.max_hw_cqe = cq->max_hw_cqe;
1043 uresp.page_addr[0] = virt_to_phys(cq->va);
1044 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1045 uresp.db_page_size = dev->nic_info.db_page_size;
1046 uresp.phase_change = cq->phase_change ? 1 : 0;
1047 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1048 if (status) {
1049 pr_err("%s(%d) copy error cqid=0x%x.\n",
1050 __func__, dev->id, cq->id);
1051 goto err;
1052 }
1053 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
1054 if (status)
1055 goto err;
1056 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
1057 if (status) {
1058 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
1059 goto err;
1060 }
1061 cq->ucontext = uctx;
1062 err:
1063 return status;
1064 }
1065
1066 struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev,
1067 const struct ib_cq_init_attr *attr,
1068 struct ib_ucontext *ib_ctx,
1069 struct ib_udata *udata)
1070 {
1071 int entries = attr->cqe;
1072 struct ocrdma_cq *cq;
1073 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
1074 struct ocrdma_ucontext *uctx = NULL;
1075 u16 pd_id = 0;
1076 int status;
1077 struct ocrdma_create_cq_ureq ureq;
1078
1079 if (attr->flags)
1080 return ERR_PTR(-EINVAL);
1081
1082 if (udata) {
1083 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1084 return ERR_PTR(-EFAULT);
1085 } else
1086 ureq.dpp_cq = 0;
1087 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
1088 if (!cq)
1089 return ERR_PTR(-ENOMEM);
1090
1091 spin_lock_init(&cq->cq_lock);
1092 spin_lock_init(&cq->comp_handler_lock);
1093 INIT_LIST_HEAD(&cq->sq_head);
1094 INIT_LIST_HEAD(&cq->rq_head);
1095
1096 if (ib_ctx) {
1097 uctx = get_ocrdma_ucontext(ib_ctx);
1098 pd_id = uctx->cntxt_pd->id;
1099 }
1100
1101 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
1102 if (status) {
1103 kfree(cq);
1104 return ERR_PTR(status);
1105 }
1106 if (ib_ctx) {
1107 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
1108 if (status)
1109 goto ctx_err;
1110 }
1111 cq->phase = OCRDMA_CQE_VALID;
1112 dev->cq_tbl[cq->id] = cq;
1113 return &cq->ibcq;
1114
1115 ctx_err:
1116 ocrdma_mbx_destroy_cq(dev, cq);
1117 kfree(cq);
1118 return ERR_PTR(status);
1119 }
1120
1121 int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
1122 struct ib_udata *udata)
1123 {
1124 int status = 0;
1125 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1126
1127 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
1128 status = -EINVAL;
1129 return status;
1130 }
1131 ibcq->cqe = new_cnt;
1132 return status;
1133 }
1134
1135 static void ocrdma_flush_cq(struct ocrdma_cq *cq)
1136 {
1137 int cqe_cnt;
1138 int valid_count = 0;
1139 unsigned long flags;
1140
1141 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
1142 struct ocrdma_cqe *cqe = NULL;
1143
1144 cqe = cq->va;
1145 cqe_cnt = cq->cqe_cnt;
1146
1147 /* Last irq might have scheduled a polling thread
1148 * sync-up with it before hard flushing.
1149 */
1150 spin_lock_irqsave(&cq->cq_lock, flags);
1151 while (cqe_cnt) {
1152 if (is_cqe_valid(cq, cqe))
1153 valid_count++;
1154 cqe++;
1155 cqe_cnt--;
1156 }
1157 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
1158 spin_unlock_irqrestore(&cq->cq_lock, flags);
1159 }
1160
1161 int ocrdma_destroy_cq(struct ib_cq *ibcq)
1162 {
1163 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1164 struct ocrdma_eq *eq = NULL;
1165 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
1166 int pdid = 0;
1167 u32 irq, indx;
1168
1169 dev->cq_tbl[cq->id] = NULL;
1170 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
1171 BUG_ON(indx == -EINVAL);
1172
1173 eq = &dev->eq_tbl[indx];
1174 irq = ocrdma_get_irq(dev, eq);
1175 synchronize_irq(irq);
1176 ocrdma_flush_cq(cq);
1177
1178 (void)ocrdma_mbx_destroy_cq(dev, cq);
1179 if (cq->ucontext) {
1180 pdid = cq->ucontext->cntxt_pd->id;
1181 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1182 PAGE_ALIGN(cq->len));
1183 ocrdma_del_mmap(cq->ucontext,
1184 ocrdma_get_db_addr(dev, pdid),
1185 dev->nic_info.db_page_size);
1186 }
1187
1188 kfree(cq);
1189 return 0;
1190 }
1191
1192 static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1193 {
1194 int status = -EINVAL;
1195
1196 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1197 dev->qp_tbl[qp->id] = qp;
1198 status = 0;
1199 }
1200 return status;
1201 }
1202
1203 static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1204 {
1205 dev->qp_tbl[qp->id] = NULL;
1206 }
1207
1208 static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1209 struct ib_qp_init_attr *attrs)
1210 {
1211 if ((attrs->qp_type != IB_QPT_GSI) &&
1212 (attrs->qp_type != IB_QPT_RC) &&
1213 (attrs->qp_type != IB_QPT_UC) &&
1214 (attrs->qp_type != IB_QPT_UD)) {
1215 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1216 __func__, dev->id, attrs->qp_type);
1217 return -EINVAL;
1218 }
1219 /* Skip the check for QP1 to support CM size of 128 */
1220 if ((attrs->qp_type != IB_QPT_GSI) &&
1221 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
1222 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1223 __func__, dev->id, attrs->cap.max_send_wr);
1224 pr_err("%s(%d) supported send_wr=0x%x\n",
1225 __func__, dev->id, dev->attr.max_wqe);
1226 return -EINVAL;
1227 }
1228 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
1229 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1230 __func__, dev->id, attrs->cap.max_recv_wr);
1231 pr_err("%s(%d) supported recv_wr=0x%x\n",
1232 __func__, dev->id, dev->attr.max_rqe);
1233 return -EINVAL;
1234 }
1235 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
1236 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1237 __func__, dev->id, attrs->cap.max_inline_data);
1238 pr_err("%s(%d) supported inline data size=0x%x\n",
1239 __func__, dev->id, dev->attr.max_inline_data);
1240 return -EINVAL;
1241 }
1242 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
1243 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1244 __func__, dev->id, attrs->cap.max_send_sge);
1245 pr_err("%s(%d) supported send_sge=0x%x\n",
1246 __func__, dev->id, dev->attr.max_send_sge);
1247 return -EINVAL;
1248 }
1249 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
1250 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1251 __func__, dev->id, attrs->cap.max_recv_sge);
1252 pr_err("%s(%d) supported recv_sge=0x%x\n",
1253 __func__, dev->id, dev->attr.max_recv_sge);
1254 return -EINVAL;
1255 }
1256 /* unprivileged user space cannot create special QP */
1257 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
1258 pr_err
1259 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1260 __func__, dev->id, attrs->qp_type);
1261 return -EINVAL;
1262 }
1263 /* allow creating only one GSI type of QP */
1264 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
1265 pr_err("%s(%d) GSI special QPs already created.\n",
1266 __func__, dev->id);
1267 return -EINVAL;
1268 }
1269 /* verify consumer QPs are not trying to use GSI QP's CQ */
1270 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1271 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
1272 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
1273 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
1274 __func__, dev->id);
1275 return -EINVAL;
1276 }
1277 }
1278 return 0;
1279 }
1280
1281 static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1282 struct ib_udata *udata, int dpp_offset,
1283 int dpp_credit_lmt, int srq)
1284 {
1285 int status;
1286 u64 usr_db;
1287 struct ocrdma_create_qp_uresp uresp;
1288 struct ocrdma_pd *pd = qp->pd;
1289 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
1290
1291 memset(&uresp, 0, sizeof(uresp));
1292 usr_db = dev->nic_info.unmapped_db +
1293 (pd->id * dev->nic_info.db_page_size);
1294 uresp.qp_id = qp->id;
1295 uresp.sq_dbid = qp->sq.dbid;
1296 uresp.num_sq_pages = 1;
1297 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
1298 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
1299 uresp.num_wqe_allocated = qp->sq.max_cnt;
1300 if (!srq) {
1301 uresp.rq_dbid = qp->rq.dbid;
1302 uresp.num_rq_pages = 1;
1303 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
1304 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
1305 uresp.num_rqe_allocated = qp->rq.max_cnt;
1306 }
1307 uresp.db_page_addr = usr_db;
1308 uresp.db_page_size = dev->nic_info.db_page_size;
1309 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1310 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1311 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
1312
1313 if (qp->dpp_enabled) {
1314 uresp.dpp_credit = dpp_credit_lmt;
1315 uresp.dpp_offset = dpp_offset;
1316 }
1317 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1318 if (status) {
1319 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
1320 goto err;
1321 }
1322 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1323 uresp.sq_page_size);
1324 if (status)
1325 goto err;
1326
1327 if (!srq) {
1328 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1329 uresp.rq_page_size);
1330 if (status)
1331 goto rq_map_err;
1332 }
1333 return status;
1334 rq_map_err:
1335 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1336 err:
1337 return status;
1338 }
1339
1340 static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1341 struct ocrdma_pd *pd)
1342 {
1343 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1344 qp->sq_db = dev->nic_info.db +
1345 (pd->id * dev->nic_info.db_page_size) +
1346 OCRDMA_DB_GEN2_SQ_OFFSET;
1347 qp->rq_db = dev->nic_info.db +
1348 (pd->id * dev->nic_info.db_page_size) +
1349 OCRDMA_DB_GEN2_RQ_OFFSET;
1350 } else {
1351 qp->sq_db = dev->nic_info.db +
1352 (pd->id * dev->nic_info.db_page_size) +
1353 OCRDMA_DB_SQ_OFFSET;
1354 qp->rq_db = dev->nic_info.db +
1355 (pd->id * dev->nic_info.db_page_size) +
1356 OCRDMA_DB_RQ_OFFSET;
1357 }
1358 }
1359
1360 static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1361 {
1362 qp->wqe_wr_id_tbl =
1363 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1364 GFP_KERNEL);
1365 if (qp->wqe_wr_id_tbl == NULL)
1366 return -ENOMEM;
1367 qp->rqe_wr_id_tbl =
1368 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1369 if (qp->rqe_wr_id_tbl == NULL)
1370 return -ENOMEM;
1371
1372 return 0;
1373 }
1374
1375 static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1376 struct ocrdma_pd *pd,
1377 struct ib_qp_init_attr *attrs)
1378 {
1379 qp->pd = pd;
1380 spin_lock_init(&qp->q_lock);
1381 INIT_LIST_HEAD(&qp->sq_entry);
1382 INIT_LIST_HEAD(&qp->rq_entry);
1383
1384 qp->qp_type = attrs->qp_type;
1385 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1386 qp->max_inline_data = attrs->cap.max_inline_data;
1387 qp->sq.max_sges = attrs->cap.max_send_sge;
1388 qp->rq.max_sges = attrs->cap.max_recv_sge;
1389 qp->state = OCRDMA_QPS_RST;
1390 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
1391 }
1392
1393 static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1394 struct ib_qp_init_attr *attrs)
1395 {
1396 if (attrs->qp_type == IB_QPT_GSI) {
1397 dev->gsi_qp_created = 1;
1398 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1399 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1400 }
1401 }
1402
1403 struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1404 struct ib_qp_init_attr *attrs,
1405 struct ib_udata *udata)
1406 {
1407 int status;
1408 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1409 struct ocrdma_qp *qp;
1410 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1411 struct ocrdma_create_qp_ureq ureq;
1412 u16 dpp_credit_lmt, dpp_offset;
1413
1414 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1415 if (status)
1416 goto gen_err;
1417
1418 memset(&ureq, 0, sizeof(ureq));
1419 if (udata) {
1420 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1421 return ERR_PTR(-EFAULT);
1422 }
1423 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1424 if (!qp) {
1425 status = -ENOMEM;
1426 goto gen_err;
1427 }
1428 ocrdma_set_qp_init_params(qp, pd, attrs);
1429 if (udata == NULL)
1430 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1431 OCRDMA_QP_FAST_REG);
1432
1433 mutex_lock(&dev->dev_lock);
1434 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1435 ureq.dpp_cq_id,
1436 &dpp_offset, &dpp_credit_lmt);
1437 if (status)
1438 goto mbx_err;
1439
1440 /* user space QP's wr_id table are managed in library */
1441 if (udata == NULL) {
1442 status = ocrdma_alloc_wr_id_tbl(qp);
1443 if (status)
1444 goto map_err;
1445 }
1446
1447 status = ocrdma_add_qpn_map(dev, qp);
1448 if (status)
1449 goto map_err;
1450 ocrdma_set_qp_db(dev, qp, pd);
1451 if (udata) {
1452 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1453 dpp_credit_lmt,
1454 (attrs->srq != NULL));
1455 if (status)
1456 goto cpy_err;
1457 }
1458 ocrdma_store_gsi_qp_cq(dev, attrs);
1459 qp->ibqp.qp_num = qp->id;
1460 mutex_unlock(&dev->dev_lock);
1461 return &qp->ibqp;
1462
1463 cpy_err:
1464 ocrdma_del_qpn_map(dev, qp);
1465 map_err:
1466 ocrdma_mbx_destroy_qp(dev, qp);
1467 mbx_err:
1468 mutex_unlock(&dev->dev_lock);
1469 kfree(qp->wqe_wr_id_tbl);
1470 kfree(qp->rqe_wr_id_tbl);
1471 kfree(qp);
1472 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
1473 gen_err:
1474 return ERR_PTR(status);
1475 }
1476
1477 int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1478 int attr_mask)
1479 {
1480 int status = 0;
1481 struct ocrdma_qp *qp;
1482 struct ocrdma_dev *dev;
1483 enum ib_qp_state old_qps;
1484
1485 qp = get_ocrdma_qp(ibqp);
1486 dev = get_ocrdma_dev(ibqp->device);
1487 if (attr_mask & IB_QP_STATE)
1488 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
1489 /* if new and previous states are same hw doesn't need to
1490 * know about it.
1491 */
1492 if (status < 0)
1493 return status;
1494 return ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
1495 }
1496
1497 int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1498 int attr_mask, struct ib_udata *udata)
1499 {
1500 unsigned long flags;
1501 int status = -EINVAL;
1502 struct ocrdma_qp *qp;
1503 struct ocrdma_dev *dev;
1504 enum ib_qp_state old_qps, new_qps;
1505
1506 qp = get_ocrdma_qp(ibqp);
1507 dev = get_ocrdma_dev(ibqp->device);
1508
1509 /* syncronize with multiple context trying to change, retrive qps */
1510 mutex_lock(&dev->dev_lock);
1511 /* syncronize with wqe, rqe posting and cqe processing contexts */
1512 spin_lock_irqsave(&qp->q_lock, flags);
1513 old_qps = get_ibqp_state(qp->state);
1514 if (attr_mask & IB_QP_STATE)
1515 new_qps = attr->qp_state;
1516 else
1517 new_qps = old_qps;
1518 spin_unlock_irqrestore(&qp->q_lock, flags);
1519
1520 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
1521 IB_LINK_LAYER_ETHERNET)) {
1522 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1523 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1524 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1525 old_qps, new_qps);
1526 goto param_err;
1527 }
1528
1529 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1530 if (status > 0)
1531 status = 0;
1532 param_err:
1533 mutex_unlock(&dev->dev_lock);
1534 return status;
1535 }
1536
1537 static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1538 {
1539 switch (mtu) {
1540 case 256:
1541 return IB_MTU_256;
1542 case 512:
1543 return IB_MTU_512;
1544 case 1024:
1545 return IB_MTU_1024;
1546 case 2048:
1547 return IB_MTU_2048;
1548 case 4096:
1549 return IB_MTU_4096;
1550 default:
1551 return IB_MTU_1024;
1552 }
1553 }
1554
1555 static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1556 {
1557 int ib_qp_acc_flags = 0;
1558
1559 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1560 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1561 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1562 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1563 return ib_qp_acc_flags;
1564 }
1565
1566 int ocrdma_query_qp(struct ib_qp *ibqp,
1567 struct ib_qp_attr *qp_attr,
1568 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1569 {
1570 int status;
1571 u32 qp_state;
1572 struct ocrdma_qp_params params;
1573 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1574 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
1575
1576 memset(&params, 0, sizeof(params));
1577 mutex_lock(&dev->dev_lock);
1578 status = ocrdma_mbx_query_qp(dev, qp, &params);
1579 mutex_unlock(&dev->dev_lock);
1580 if (status)
1581 goto mbx_err;
1582 if (qp->qp_type == IB_QPT_UD)
1583 qp_attr->qkey = params.qkey;
1584 qp_attr->path_mtu =
1585 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1586 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1587 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1588 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1589 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1590 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1591 qp_attr->dest_qp_num =
1592 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1593
1594 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1595 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1596 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1597 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1598 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
1599 qp_attr->cap.max_inline_data = qp->max_inline_data;
1600 qp_init_attr->cap = qp_attr->cap;
1601 qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE;
1602
1603 rdma_ah_set_grh(&qp_attr->ah_attr, NULL,
1604 params.rnt_rc_sl_fl &
1605 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK,
1606 qp->sgid_idx,
1607 (params.hop_lmt_rq_psn &
1608 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1609 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT,
1610 (params.tclass_sq_psn &
1611 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
1612 OCRDMA_QP_PARAMS_TCLASS_SHIFT);
1613 rdma_ah_set_dgid_raw(&qp_attr->ah_attr, &params.dgid[0]);
1614
1615 rdma_ah_set_port_num(&qp_attr->ah_attr, 1);
1616 rdma_ah_set_sl(&qp_attr->ah_attr, (params.rnt_rc_sl_fl &
1617 OCRDMA_QP_PARAMS_SL_MASK) >>
1618 OCRDMA_QP_PARAMS_SL_SHIFT);
1619 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1620 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1621 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1622 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1623 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1624 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1625 qp_attr->retry_cnt =
1626 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1627 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1628 qp_attr->min_rnr_timer = 0;
1629 qp_attr->pkey_index = 0;
1630 qp_attr->port_num = 1;
1631 rdma_ah_set_path_bits(&qp_attr->ah_attr, 0);
1632 rdma_ah_set_static_rate(&qp_attr->ah_attr, 0);
1633 qp_attr->alt_pkey_index = 0;
1634 qp_attr->alt_port_num = 0;
1635 qp_attr->alt_timeout = 0;
1636 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1637 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1638 OCRDMA_QP_PARAMS_STATE_SHIFT;
1639 qp_attr->qp_state = get_ibqp_state(qp_state);
1640 qp_attr->cur_qp_state = qp_attr->qp_state;
1641 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1642 qp_attr->max_dest_rd_atomic =
1643 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1644 qp_attr->max_rd_atomic =
1645 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1646 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1647 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1648 /* Sync driver QP state with FW */
1649 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
1650 mbx_err:
1651 return status;
1652 }
1653
1654 static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx)
1655 {
1656 unsigned int i = idx / 32;
1657 u32 mask = (1U << (idx % 32));
1658
1659 srq->idx_bit_fields[i] ^= mask;
1660 }
1661
1662 static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1663 {
1664 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
1665 }
1666
1667 static int is_hw_sq_empty(struct ocrdma_qp *qp)
1668 {
1669 return (qp->sq.tail == qp->sq.head);
1670 }
1671
1672 static int is_hw_rq_empty(struct ocrdma_qp *qp)
1673 {
1674 return (qp->rq.tail == qp->rq.head);
1675 }
1676
1677 static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1678 {
1679 return q->va + (q->head * q->entry_size);
1680 }
1681
1682 static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1683 u32 idx)
1684 {
1685 return q->va + (idx * q->entry_size);
1686 }
1687
1688 static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1689 {
1690 q->head = (q->head + 1) & q->max_wqe_idx;
1691 }
1692
1693 static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1694 {
1695 q->tail = (q->tail + 1) & q->max_wqe_idx;
1696 }
1697
1698 /* discard the cqe for a given QP */
1699 static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1700 {
1701 unsigned long cq_flags;
1702 unsigned long flags;
1703 int discard_cnt = 0;
1704 u32 cur_getp, stop_getp;
1705 struct ocrdma_cqe *cqe;
1706 u32 qpn = 0, wqe_idx = 0;
1707
1708 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1709
1710 /* traverse through the CQEs in the hw CQ,
1711 * find the matching CQE for a given qp,
1712 * mark the matching one discarded by clearing qpn.
1713 * ring the doorbell in the poll_cq() as
1714 * we don't complete out of order cqe.
1715 */
1716
1717 cur_getp = cq->getp;
1718 /* find upto when do we reap the cq. */
1719 stop_getp = cur_getp;
1720 do {
1721 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1722 break;
1723
1724 cqe = cq->va + cur_getp;
1725 /* if (a) done reaping whole hw cq, or
1726 * (b) qp_xq becomes empty.
1727 * then exit
1728 */
1729 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1730 /* if previously discarded cqe found, skip that too. */
1731 /* check for matching qp */
1732 if (qpn == 0 || qpn != qp->id)
1733 goto skip_cqe;
1734
1735 if (is_cqe_for_sq(cqe)) {
1736 ocrdma_hwq_inc_tail(&qp->sq);
1737 } else {
1738 if (qp->srq) {
1739 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
1740 OCRDMA_CQE_BUFTAG_SHIFT) &
1741 qp->srq->rq.max_wqe_idx;
1742 BUG_ON(wqe_idx < 1);
1743 spin_lock_irqsave(&qp->srq->q_lock, flags);
1744 ocrdma_hwq_inc_tail(&qp->srq->rq);
1745 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
1746 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1747
1748 } else {
1749 ocrdma_hwq_inc_tail(&qp->rq);
1750 }
1751 }
1752 /* mark cqe discarded so that it is not picked up later
1753 * in the poll_cq().
1754 */
1755 discard_cnt += 1;
1756 cqe->cmn.qpn = 0;
1757 skip_cqe:
1758 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1759 } while (cur_getp != stop_getp);
1760 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1761 }
1762
1763 void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
1764 {
1765 int found = false;
1766 unsigned long flags;
1767 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
1768 /* sync with any active CQ poll */
1769
1770 spin_lock_irqsave(&dev->flush_q_lock, flags);
1771 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1772 if (found)
1773 list_del(&qp->sq_entry);
1774 if (!qp->srq) {
1775 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1776 if (found)
1777 list_del(&qp->rq_entry);
1778 }
1779 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1780 }
1781
1782 int ocrdma_destroy_qp(struct ib_qp *ibqp)
1783 {
1784 struct ocrdma_pd *pd;
1785 struct ocrdma_qp *qp;
1786 struct ocrdma_dev *dev;
1787 struct ib_qp_attr attrs;
1788 int attr_mask;
1789 unsigned long flags;
1790
1791 qp = get_ocrdma_qp(ibqp);
1792 dev = get_ocrdma_dev(ibqp->device);
1793
1794 pd = qp->pd;
1795
1796 /* change the QP state to ERROR */
1797 if (qp->state != OCRDMA_QPS_RST) {
1798 attrs.qp_state = IB_QPS_ERR;
1799 attr_mask = IB_QP_STATE;
1800 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1801 }
1802 /* ensure that CQEs for newly created QP (whose id may be same with
1803 * one which just getting destroyed are same), dont get
1804 * discarded until the old CQEs are discarded.
1805 */
1806 mutex_lock(&dev->dev_lock);
1807 (void) ocrdma_mbx_destroy_qp(dev, qp);
1808
1809 /*
1810 * acquire CQ lock while destroy is in progress, in order to
1811 * protect against proessing in-flight CQEs for this QP.
1812 */
1813 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
1814 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1815 spin_lock(&qp->rq_cq->cq_lock);
1816
1817 ocrdma_del_qpn_map(dev, qp);
1818
1819 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1820 spin_unlock(&qp->rq_cq->cq_lock);
1821 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
1822
1823 if (!pd->uctx) {
1824 ocrdma_discard_cqes(qp, qp->sq_cq);
1825 ocrdma_discard_cqes(qp, qp->rq_cq);
1826 }
1827 mutex_unlock(&dev->dev_lock);
1828
1829 if (pd->uctx) {
1830 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1831 PAGE_ALIGN(qp->sq.len));
1832 if (!qp->srq)
1833 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1834 PAGE_ALIGN(qp->rq.len));
1835 }
1836
1837 ocrdma_del_flush_qp(qp);
1838
1839 kfree(qp->wqe_wr_id_tbl);
1840 kfree(qp->rqe_wr_id_tbl);
1841 kfree(qp);
1842 return 0;
1843 }
1844
1845 static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1846 struct ib_udata *udata)
1847 {
1848 int status;
1849 struct ocrdma_create_srq_uresp uresp;
1850
1851 memset(&uresp, 0, sizeof(uresp));
1852 uresp.rq_dbid = srq->rq.dbid;
1853 uresp.num_rq_pages = 1;
1854 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
1855 uresp.rq_page_size = srq->rq.len;
1856 uresp.db_page_addr = dev->nic_info.unmapped_db +
1857 (srq->pd->id * dev->nic_info.db_page_size);
1858 uresp.db_page_size = dev->nic_info.db_page_size;
1859 uresp.num_rqe_allocated = srq->rq.max_cnt;
1860 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1861 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1862 uresp.db_shift = 24;
1863 } else {
1864 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1865 uresp.db_shift = 16;
1866 }
1867
1868 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1869 if (status)
1870 return status;
1871 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1872 uresp.rq_page_size);
1873 if (status)
1874 return status;
1875 return status;
1876 }
1877
1878 struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1879 struct ib_srq_init_attr *init_attr,
1880 struct ib_udata *udata)
1881 {
1882 int status = -ENOMEM;
1883 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1884 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1885 struct ocrdma_srq *srq;
1886
1887 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1888 return ERR_PTR(-EINVAL);
1889 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1890 return ERR_PTR(-EINVAL);
1891
1892 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1893 if (!srq)
1894 return ERR_PTR(status);
1895
1896 spin_lock_init(&srq->q_lock);
1897 srq->pd = pd;
1898 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1899 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
1900 if (status)
1901 goto err;
1902
1903 if (udata == NULL) {
1904 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1905 GFP_KERNEL);
1906 if (srq->rqe_wr_id_tbl == NULL)
1907 goto arm_err;
1908
1909 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1910 (srq->rq.max_cnt % 32 ? 1 : 0);
1911 srq->idx_bit_fields =
1912 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1913 if (srq->idx_bit_fields == NULL)
1914 goto arm_err;
1915 memset(srq->idx_bit_fields, 0xff,
1916 srq->bit_fields_len * sizeof(u32));
1917 }
1918
1919 if (init_attr->attr.srq_limit) {
1920 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1921 if (status)
1922 goto arm_err;
1923 }
1924
1925 if (udata) {
1926 status = ocrdma_copy_srq_uresp(dev, srq, udata);
1927 if (status)
1928 goto arm_err;
1929 }
1930
1931 return &srq->ibsrq;
1932
1933 arm_err:
1934 ocrdma_mbx_destroy_srq(dev, srq);
1935 err:
1936 kfree(srq->rqe_wr_id_tbl);
1937 kfree(srq->idx_bit_fields);
1938 kfree(srq);
1939 return ERR_PTR(status);
1940 }
1941
1942 int ocrdma_modify_srq(struct ib_srq *ibsrq,
1943 struct ib_srq_attr *srq_attr,
1944 enum ib_srq_attr_mask srq_attr_mask,
1945 struct ib_udata *udata)
1946 {
1947 int status;
1948 struct ocrdma_srq *srq;
1949
1950 srq = get_ocrdma_srq(ibsrq);
1951 if (srq_attr_mask & IB_SRQ_MAX_WR)
1952 status = -EINVAL;
1953 else
1954 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1955 return status;
1956 }
1957
1958 int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1959 {
1960 int status;
1961 struct ocrdma_srq *srq;
1962
1963 srq = get_ocrdma_srq(ibsrq);
1964 status = ocrdma_mbx_query_srq(srq, srq_attr);
1965 return status;
1966 }
1967
1968 int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1969 {
1970 int status;
1971 struct ocrdma_srq *srq;
1972 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
1973
1974 srq = get_ocrdma_srq(ibsrq);
1975
1976 status = ocrdma_mbx_destroy_srq(dev, srq);
1977
1978 if (srq->pd->uctx)
1979 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1980 PAGE_ALIGN(srq->rq.len));
1981
1982 kfree(srq->idx_bit_fields);
1983 kfree(srq->rqe_wr_id_tbl);
1984 kfree(srq);
1985 return status;
1986 }
1987
1988 /* unprivileged verbs and their support functions. */
1989 static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1990 struct ocrdma_hdr_wqe *hdr,
1991 struct ib_send_wr *wr)
1992 {
1993 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1994 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
1995 struct ocrdma_ah *ah = get_ocrdma_ah(ud_wr(wr)->ah);
1996
1997 ud_hdr->rsvd_dest_qpn = ud_wr(wr)->remote_qpn;
1998 if (qp->qp_type == IB_QPT_GSI)
1999 ud_hdr->qkey = qp->qkey;
2000 else
2001 ud_hdr->qkey = ud_wr(wr)->remote_qkey;
2002 ud_hdr->rsvd_ahid = ah->id;
2003 ud_hdr->hdr_type = ah->hdr_type;
2004 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
2005 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
2006 }
2007
2008 static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
2009 struct ocrdma_sge *sge, int num_sge,
2010 struct ib_sge *sg_list)
2011 {
2012 int i;
2013
2014 for (i = 0; i < num_sge; i++) {
2015 sge[i].lrkey = sg_list[i].lkey;
2016 sge[i].addr_lo = sg_list[i].addr;
2017 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
2018 sge[i].len = sg_list[i].length;
2019 hdr->total_len += sg_list[i].length;
2020 }
2021 if (num_sge == 0)
2022 memset(sge, 0, sizeof(*sge));
2023 }
2024
2025 static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
2026 {
2027 uint32_t total_len = 0, i;
2028
2029 for (i = 0; i < num_sge; i++)
2030 total_len += sg_list[i].length;
2031 return total_len;
2032 }
2033
2034
2035 static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
2036 struct ocrdma_hdr_wqe *hdr,
2037 struct ocrdma_sge *sge,
2038 struct ib_send_wr *wr, u32 wqe_size)
2039 {
2040 int i;
2041 char *dpp_addr;
2042
2043 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
2044 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
2045 if (unlikely(hdr->total_len > qp->max_inline_data)) {
2046 pr_err("%s() supported_len=0x%x,\n"
2047 " unsupported len req=0x%x\n", __func__,
2048 qp->max_inline_data, hdr->total_len);
2049 return -EINVAL;
2050 }
2051 dpp_addr = (char *)sge;
2052 for (i = 0; i < wr->num_sge; i++) {
2053 memcpy(dpp_addr,
2054 (void *)(unsigned long)wr->sg_list[i].addr,
2055 wr->sg_list[i].length);
2056 dpp_addr += wr->sg_list[i].length;
2057 }
2058
2059 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
2060 if (0 == hdr->total_len)
2061 wqe_size += sizeof(struct ocrdma_sge);
2062 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
2063 } else {
2064 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2065 if (wr->num_sge)
2066 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
2067 else
2068 wqe_size += sizeof(struct ocrdma_sge);
2069 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2070 }
2071 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2072 return 0;
2073 }
2074
2075 static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2076 struct ib_send_wr *wr)
2077 {
2078 int status;
2079 struct ocrdma_sge *sge;
2080 u32 wqe_size = sizeof(*hdr);
2081
2082 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2083 ocrdma_build_ud_hdr(qp, hdr, wr);
2084 sge = (struct ocrdma_sge *)(hdr + 2);
2085 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
2086 } else {
2087 sge = (struct ocrdma_sge *)(hdr + 1);
2088 }
2089
2090 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2091 return status;
2092 }
2093
2094 static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2095 struct ib_send_wr *wr)
2096 {
2097 int status;
2098 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2099 struct ocrdma_sge *sge = ext_rw + 1;
2100 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
2101
2102 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2103 if (status)
2104 return status;
2105 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2106 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2107 ext_rw->lrkey = rdma_wr(wr)->rkey;
2108 ext_rw->len = hdr->total_len;
2109 return 0;
2110 }
2111
2112 static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2113 struct ib_send_wr *wr)
2114 {
2115 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2116 struct ocrdma_sge *sge = ext_rw + 1;
2117 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
2118 sizeof(struct ocrdma_hdr_wqe);
2119
2120 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2121 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2122 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
2123 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2124
2125 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2126 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2127 ext_rw->lrkey = rdma_wr(wr)->rkey;
2128 ext_rw->len = hdr->total_len;
2129 }
2130
2131 static int get_encoded_page_size(int pg_sz)
2132 {
2133 /* Max size is 256M 4096 << 16 */
2134 int i = 0;
2135 for (; i < 17; i++)
2136 if (pg_sz == (4096 << i))
2137 break;
2138 return i;
2139 }
2140
2141 static int ocrdma_build_reg(struct ocrdma_qp *qp,
2142 struct ocrdma_hdr_wqe *hdr,
2143 struct ib_reg_wr *wr)
2144 {
2145 u64 fbo;
2146 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2147 struct ocrdma_mr *mr = get_ocrdma_mr(wr->mr);
2148 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
2149 struct ocrdma_pbe *pbe;
2150 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2151 int num_pbes = 0, i;
2152
2153 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2154
2155 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2156 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2157
2158 if (wr->access & IB_ACCESS_LOCAL_WRITE)
2159 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2160 if (wr->access & IB_ACCESS_REMOTE_WRITE)
2161 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2162 if (wr->access & IB_ACCESS_REMOTE_READ)
2163 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2164 hdr->lkey = wr->key;
2165 hdr->total_len = mr->ibmr.length;
2166
2167 fbo = mr->ibmr.iova - mr->pages[0];
2168
2169 fast_reg->va_hi = upper_32_bits(mr->ibmr.iova);
2170 fast_reg->va_lo = (u32) (mr->ibmr.iova & 0xffffffff);
2171 fast_reg->fbo_hi = upper_32_bits(fbo);
2172 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2173 fast_reg->num_sges = mr->npages;
2174 fast_reg->size_sge = get_encoded_page_size(mr->ibmr.page_size);
2175
2176 pbe = pbl_tbl->va;
2177 for (i = 0; i < mr->npages; i++) {
2178 u64 buf_addr = mr->pages[i];
2179
2180 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2181 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
2182 num_pbes += 1;
2183 pbe++;
2184
2185 /* if the pbl is full storing the pbes,
2186 * move to next pbl.
2187 */
2188 if (num_pbes == (mr->hwmr.pbl_size/sizeof(u64))) {
2189 pbl_tbl++;
2190 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2191 }
2192 }
2193
2194 return 0;
2195 }
2196
2197 static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2198 {
2199 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
2200
2201 iowrite32(val, qp->sq_db);
2202 }
2203
2204 int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2205 struct ib_send_wr **bad_wr)
2206 {
2207 int status = 0;
2208 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2209 struct ocrdma_hdr_wqe *hdr;
2210 unsigned long flags;
2211
2212 spin_lock_irqsave(&qp->q_lock, flags);
2213 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2214 spin_unlock_irqrestore(&qp->q_lock, flags);
2215 *bad_wr = wr;
2216 return -EINVAL;
2217 }
2218
2219 while (wr) {
2220 if (qp->qp_type == IB_QPT_UD &&
2221 (wr->opcode != IB_WR_SEND &&
2222 wr->opcode != IB_WR_SEND_WITH_IMM)) {
2223 *bad_wr = wr;
2224 status = -EINVAL;
2225 break;
2226 }
2227 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2228 wr->num_sge > qp->sq.max_sges) {
2229 *bad_wr = wr;
2230 status = -ENOMEM;
2231 break;
2232 }
2233 hdr = ocrdma_hwq_head(&qp->sq);
2234 hdr->cw = 0;
2235 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2236 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2237 if (wr->send_flags & IB_SEND_FENCE)
2238 hdr->cw |=
2239 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2240 if (wr->send_flags & IB_SEND_SOLICITED)
2241 hdr->cw |=
2242 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2243 hdr->total_len = 0;
2244 switch (wr->opcode) {
2245 case IB_WR_SEND_WITH_IMM:
2246 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2247 hdr->immdt = ntohl(wr->ex.imm_data);
2248 case IB_WR_SEND:
2249 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2250 ocrdma_build_send(qp, hdr, wr);
2251 break;
2252 case IB_WR_SEND_WITH_INV:
2253 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2254 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2255 hdr->lkey = wr->ex.invalidate_rkey;
2256 status = ocrdma_build_send(qp, hdr, wr);
2257 break;
2258 case IB_WR_RDMA_WRITE_WITH_IMM:
2259 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2260 hdr->immdt = ntohl(wr->ex.imm_data);
2261 case IB_WR_RDMA_WRITE:
2262 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2263 status = ocrdma_build_write(qp, hdr, wr);
2264 break;
2265 case IB_WR_RDMA_READ:
2266 ocrdma_build_read(qp, hdr, wr);
2267 break;
2268 case IB_WR_LOCAL_INV:
2269 hdr->cw |=
2270 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
2271 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2272 sizeof(struct ocrdma_sge)) /
2273 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2274 hdr->lkey = wr->ex.invalidate_rkey;
2275 break;
2276 case IB_WR_REG_MR:
2277 status = ocrdma_build_reg(qp, hdr, reg_wr(wr));
2278 break;
2279 default:
2280 status = -EINVAL;
2281 break;
2282 }
2283 if (status) {
2284 *bad_wr = wr;
2285 break;
2286 }
2287 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2288 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2289 else
2290 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2291 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2292 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2293 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2294 /* make sure wqe is written before adapter can access it */
2295 wmb();
2296 /* inform hw to start processing it */
2297 ocrdma_ring_sq_db(qp);
2298
2299 /* update pointer, counter for next wr */
2300 ocrdma_hwq_inc_head(&qp->sq);
2301 wr = wr->next;
2302 }
2303 spin_unlock_irqrestore(&qp->q_lock, flags);
2304 return status;
2305 }
2306
2307 static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2308 {
2309 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
2310
2311 iowrite32(val, qp->rq_db);
2312 }
2313
2314 static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2315 u16 tag)
2316 {
2317 u32 wqe_size = 0;
2318 struct ocrdma_sge *sge;
2319 if (wr->num_sge)
2320 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2321 else
2322 wqe_size = sizeof(*sge) + sizeof(*rqe);
2323
2324 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2325 OCRDMA_WQE_SIZE_SHIFT);
2326 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2327 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2328 rqe->total_len = 0;
2329 rqe->rsvd_tag = tag;
2330 sge = (struct ocrdma_sge *)(rqe + 1);
2331 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2332 ocrdma_cpu_to_le32(rqe, wqe_size);
2333 }
2334
2335 int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2336 struct ib_recv_wr **bad_wr)
2337 {
2338 int status = 0;
2339 unsigned long flags;
2340 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2341 struct ocrdma_hdr_wqe *rqe;
2342
2343 spin_lock_irqsave(&qp->q_lock, flags);
2344 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2345 spin_unlock_irqrestore(&qp->q_lock, flags);
2346 *bad_wr = wr;
2347 return -EINVAL;
2348 }
2349 while (wr) {
2350 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2351 wr->num_sge > qp->rq.max_sges) {
2352 *bad_wr = wr;
2353 status = -ENOMEM;
2354 break;
2355 }
2356 rqe = ocrdma_hwq_head(&qp->rq);
2357 ocrdma_build_rqe(rqe, wr, 0);
2358
2359 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2360 /* make sure rqe is written before adapter can access it */
2361 wmb();
2362
2363 /* inform hw to start processing it */
2364 ocrdma_ring_rq_db(qp);
2365
2366 /* update pointer, counter for next wr */
2367 ocrdma_hwq_inc_head(&qp->rq);
2368 wr = wr->next;
2369 }
2370 spin_unlock_irqrestore(&qp->q_lock, flags);
2371 return status;
2372 }
2373
2374 /* cqe for srq's rqe can potentially arrive out of order.
2375 * index gives the entry in the shadow table where to store
2376 * the wr_id. tag/index is returned in cqe to reference back
2377 * for a given rqe.
2378 */
2379 static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2380 {
2381 int row = 0;
2382 int indx = 0;
2383
2384 for (row = 0; row < srq->bit_fields_len; row++) {
2385 if (srq->idx_bit_fields[row]) {
2386 indx = ffs(srq->idx_bit_fields[row]);
2387 indx = (row * 32) + (indx - 1);
2388 BUG_ON(indx >= srq->rq.max_cnt);
2389 ocrdma_srq_toggle_bit(srq, indx);
2390 break;
2391 }
2392 }
2393
2394 BUG_ON(row == srq->bit_fields_len);
2395 return indx + 1; /* Use from index 1 */
2396 }
2397
2398 static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2399 {
2400 u32 val = srq->rq.dbid | (1 << 16);
2401
2402 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2403 }
2404
2405 int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2406 struct ib_recv_wr **bad_wr)
2407 {
2408 int status = 0;
2409 unsigned long flags;
2410 struct ocrdma_srq *srq;
2411 struct ocrdma_hdr_wqe *rqe;
2412 u16 tag;
2413
2414 srq = get_ocrdma_srq(ibsrq);
2415
2416 spin_lock_irqsave(&srq->q_lock, flags);
2417 while (wr) {
2418 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2419 wr->num_sge > srq->rq.max_sges) {
2420 status = -ENOMEM;
2421 *bad_wr = wr;
2422 break;
2423 }
2424 tag = ocrdma_srq_get_idx(srq);
2425 rqe = ocrdma_hwq_head(&srq->rq);
2426 ocrdma_build_rqe(rqe, wr, tag);
2427
2428 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2429 /* make sure rqe is written before adapter can perform DMA */
2430 wmb();
2431 /* inform hw to start processing it */
2432 ocrdma_ring_srq_db(srq);
2433 /* update pointer, counter for next wr */
2434 ocrdma_hwq_inc_head(&srq->rq);
2435 wr = wr->next;
2436 }
2437 spin_unlock_irqrestore(&srq->q_lock, flags);
2438 return status;
2439 }
2440
2441 static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2442 {
2443 enum ib_wc_status ibwc_status;
2444
2445 switch (status) {
2446 case OCRDMA_CQE_GENERAL_ERR:
2447 ibwc_status = IB_WC_GENERAL_ERR;
2448 break;
2449 case OCRDMA_CQE_LOC_LEN_ERR:
2450 ibwc_status = IB_WC_LOC_LEN_ERR;
2451 break;
2452 case OCRDMA_CQE_LOC_QP_OP_ERR:
2453 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2454 break;
2455 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2456 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2457 break;
2458 case OCRDMA_CQE_LOC_PROT_ERR:
2459 ibwc_status = IB_WC_LOC_PROT_ERR;
2460 break;
2461 case OCRDMA_CQE_WR_FLUSH_ERR:
2462 ibwc_status = IB_WC_WR_FLUSH_ERR;
2463 break;
2464 case OCRDMA_CQE_MW_BIND_ERR:
2465 ibwc_status = IB_WC_MW_BIND_ERR;
2466 break;
2467 case OCRDMA_CQE_BAD_RESP_ERR:
2468 ibwc_status = IB_WC_BAD_RESP_ERR;
2469 break;
2470 case OCRDMA_CQE_LOC_ACCESS_ERR:
2471 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2472 break;
2473 case OCRDMA_CQE_REM_INV_REQ_ERR:
2474 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2475 break;
2476 case OCRDMA_CQE_REM_ACCESS_ERR:
2477 ibwc_status = IB_WC_REM_ACCESS_ERR;
2478 break;
2479 case OCRDMA_CQE_REM_OP_ERR:
2480 ibwc_status = IB_WC_REM_OP_ERR;
2481 break;
2482 case OCRDMA_CQE_RETRY_EXC_ERR:
2483 ibwc_status = IB_WC_RETRY_EXC_ERR;
2484 break;
2485 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2486 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2487 break;
2488 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2489 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2490 break;
2491 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2492 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2493 break;
2494 case OCRDMA_CQE_REM_ABORT_ERR:
2495 ibwc_status = IB_WC_REM_ABORT_ERR;
2496 break;
2497 case OCRDMA_CQE_INV_EECN_ERR:
2498 ibwc_status = IB_WC_INV_EECN_ERR;
2499 break;
2500 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2501 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2502 break;
2503 case OCRDMA_CQE_FATAL_ERR:
2504 ibwc_status = IB_WC_FATAL_ERR;
2505 break;
2506 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2507 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2508 break;
2509 default:
2510 ibwc_status = IB_WC_GENERAL_ERR;
2511 break;
2512 }
2513 return ibwc_status;
2514 }
2515
2516 static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2517 u32 wqe_idx)
2518 {
2519 struct ocrdma_hdr_wqe *hdr;
2520 struct ocrdma_sge *rw;
2521 int opcode;
2522
2523 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2524
2525 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2526 /* Undo the hdr->cw swap */
2527 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2528 switch (opcode) {
2529 case OCRDMA_WRITE:
2530 ibwc->opcode = IB_WC_RDMA_WRITE;
2531 break;
2532 case OCRDMA_READ:
2533 rw = (struct ocrdma_sge *)(hdr + 1);
2534 ibwc->opcode = IB_WC_RDMA_READ;
2535 ibwc->byte_len = rw->len;
2536 break;
2537 case OCRDMA_SEND:
2538 ibwc->opcode = IB_WC_SEND;
2539 break;
2540 case OCRDMA_FR_MR:
2541 ibwc->opcode = IB_WC_REG_MR;
2542 break;
2543 case OCRDMA_LKEY_INV:
2544 ibwc->opcode = IB_WC_LOCAL_INV;
2545 break;
2546 default:
2547 ibwc->status = IB_WC_GENERAL_ERR;
2548 pr_err("%s() invalid opcode received = 0x%x\n",
2549 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
2550 break;
2551 }
2552 }
2553
2554 static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2555 struct ocrdma_cqe *cqe)
2556 {
2557 if (is_cqe_for_sq(cqe)) {
2558 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2559 cqe->flags_status_srcqpn) &
2560 ~OCRDMA_CQE_STATUS_MASK);
2561 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2562 cqe->flags_status_srcqpn) |
2563 (OCRDMA_CQE_WR_FLUSH_ERR <<
2564 OCRDMA_CQE_STATUS_SHIFT));
2565 } else {
2566 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2567 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2568 cqe->flags_status_srcqpn) &
2569 ~OCRDMA_CQE_UD_STATUS_MASK);
2570 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2571 cqe->flags_status_srcqpn) |
2572 (OCRDMA_CQE_WR_FLUSH_ERR <<
2573 OCRDMA_CQE_UD_STATUS_SHIFT));
2574 } else {
2575 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2576 cqe->flags_status_srcqpn) &
2577 ~OCRDMA_CQE_STATUS_MASK);
2578 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2579 cqe->flags_status_srcqpn) |
2580 (OCRDMA_CQE_WR_FLUSH_ERR <<
2581 OCRDMA_CQE_STATUS_SHIFT));
2582 }
2583 }
2584 }
2585
2586 static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2587 struct ocrdma_qp *qp, int status)
2588 {
2589 bool expand = false;
2590
2591 ibwc->byte_len = 0;
2592 ibwc->qp = &qp->ibqp;
2593 ibwc->status = ocrdma_to_ibwc_err(status);
2594
2595 ocrdma_flush_qp(qp);
2596 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
2597
2598 /* if wqe/rqe pending for which cqe needs to be returned,
2599 * trigger inflating it.
2600 */
2601 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2602 expand = true;
2603 ocrdma_set_cqe_status_flushed(qp, cqe);
2604 }
2605 return expand;
2606 }
2607
2608 static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2609 struct ocrdma_qp *qp, int status)
2610 {
2611 ibwc->opcode = IB_WC_RECV;
2612 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2613 ocrdma_hwq_inc_tail(&qp->rq);
2614
2615 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2616 }
2617
2618 static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2619 struct ocrdma_qp *qp, int status)
2620 {
2621 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2622 ocrdma_hwq_inc_tail(&qp->sq);
2623
2624 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2625 }
2626
2627
2628 static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2629 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2630 bool *polled, bool *stop)
2631 {
2632 bool expand;
2633 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2634 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2635 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2636 if (status < OCRDMA_MAX_CQE_ERR)
2637 atomic_inc(&dev->cqe_err_stats[status]);
2638
2639 /* when hw sq is empty, but rq is not empty, so we continue
2640 * to keep the cqe in order to get the cq event again.
2641 */
2642 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2643 /* when cq for rq and sq is same, it is safe to return
2644 * flush cqe for RQEs.
2645 */
2646 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2647 *polled = true;
2648 status = OCRDMA_CQE_WR_FLUSH_ERR;
2649 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2650 } else {
2651 /* stop processing further cqe as this cqe is used for
2652 * triggering cq event on buddy cq of RQ.
2653 * When QP is destroyed, this cqe will be removed
2654 * from the cq's hardware q.
2655 */
2656 *polled = false;
2657 *stop = true;
2658 expand = false;
2659 }
2660 } else if (is_hw_sq_empty(qp)) {
2661 /* Do nothing */
2662 expand = false;
2663 *polled = false;
2664 *stop = false;
2665 } else {
2666 *polled = true;
2667 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2668 }
2669 return expand;
2670 }
2671
2672 static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2673 struct ocrdma_cqe *cqe,
2674 struct ib_wc *ibwc, bool *polled)
2675 {
2676 bool expand = false;
2677 int tail = qp->sq.tail;
2678 u32 wqe_idx;
2679
2680 if (!qp->wqe_wr_id_tbl[tail].signaled) {
2681 *polled = false; /* WC cannot be consumed yet */
2682 } else {
2683 ibwc->status = IB_WC_SUCCESS;
2684 ibwc->wc_flags = 0;
2685 ibwc->qp = &qp->ibqp;
2686 ocrdma_update_wc(qp, ibwc, tail);
2687 *polled = true;
2688 }
2689 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2690 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
2691 if (tail != wqe_idx)
2692 expand = true; /* Coalesced CQE can't be consumed yet */
2693
2694 ocrdma_hwq_inc_tail(&qp->sq);
2695 return expand;
2696 }
2697
2698 static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2699 struct ib_wc *ibwc, bool *polled, bool *stop)
2700 {
2701 int status;
2702 bool expand;
2703
2704 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2705 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2706
2707 if (status == OCRDMA_CQE_SUCCESS)
2708 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2709 else
2710 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2711 return expand;
2712 }
2713
2714 static int ocrdma_update_ud_rcqe(struct ocrdma_dev *dev, struct ib_wc *ibwc,
2715 struct ocrdma_cqe *cqe)
2716 {
2717 int status;
2718 u16 hdr_type = 0;
2719
2720 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2721 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2722 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2723 OCRDMA_CQE_SRCQP_MASK;
2724 ibwc->pkey_index = 0;
2725 ibwc->wc_flags = IB_WC_GRH;
2726 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2727 OCRDMA_CQE_UD_XFER_LEN_SHIFT) &
2728 OCRDMA_CQE_UD_XFER_LEN_MASK;
2729
2730 if (ocrdma_is_udp_encap_supported(dev)) {
2731 hdr_type = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2732 OCRDMA_CQE_UD_L3TYPE_SHIFT) &
2733 OCRDMA_CQE_UD_L3TYPE_MASK;
2734 ibwc->wc_flags |= IB_WC_WITH_NETWORK_HDR_TYPE;
2735 ibwc->network_hdr_type = hdr_type;
2736 }
2737
2738 return status;
2739 }
2740
2741 static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2742 struct ocrdma_cqe *cqe,
2743 struct ocrdma_qp *qp)
2744 {
2745 unsigned long flags;
2746 struct ocrdma_srq *srq;
2747 u32 wqe_idx;
2748
2749 srq = get_ocrdma_srq(qp->ibqp.srq);
2750 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
2751 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
2752 BUG_ON(wqe_idx < 1);
2753
2754 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2755 spin_lock_irqsave(&srq->q_lock, flags);
2756 ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
2757 spin_unlock_irqrestore(&srq->q_lock, flags);
2758 ocrdma_hwq_inc_tail(&srq->rq);
2759 }
2760
2761 static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2762 struct ib_wc *ibwc, bool *polled, bool *stop,
2763 int status)
2764 {
2765 bool expand;
2766 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2767
2768 if (status < OCRDMA_MAX_CQE_ERR)
2769 atomic_inc(&dev->cqe_err_stats[status]);
2770
2771 /* when hw_rq is empty, but wq is not empty, so continue
2772 * to keep the cqe to get the cq event again.
2773 */
2774 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2775 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2776 *polled = true;
2777 status = OCRDMA_CQE_WR_FLUSH_ERR;
2778 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2779 } else {
2780 *polled = false;
2781 *stop = true;
2782 expand = false;
2783 }
2784 } else if (is_hw_rq_empty(qp)) {
2785 /* Do nothing */
2786 expand = false;
2787 *polled = false;
2788 *stop = false;
2789 } else {
2790 *polled = true;
2791 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2792 }
2793 return expand;
2794 }
2795
2796 static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2797 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2798 {
2799 struct ocrdma_dev *dev;
2800
2801 dev = get_ocrdma_dev(qp->ibqp.device);
2802 ibwc->opcode = IB_WC_RECV;
2803 ibwc->qp = &qp->ibqp;
2804 ibwc->status = IB_WC_SUCCESS;
2805
2806 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2807 ocrdma_update_ud_rcqe(dev, ibwc, cqe);
2808 else
2809 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2810
2811 if (is_cqe_imm(cqe)) {
2812 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2813 ibwc->wc_flags |= IB_WC_WITH_IMM;
2814 } else if (is_cqe_wr_imm(cqe)) {
2815 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2816 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2817 ibwc->wc_flags |= IB_WC_WITH_IMM;
2818 } else if (is_cqe_invalidated(cqe)) {
2819 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2820 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2821 }
2822 if (qp->ibqp.srq) {
2823 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
2824 } else {
2825 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2826 ocrdma_hwq_inc_tail(&qp->rq);
2827 }
2828 }
2829
2830 static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2831 struct ib_wc *ibwc, bool *polled, bool *stop)
2832 {
2833 int status;
2834 bool expand = false;
2835
2836 ibwc->wc_flags = 0;
2837 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2838 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2839 OCRDMA_CQE_UD_STATUS_MASK) >>
2840 OCRDMA_CQE_UD_STATUS_SHIFT;
2841 } else {
2842 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2843 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2844 }
2845
2846 if (status == OCRDMA_CQE_SUCCESS) {
2847 *polled = true;
2848 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2849 } else {
2850 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2851 status);
2852 }
2853 return expand;
2854 }
2855
2856 static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2857 u16 cur_getp)
2858 {
2859 if (cq->phase_change) {
2860 if (cur_getp == 0)
2861 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
2862 } else {
2863 /* clear valid bit */
2864 cqe->flags_status_srcqpn = 0;
2865 }
2866 }
2867
2868 static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2869 struct ib_wc *ibwc)
2870 {
2871 u16 qpn = 0;
2872 int i = 0;
2873 bool expand = false;
2874 int polled_hw_cqes = 0;
2875 struct ocrdma_qp *qp = NULL;
2876 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
2877 struct ocrdma_cqe *cqe;
2878 u16 cur_getp; bool polled = false; bool stop = false;
2879
2880 cur_getp = cq->getp;
2881 while (num_entries) {
2882 cqe = cq->va + cur_getp;
2883 /* check whether valid cqe or not */
2884 if (!is_cqe_valid(cq, cqe))
2885 break;
2886 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2887 /* ignore discarded cqe */
2888 if (qpn == 0)
2889 goto skip_cqe;
2890 qp = dev->qp_tbl[qpn];
2891 BUG_ON(qp == NULL);
2892
2893 if (is_cqe_for_sq(cqe)) {
2894 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2895 &stop);
2896 } else {
2897 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2898 &stop);
2899 }
2900 if (expand)
2901 goto expand_cqe;
2902 if (stop)
2903 goto stop_cqe;
2904 /* clear qpn to avoid duplicate processing by discard_cqe() */
2905 cqe->cmn.qpn = 0;
2906 skip_cqe:
2907 polled_hw_cqes += 1;
2908 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2909 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2910 expand_cqe:
2911 if (polled) {
2912 num_entries -= 1;
2913 i += 1;
2914 ibwc = ibwc + 1;
2915 polled = false;
2916 }
2917 }
2918 stop_cqe:
2919 cq->getp = cur_getp;
2920
2921 if (polled_hw_cqes)
2922 ocrdma_ring_cq_db(dev, cq->id, false, false, polled_hw_cqes);
2923
2924 return i;
2925 }
2926
2927 /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2928 static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2929 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2930 {
2931 int err_cqes = 0;
2932
2933 while (num_entries) {
2934 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2935 break;
2936 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2937 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2938 ocrdma_hwq_inc_tail(&qp->sq);
2939 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2940 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2941 ocrdma_hwq_inc_tail(&qp->rq);
2942 } else {
2943 return err_cqes;
2944 }
2945 ibwc->byte_len = 0;
2946 ibwc->status = IB_WC_WR_FLUSH_ERR;
2947 ibwc = ibwc + 1;
2948 err_cqes += 1;
2949 num_entries -= 1;
2950 }
2951 return err_cqes;
2952 }
2953
2954 int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2955 {
2956 int cqes_to_poll = num_entries;
2957 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2958 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2959 int num_os_cqe = 0, err_cqes = 0;
2960 struct ocrdma_qp *qp;
2961 unsigned long flags;
2962
2963 /* poll cqes from adapter CQ */
2964 spin_lock_irqsave(&cq->cq_lock, flags);
2965 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2966 spin_unlock_irqrestore(&cq->cq_lock, flags);
2967 cqes_to_poll -= num_os_cqe;
2968
2969 if (cqes_to_poll) {
2970 wc = wc + num_os_cqe;
2971 /* adapter returns single error cqe when qp moves to
2972 * error state. So insert error cqes with wc_status as
2973 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2974 * respectively which uses this CQ.
2975 */
2976 spin_lock_irqsave(&dev->flush_q_lock, flags);
2977 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2978 if (cqes_to_poll == 0)
2979 break;
2980 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2981 cqes_to_poll -= err_cqes;
2982 num_os_cqe += err_cqes;
2983 wc = wc + err_cqes;
2984 }
2985 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2986 }
2987 return num_os_cqe;
2988 }
2989
2990 int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2991 {
2992 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2993 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2994 u16 cq_id;
2995 unsigned long flags;
2996 bool arm_needed = false, sol_needed = false;
2997
2998 cq_id = cq->id;
2999
3000 spin_lock_irqsave(&cq->cq_lock, flags);
3001 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
3002 arm_needed = true;
3003 if (cq_flags & IB_CQ_SOLICITED)
3004 sol_needed = true;
3005
3006 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
3007 spin_unlock_irqrestore(&cq->cq_lock, flags);
3008
3009 return 0;
3010 }
3011
3012 struct ib_mr *ocrdma_alloc_mr(struct ib_pd *ibpd,
3013 enum ib_mr_type mr_type,
3014 u32 max_num_sg)
3015 {
3016 int status;
3017 struct ocrdma_mr *mr;
3018 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3019 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3020
3021 if (mr_type != IB_MR_TYPE_MEM_REG)
3022 return ERR_PTR(-EINVAL);
3023
3024 if (max_num_sg > dev->attr.max_pages_per_frmr)
3025 return ERR_PTR(-EINVAL);
3026
3027 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3028 if (!mr)
3029 return ERR_PTR(-ENOMEM);
3030
3031 mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL);
3032 if (!mr->pages) {
3033 status = -ENOMEM;
3034 goto pl_err;
3035 }
3036
3037 status = ocrdma_get_pbl_info(dev, mr, max_num_sg);
3038 if (status)
3039 goto pbl_err;
3040 mr->hwmr.fr_mr = 1;
3041 mr->hwmr.remote_rd = 0;
3042 mr->hwmr.remote_wr = 0;
3043 mr->hwmr.local_rd = 0;
3044 mr->hwmr.local_wr = 0;
3045 mr->hwmr.mw_bind = 0;
3046 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3047 if (status)
3048 goto pbl_err;
3049 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
3050 if (status)
3051 goto mbx_err;
3052 mr->ibmr.rkey = mr->hwmr.lkey;
3053 mr->ibmr.lkey = mr->hwmr.lkey;
3054 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
3055 (unsigned long) mr;
3056 return &mr->ibmr;
3057 mbx_err:
3058 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3059 pbl_err:
3060 kfree(mr->pages);
3061 pl_err:
3062 kfree(mr);
3063 return ERR_PTR(-ENOMEM);
3064 }
3065
3066 static int ocrdma_set_page(struct ib_mr *ibmr, u64 addr)
3067 {
3068 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
3069
3070 if (unlikely(mr->npages == mr->hwmr.num_pbes))
3071 return -ENOMEM;
3072
3073 mr->pages[mr->npages++] = addr;
3074
3075 return 0;
3076 }
3077
3078 int ocrdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
3079 unsigned int *sg_offset)
3080 {
3081 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
3082
3083 mr->npages = 0;
3084
3085 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, ocrdma_set_page);
3086 }
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