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[mirror_ubuntu-hirsute-kernel.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
1 /*******************************************************************
2 * This file is part of the Emulex RoCE Device Driver for *
3 * RoCE (RDMA over Converged Ethernet) adapters. *
4 * Copyright (C) 2008-2012 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *
20 * Contact Information:
21 * linux-drivers@emulex.com
22 *
23 * Emulex
24 * 3333 Susan Street
25 * Costa Mesa, CA 92626
26 *******************************************************************/
27
28 #include <linux/dma-mapping.h>
29 #include <rdma/ib_verbs.h>
30 #include <rdma/ib_user_verbs.h>
31 #include <rdma/iw_cm.h>
32 #include <rdma/ib_umem.h>
33 #include <rdma/ib_addr.h>
34
35 #include "ocrdma.h"
36 #include "ocrdma_hw.h"
37 #include "ocrdma_verbs.h"
38 #include "ocrdma_abi.h"
39
40 int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
41 {
42 if (index > 1)
43 return -EINVAL;
44
45 *pkey = 0xffff;
46 return 0;
47 }
48
49 int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
50 int index, union ib_gid *sgid)
51 {
52 struct ocrdma_dev *dev;
53
54 dev = get_ocrdma_dev(ibdev);
55 memset(sgid, 0, sizeof(*sgid));
56 if (index >= OCRDMA_MAX_SGID)
57 return -EINVAL;
58
59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
60
61 return 0;
62 }
63
64 int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
65 {
66 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
67
68 memset(attr, 0, sizeof *attr);
69 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
70 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
71 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
72 attr->max_mr_size = dev->attr.max_mr_size;
73 attr->page_size_cap = 0xffff000;
74 attr->vendor_id = dev->nic_info.pdev->vendor;
75 attr->vendor_part_id = dev->nic_info.pdev->device;
76 attr->hw_ver = dev->asic_id;
77 attr->max_qp = dev->attr.max_qp;
78 attr->max_ah = OCRDMA_MAX_AH;
79 attr->max_qp_wr = dev->attr.max_wqe;
80
81 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
82 IB_DEVICE_RC_RNR_NAK_GEN |
83 IB_DEVICE_SHUTDOWN_PORT |
84 IB_DEVICE_SYS_IMAGE_GUID |
85 IB_DEVICE_LOCAL_DMA_LKEY |
86 IB_DEVICE_MEM_MGT_EXTENSIONS;
87 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
88 attr->max_sge_rd = 0;
89 attr->max_cq = dev->attr.max_cq;
90 attr->max_cqe = dev->attr.max_cqe;
91 attr->max_mr = dev->attr.max_mr;
92 attr->max_mw = dev->attr.max_mw;
93 attr->max_pd = dev->attr.max_pd;
94 attr->atomic_cap = 0;
95 attr->max_fmr = 0;
96 attr->max_map_per_fmr = 0;
97 attr->max_qp_rd_atom =
98 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
99 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
100 attr->max_srq = dev->attr.max_srq;
101 attr->max_srq_sge = dev->attr.max_srq_sge;
102 attr->max_srq_wr = dev->attr.max_rqe;
103 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
104 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
105 attr->max_pkeys = 1;
106 return 0;
107 }
108
109 static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
110 u8 *ib_speed, u8 *ib_width)
111 {
112 int status;
113 u8 speed;
114
115 status = ocrdma_mbx_get_link_speed(dev, &speed);
116 if (status)
117 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
118
119 switch (speed) {
120 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
121 *ib_speed = IB_SPEED_SDR;
122 *ib_width = IB_WIDTH_1X;
123 break;
124
125 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
126 *ib_speed = IB_SPEED_QDR;
127 *ib_width = IB_WIDTH_1X;
128 break;
129
130 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
131 *ib_speed = IB_SPEED_DDR;
132 *ib_width = IB_WIDTH_4X;
133 break;
134
135 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
136 *ib_speed = IB_SPEED_QDR;
137 *ib_width = IB_WIDTH_4X;
138 break;
139
140 default:
141 /* Unsupported */
142 *ib_speed = IB_SPEED_SDR;
143 *ib_width = IB_WIDTH_1X;
144 }
145 }
146
147 int ocrdma_query_port(struct ib_device *ibdev,
148 u8 port, struct ib_port_attr *props)
149 {
150 enum ib_port_state port_state;
151 struct ocrdma_dev *dev;
152 struct net_device *netdev;
153
154 dev = get_ocrdma_dev(ibdev);
155 if (port > 1) {
156 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
157 dev->id, port);
158 return -EINVAL;
159 }
160 netdev = dev->nic_info.netdev;
161 if (netif_running(netdev) && netif_oper_up(netdev)) {
162 port_state = IB_PORT_ACTIVE;
163 props->phys_state = 5;
164 } else {
165 port_state = IB_PORT_DOWN;
166 props->phys_state = 3;
167 }
168 props->max_mtu = IB_MTU_4096;
169 props->active_mtu = iboe_get_mtu(netdev->mtu);
170 props->lid = 0;
171 props->lmc = 0;
172 props->sm_lid = 0;
173 props->sm_sl = 0;
174 props->state = port_state;
175 props->port_cap_flags =
176 IB_PORT_CM_SUP |
177 IB_PORT_REINIT_SUP |
178 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_IP_BASED_GIDS;
179 props->gid_tbl_len = OCRDMA_MAX_SGID;
180 props->pkey_tbl_len = 1;
181 props->bad_pkey_cntr = 0;
182 props->qkey_viol_cntr = 0;
183 get_link_speed_and_width(dev, &props->active_speed,
184 &props->active_width);
185 props->max_msg_sz = 0x80000000;
186 props->max_vl_num = 4;
187 return 0;
188 }
189
190 int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
191 struct ib_port_modify *props)
192 {
193 struct ocrdma_dev *dev;
194
195 dev = get_ocrdma_dev(ibdev);
196 if (port > 1) {
197 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
198 return -EINVAL;
199 }
200 return 0;
201 }
202
203 static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
204 unsigned long len)
205 {
206 struct ocrdma_mm *mm;
207
208 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
209 if (mm == NULL)
210 return -ENOMEM;
211 mm->key.phy_addr = phy_addr;
212 mm->key.len = len;
213 INIT_LIST_HEAD(&mm->entry);
214
215 mutex_lock(&uctx->mm_list_lock);
216 list_add_tail(&mm->entry, &uctx->mm_head);
217 mutex_unlock(&uctx->mm_list_lock);
218 return 0;
219 }
220
221 static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
222 unsigned long len)
223 {
224 struct ocrdma_mm *mm, *tmp;
225
226 mutex_lock(&uctx->mm_list_lock);
227 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
228 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
229 continue;
230
231 list_del(&mm->entry);
232 kfree(mm);
233 break;
234 }
235 mutex_unlock(&uctx->mm_list_lock);
236 }
237
238 static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
239 unsigned long len)
240 {
241 bool found = false;
242 struct ocrdma_mm *mm;
243
244 mutex_lock(&uctx->mm_list_lock);
245 list_for_each_entry(mm, &uctx->mm_head, entry) {
246 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
247 continue;
248
249 found = true;
250 break;
251 }
252 mutex_unlock(&uctx->mm_list_lock);
253 return found;
254 }
255
256
257 static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
258 {
259 u16 pd_bitmap_idx = 0;
260 const unsigned long *pd_bitmap;
261
262 if (dpp_pool) {
263 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
264 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
265 dev->pd_mgr->max_dpp_pd);
266 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
267 dev->pd_mgr->pd_dpp_count++;
268 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
269 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
270 } else {
271 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
272 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
273 dev->pd_mgr->max_normal_pd);
274 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
275 dev->pd_mgr->pd_norm_count++;
276 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
277 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
278 }
279 return pd_bitmap_idx;
280 }
281
282 static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
283 bool dpp_pool)
284 {
285 u16 pd_count;
286 u16 pd_bit_index;
287
288 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
289 dev->pd_mgr->pd_norm_count;
290 if (pd_count == 0)
291 return -EINVAL;
292
293 if (dpp_pool) {
294 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
295 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
296 return -EINVAL;
297 } else {
298 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
299 dev->pd_mgr->pd_dpp_count--;
300 }
301 } else {
302 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
303 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
304 return -EINVAL;
305 } else {
306 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
307 dev->pd_mgr->pd_norm_count--;
308 }
309 }
310
311 return 0;
312 }
313
314 static u8 ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
315 bool dpp_pool)
316 {
317 int status;
318
319 mutex_lock(&dev->dev_lock);
320 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
321 mutex_unlock(&dev->dev_lock);
322 return status;
323 }
324
325 static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
326 {
327 u16 pd_idx = 0;
328 int status = 0;
329
330 mutex_lock(&dev->dev_lock);
331 if (pd->dpp_enabled) {
332 /* try allocating DPP PD, if not available then normal PD */
333 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
334 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
335 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
336 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
337 } else if (dev->pd_mgr->pd_norm_count <
338 dev->pd_mgr->max_normal_pd) {
339 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
340 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
341 pd->dpp_enabled = false;
342 } else {
343 status = -EINVAL;
344 }
345 } else {
346 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
347 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
348 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
349 } else {
350 status = -EINVAL;
351 }
352 }
353 mutex_unlock(&dev->dev_lock);
354 return status;
355 }
356
357 static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
358 struct ocrdma_ucontext *uctx,
359 struct ib_udata *udata)
360 {
361 struct ocrdma_pd *pd = NULL;
362 int status = 0;
363
364 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
365 if (!pd)
366 return ERR_PTR(-ENOMEM);
367
368 if (udata && uctx) {
369 pd->dpp_enabled =
370 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
371 pd->num_dpp_qp =
372 pd->dpp_enabled ? (dev->nic_info.db_page_size /
373 dev->attr.wqe_size) : 0;
374 }
375
376 if (dev->pd_mgr->pd_prealloc_valid) {
377 status = ocrdma_get_pd_num(dev, pd);
378 if (status == 0) {
379 return pd;
380 } else {
381 kfree(pd);
382 return ERR_PTR(status);
383 }
384 }
385
386 retry:
387 status = ocrdma_mbx_alloc_pd(dev, pd);
388 if (status) {
389 if (pd->dpp_enabled) {
390 pd->dpp_enabled = false;
391 pd->num_dpp_qp = 0;
392 goto retry;
393 } else {
394 kfree(pd);
395 return ERR_PTR(status);
396 }
397 }
398
399 return pd;
400 }
401
402 static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
403 struct ocrdma_pd *pd)
404 {
405 return (uctx->cntxt_pd == pd ? true : false);
406 }
407
408 static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
409 struct ocrdma_pd *pd)
410 {
411 int status = 0;
412
413 if (dev->pd_mgr->pd_prealloc_valid)
414 status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
415 else
416 status = ocrdma_mbx_dealloc_pd(dev, pd);
417
418 kfree(pd);
419 return status;
420 }
421
422 static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
423 struct ocrdma_ucontext *uctx,
424 struct ib_udata *udata)
425 {
426 int status = 0;
427
428 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
429 if (IS_ERR(uctx->cntxt_pd)) {
430 status = PTR_ERR(uctx->cntxt_pd);
431 uctx->cntxt_pd = NULL;
432 goto err;
433 }
434
435 uctx->cntxt_pd->uctx = uctx;
436 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
437 err:
438 return status;
439 }
440
441 static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
442 {
443 struct ocrdma_pd *pd = uctx->cntxt_pd;
444 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
445
446 if (uctx->pd_in_use) {
447 pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
448 __func__, dev->id, pd->id);
449 }
450 uctx->cntxt_pd = NULL;
451 (void)_ocrdma_dealloc_pd(dev, pd);
452 return 0;
453 }
454
455 static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
456 {
457 struct ocrdma_pd *pd = NULL;
458
459 mutex_lock(&uctx->mm_list_lock);
460 if (!uctx->pd_in_use) {
461 uctx->pd_in_use = true;
462 pd = uctx->cntxt_pd;
463 }
464 mutex_unlock(&uctx->mm_list_lock);
465
466 return pd;
467 }
468
469 static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
470 {
471 mutex_lock(&uctx->mm_list_lock);
472 uctx->pd_in_use = false;
473 mutex_unlock(&uctx->mm_list_lock);
474 }
475
476 struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
477 struct ib_udata *udata)
478 {
479 int status;
480 struct ocrdma_ucontext *ctx;
481 struct ocrdma_alloc_ucontext_resp resp;
482 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
483 struct pci_dev *pdev = dev->nic_info.pdev;
484 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
485
486 if (!udata)
487 return ERR_PTR(-EFAULT);
488 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
489 if (!ctx)
490 return ERR_PTR(-ENOMEM);
491 INIT_LIST_HEAD(&ctx->mm_head);
492 mutex_init(&ctx->mm_list_lock);
493
494 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
495 &ctx->ah_tbl.pa, GFP_KERNEL);
496 if (!ctx->ah_tbl.va) {
497 kfree(ctx);
498 return ERR_PTR(-ENOMEM);
499 }
500 memset(ctx->ah_tbl.va, 0, map_len);
501 ctx->ah_tbl.len = map_len;
502
503 memset(&resp, 0, sizeof(resp));
504 resp.ah_tbl_len = ctx->ah_tbl.len;
505 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
506
507 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
508 if (status)
509 goto map_err;
510
511 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
512 if (status)
513 goto pd_err;
514
515 resp.dev_id = dev->id;
516 resp.max_inline_data = dev->attr.max_inline_data;
517 resp.wqe_size = dev->attr.wqe_size;
518 resp.rqe_size = dev->attr.rqe_size;
519 resp.dpp_wqe_size = dev->attr.wqe_size;
520
521 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
522 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
523 if (status)
524 goto cpy_err;
525 return &ctx->ibucontext;
526
527 cpy_err:
528 pd_err:
529 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
530 map_err:
531 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
532 ctx->ah_tbl.pa);
533 kfree(ctx);
534 return ERR_PTR(status);
535 }
536
537 int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
538 {
539 int status = 0;
540 struct ocrdma_mm *mm, *tmp;
541 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
542 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
543 struct pci_dev *pdev = dev->nic_info.pdev;
544
545 status = ocrdma_dealloc_ucontext_pd(uctx);
546
547 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
548 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
549 uctx->ah_tbl.pa);
550
551 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
552 list_del(&mm->entry);
553 kfree(mm);
554 }
555 kfree(uctx);
556 return status;
557 }
558
559 int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
560 {
561 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
562 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
563 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
564 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
565 unsigned long len = (vma->vm_end - vma->vm_start);
566 int status = 0;
567 bool found;
568
569 if (vma->vm_start & (PAGE_SIZE - 1))
570 return -EINVAL;
571 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
572 if (!found)
573 return -EINVAL;
574
575 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
576 dev->nic_info.db_total_size)) &&
577 (len <= dev->nic_info.db_page_size)) {
578 if (vma->vm_flags & VM_READ)
579 return -EPERM;
580
581 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
582 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
583 len, vma->vm_page_prot);
584 } else if (dev->nic_info.dpp_unmapped_len &&
585 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
586 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
587 dev->nic_info.dpp_unmapped_len)) &&
588 (len <= dev->nic_info.dpp_unmapped_len)) {
589 if (vma->vm_flags & VM_READ)
590 return -EPERM;
591
592 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
593 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
594 len, vma->vm_page_prot);
595 } else {
596 status = remap_pfn_range(vma, vma->vm_start,
597 vma->vm_pgoff, len, vma->vm_page_prot);
598 }
599 return status;
600 }
601
602 static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
603 struct ib_ucontext *ib_ctx,
604 struct ib_udata *udata)
605 {
606 int status;
607 u64 db_page_addr;
608 u64 dpp_page_addr = 0;
609 u32 db_page_size;
610 struct ocrdma_alloc_pd_uresp rsp;
611 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
612
613 memset(&rsp, 0, sizeof(rsp));
614 rsp.id = pd->id;
615 rsp.dpp_enabled = pd->dpp_enabled;
616 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
617 db_page_size = dev->nic_info.db_page_size;
618
619 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
620 if (status)
621 return status;
622
623 if (pd->dpp_enabled) {
624 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
625 (pd->id * PAGE_SIZE);
626 status = ocrdma_add_mmap(uctx, dpp_page_addr,
627 PAGE_SIZE);
628 if (status)
629 goto dpp_map_err;
630 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
631 rsp.dpp_page_addr_lo = dpp_page_addr;
632 }
633
634 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
635 if (status)
636 goto ucopy_err;
637
638 pd->uctx = uctx;
639 return 0;
640
641 ucopy_err:
642 if (pd->dpp_enabled)
643 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
644 dpp_map_err:
645 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
646 return status;
647 }
648
649 struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
650 struct ib_ucontext *context,
651 struct ib_udata *udata)
652 {
653 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
654 struct ocrdma_pd *pd;
655 struct ocrdma_ucontext *uctx = NULL;
656 int status;
657 u8 is_uctx_pd = false;
658
659 if (udata && context) {
660 uctx = get_ocrdma_ucontext(context);
661 pd = ocrdma_get_ucontext_pd(uctx);
662 if (pd) {
663 is_uctx_pd = true;
664 goto pd_mapping;
665 }
666 }
667
668 pd = _ocrdma_alloc_pd(dev, uctx, udata);
669 if (IS_ERR(pd)) {
670 status = PTR_ERR(pd);
671 goto exit;
672 }
673
674 pd_mapping:
675 if (udata && context) {
676 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
677 if (status)
678 goto err;
679 }
680 return &pd->ibpd;
681
682 err:
683 if (is_uctx_pd) {
684 ocrdma_release_ucontext_pd(uctx);
685 } else {
686 status = _ocrdma_dealloc_pd(dev, pd);
687 }
688 exit:
689 return ERR_PTR(status);
690 }
691
692 int ocrdma_dealloc_pd(struct ib_pd *ibpd)
693 {
694 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
695 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
696 struct ocrdma_ucontext *uctx = NULL;
697 int status = 0;
698 u64 usr_db;
699
700 uctx = pd->uctx;
701 if (uctx) {
702 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
703 (pd->id * PAGE_SIZE);
704 if (pd->dpp_enabled)
705 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
706 usr_db = ocrdma_get_db_addr(dev, pd->id);
707 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
708
709 if (is_ucontext_pd(uctx, pd)) {
710 ocrdma_release_ucontext_pd(uctx);
711 return status;
712 }
713 }
714 status = _ocrdma_dealloc_pd(dev, pd);
715 return status;
716 }
717
718 static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
719 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
720 {
721 int status;
722
723 mr->hwmr.fr_mr = 0;
724 mr->hwmr.local_rd = 1;
725 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
726 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
727 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
728 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
729 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
730 mr->hwmr.num_pbls = num_pbls;
731
732 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
733 if (status)
734 return status;
735
736 mr->ibmr.lkey = mr->hwmr.lkey;
737 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
738 mr->ibmr.rkey = mr->hwmr.lkey;
739 return 0;
740 }
741
742 struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
743 {
744 int status;
745 struct ocrdma_mr *mr;
746 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
747 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
748
749 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
750 pr_err("%s err, invalid access rights\n", __func__);
751 return ERR_PTR(-EINVAL);
752 }
753
754 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
755 if (!mr)
756 return ERR_PTR(-ENOMEM);
757
758 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
759 OCRDMA_ADDR_CHECK_DISABLE);
760 if (status) {
761 kfree(mr);
762 return ERR_PTR(status);
763 }
764
765 return &mr->ibmr;
766 }
767
768 static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
769 struct ocrdma_hw_mr *mr)
770 {
771 struct pci_dev *pdev = dev->nic_info.pdev;
772 int i = 0;
773
774 if (mr->pbl_table) {
775 for (i = 0; i < mr->num_pbls; i++) {
776 if (!mr->pbl_table[i].va)
777 continue;
778 dma_free_coherent(&pdev->dev, mr->pbl_size,
779 mr->pbl_table[i].va,
780 mr->pbl_table[i].pa);
781 }
782 kfree(mr->pbl_table);
783 mr->pbl_table = NULL;
784 }
785 }
786
787 static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
788 u32 num_pbes)
789 {
790 u32 num_pbls = 0;
791 u32 idx = 0;
792 int status = 0;
793 u32 pbl_size;
794
795 do {
796 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
797 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
798 status = -EFAULT;
799 break;
800 }
801 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
802 num_pbls = num_pbls / (pbl_size / sizeof(u64));
803 idx++;
804 } while (num_pbls >= dev->attr.max_num_mr_pbl);
805
806 mr->hwmr.num_pbes = num_pbes;
807 mr->hwmr.num_pbls = num_pbls;
808 mr->hwmr.pbl_size = pbl_size;
809 return status;
810 }
811
812 static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
813 {
814 int status = 0;
815 int i;
816 u32 dma_len = mr->pbl_size;
817 struct pci_dev *pdev = dev->nic_info.pdev;
818 void *va;
819 dma_addr_t pa;
820
821 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
822 mr->num_pbls, GFP_KERNEL);
823
824 if (!mr->pbl_table)
825 return -ENOMEM;
826
827 for (i = 0; i < mr->num_pbls; i++) {
828 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
829 if (!va) {
830 ocrdma_free_mr_pbl_tbl(dev, mr);
831 status = -ENOMEM;
832 break;
833 }
834 memset(va, 0, dma_len);
835 mr->pbl_table[i].va = va;
836 mr->pbl_table[i].pa = pa;
837 }
838 return status;
839 }
840
841 static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
842 u32 num_pbes)
843 {
844 struct ocrdma_pbe *pbe;
845 struct scatterlist *sg;
846 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
847 struct ib_umem *umem = mr->umem;
848 int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0;
849
850 if (!mr->hwmr.num_pbes)
851 return;
852
853 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
854 pbe_cnt = 0;
855
856 shift = ilog2(umem->page_size);
857
858 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
859 pages = sg_dma_len(sg) >> shift;
860 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
861 /* store the page address in pbe */
862 pbe->pa_lo =
863 cpu_to_le32(sg_dma_address
864 (sg) +
865 (umem->page_size * pg_cnt));
866 pbe->pa_hi =
867 cpu_to_le32(upper_32_bits
868 ((sg_dma_address
869 (sg) +
870 umem->page_size * pg_cnt)));
871 pbe_cnt += 1;
872 total_num_pbes += 1;
873 pbe++;
874
875 /* if done building pbes, issue the mbx cmd. */
876 if (total_num_pbes == num_pbes)
877 return;
878
879 /* if the given pbl is full storing the pbes,
880 * move to next pbl.
881 */
882 if (pbe_cnt ==
883 (mr->hwmr.pbl_size / sizeof(u64))) {
884 pbl_tbl++;
885 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
886 pbe_cnt = 0;
887 }
888
889 }
890 }
891 }
892
893 struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
894 u64 usr_addr, int acc, struct ib_udata *udata)
895 {
896 int status = -ENOMEM;
897 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
898 struct ocrdma_mr *mr;
899 struct ocrdma_pd *pd;
900 u32 num_pbes;
901
902 pd = get_ocrdma_pd(ibpd);
903
904 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
905 return ERR_PTR(-EINVAL);
906
907 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
908 if (!mr)
909 return ERR_PTR(status);
910 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
911 if (IS_ERR(mr->umem)) {
912 status = -EFAULT;
913 goto umem_err;
914 }
915 num_pbes = ib_umem_page_count(mr->umem);
916 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
917 if (status)
918 goto umem_err;
919
920 mr->hwmr.pbe_size = mr->umem->page_size;
921 mr->hwmr.fbo = ib_umem_offset(mr->umem);
922 mr->hwmr.va = usr_addr;
923 mr->hwmr.len = len;
924 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
925 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
926 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
927 mr->hwmr.local_rd = 1;
928 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
929 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
930 if (status)
931 goto umem_err;
932 build_user_pbes(dev, mr, num_pbes);
933 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
934 if (status)
935 goto mbx_err;
936 mr->ibmr.lkey = mr->hwmr.lkey;
937 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
938 mr->ibmr.rkey = mr->hwmr.lkey;
939
940 return &mr->ibmr;
941
942 mbx_err:
943 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
944 umem_err:
945 kfree(mr);
946 return ERR_PTR(status);
947 }
948
949 int ocrdma_dereg_mr(struct ib_mr *ib_mr)
950 {
951 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
952 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
953
954 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
955
956 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
957
958 /* it could be user registered memory. */
959 if (mr->umem)
960 ib_umem_release(mr->umem);
961 kfree(mr);
962
963 /* Don't stop cleanup, in case FW is unresponsive */
964 if (dev->mqe_ctx.fw_error_state) {
965 pr_err("%s(%d) fw not responding.\n",
966 __func__, dev->id);
967 }
968 return 0;
969 }
970
971 static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
972 struct ib_udata *udata,
973 struct ib_ucontext *ib_ctx)
974 {
975 int status;
976 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
977 struct ocrdma_create_cq_uresp uresp;
978
979 memset(&uresp, 0, sizeof(uresp));
980 uresp.cq_id = cq->id;
981 uresp.page_size = PAGE_ALIGN(cq->len);
982 uresp.num_pages = 1;
983 uresp.max_hw_cqe = cq->max_hw_cqe;
984 uresp.page_addr[0] = virt_to_phys(cq->va);
985 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
986 uresp.db_page_size = dev->nic_info.db_page_size;
987 uresp.phase_change = cq->phase_change ? 1 : 0;
988 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
989 if (status) {
990 pr_err("%s(%d) copy error cqid=0x%x.\n",
991 __func__, dev->id, cq->id);
992 goto err;
993 }
994 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
995 if (status)
996 goto err;
997 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
998 if (status) {
999 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
1000 goto err;
1001 }
1002 cq->ucontext = uctx;
1003 err:
1004 return status;
1005 }
1006
1007 struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev,
1008 const struct ib_cq_init_attr *attr,
1009 struct ib_ucontext *ib_ctx,
1010 struct ib_udata *udata)
1011 {
1012 int entries = attr->cqe;
1013 struct ocrdma_cq *cq;
1014 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
1015 struct ocrdma_ucontext *uctx = NULL;
1016 u16 pd_id = 0;
1017 int status;
1018 struct ocrdma_create_cq_ureq ureq;
1019
1020 if (attr->flags)
1021 return ERR_PTR(-EINVAL);
1022
1023 if (udata) {
1024 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1025 return ERR_PTR(-EFAULT);
1026 } else
1027 ureq.dpp_cq = 0;
1028 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
1029 if (!cq)
1030 return ERR_PTR(-ENOMEM);
1031
1032 spin_lock_init(&cq->cq_lock);
1033 spin_lock_init(&cq->comp_handler_lock);
1034 INIT_LIST_HEAD(&cq->sq_head);
1035 INIT_LIST_HEAD(&cq->rq_head);
1036 cq->first_arm = true;
1037
1038 if (ib_ctx) {
1039 uctx = get_ocrdma_ucontext(ib_ctx);
1040 pd_id = uctx->cntxt_pd->id;
1041 }
1042
1043 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
1044 if (status) {
1045 kfree(cq);
1046 return ERR_PTR(status);
1047 }
1048 if (ib_ctx) {
1049 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
1050 if (status)
1051 goto ctx_err;
1052 }
1053 cq->phase = OCRDMA_CQE_VALID;
1054 dev->cq_tbl[cq->id] = cq;
1055 return &cq->ibcq;
1056
1057 ctx_err:
1058 ocrdma_mbx_destroy_cq(dev, cq);
1059 kfree(cq);
1060 return ERR_PTR(status);
1061 }
1062
1063 int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
1064 struct ib_udata *udata)
1065 {
1066 int status = 0;
1067 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1068
1069 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
1070 status = -EINVAL;
1071 return status;
1072 }
1073 ibcq->cqe = new_cnt;
1074 return status;
1075 }
1076
1077 static void ocrdma_flush_cq(struct ocrdma_cq *cq)
1078 {
1079 int cqe_cnt;
1080 int valid_count = 0;
1081 unsigned long flags;
1082
1083 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
1084 struct ocrdma_cqe *cqe = NULL;
1085
1086 cqe = cq->va;
1087 cqe_cnt = cq->cqe_cnt;
1088
1089 /* Last irq might have scheduled a polling thread
1090 * sync-up with it before hard flushing.
1091 */
1092 spin_lock_irqsave(&cq->cq_lock, flags);
1093 while (cqe_cnt) {
1094 if (is_cqe_valid(cq, cqe))
1095 valid_count++;
1096 cqe++;
1097 cqe_cnt--;
1098 }
1099 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
1100 spin_unlock_irqrestore(&cq->cq_lock, flags);
1101 }
1102
1103 int ocrdma_destroy_cq(struct ib_cq *ibcq)
1104 {
1105 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1106 struct ocrdma_eq *eq = NULL;
1107 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
1108 int pdid = 0;
1109 u32 irq, indx;
1110
1111 dev->cq_tbl[cq->id] = NULL;
1112 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
1113 if (indx == -EINVAL)
1114 BUG();
1115
1116 eq = &dev->eq_tbl[indx];
1117 irq = ocrdma_get_irq(dev, eq);
1118 synchronize_irq(irq);
1119 ocrdma_flush_cq(cq);
1120
1121 (void)ocrdma_mbx_destroy_cq(dev, cq);
1122 if (cq->ucontext) {
1123 pdid = cq->ucontext->cntxt_pd->id;
1124 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1125 PAGE_ALIGN(cq->len));
1126 ocrdma_del_mmap(cq->ucontext,
1127 ocrdma_get_db_addr(dev, pdid),
1128 dev->nic_info.db_page_size);
1129 }
1130
1131 kfree(cq);
1132 return 0;
1133 }
1134
1135 static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1136 {
1137 int status = -EINVAL;
1138
1139 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1140 dev->qp_tbl[qp->id] = qp;
1141 status = 0;
1142 }
1143 return status;
1144 }
1145
1146 static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1147 {
1148 dev->qp_tbl[qp->id] = NULL;
1149 }
1150
1151 static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1152 struct ib_qp_init_attr *attrs)
1153 {
1154 if ((attrs->qp_type != IB_QPT_GSI) &&
1155 (attrs->qp_type != IB_QPT_RC) &&
1156 (attrs->qp_type != IB_QPT_UC) &&
1157 (attrs->qp_type != IB_QPT_UD)) {
1158 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1159 __func__, dev->id, attrs->qp_type);
1160 return -EINVAL;
1161 }
1162 /* Skip the check for QP1 to support CM size of 128 */
1163 if ((attrs->qp_type != IB_QPT_GSI) &&
1164 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
1165 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1166 __func__, dev->id, attrs->cap.max_send_wr);
1167 pr_err("%s(%d) supported send_wr=0x%x\n",
1168 __func__, dev->id, dev->attr.max_wqe);
1169 return -EINVAL;
1170 }
1171 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
1172 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1173 __func__, dev->id, attrs->cap.max_recv_wr);
1174 pr_err("%s(%d) supported recv_wr=0x%x\n",
1175 __func__, dev->id, dev->attr.max_rqe);
1176 return -EINVAL;
1177 }
1178 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
1179 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1180 __func__, dev->id, attrs->cap.max_inline_data);
1181 pr_err("%s(%d) supported inline data size=0x%x\n",
1182 __func__, dev->id, dev->attr.max_inline_data);
1183 return -EINVAL;
1184 }
1185 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
1186 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1187 __func__, dev->id, attrs->cap.max_send_sge);
1188 pr_err("%s(%d) supported send_sge=0x%x\n",
1189 __func__, dev->id, dev->attr.max_send_sge);
1190 return -EINVAL;
1191 }
1192 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
1193 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1194 __func__, dev->id, attrs->cap.max_recv_sge);
1195 pr_err("%s(%d) supported recv_sge=0x%x\n",
1196 __func__, dev->id, dev->attr.max_recv_sge);
1197 return -EINVAL;
1198 }
1199 /* unprivileged user space cannot create special QP */
1200 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
1201 pr_err
1202 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1203 __func__, dev->id, attrs->qp_type);
1204 return -EINVAL;
1205 }
1206 /* allow creating only one GSI type of QP */
1207 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
1208 pr_err("%s(%d) GSI special QPs already created.\n",
1209 __func__, dev->id);
1210 return -EINVAL;
1211 }
1212 /* verify consumer QPs are not trying to use GSI QP's CQ */
1213 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1214 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
1215 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
1216 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
1217 __func__, dev->id);
1218 return -EINVAL;
1219 }
1220 }
1221 return 0;
1222 }
1223
1224 static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1225 struct ib_udata *udata, int dpp_offset,
1226 int dpp_credit_lmt, int srq)
1227 {
1228 int status = 0;
1229 u64 usr_db;
1230 struct ocrdma_create_qp_uresp uresp;
1231 struct ocrdma_pd *pd = qp->pd;
1232 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
1233
1234 memset(&uresp, 0, sizeof(uresp));
1235 usr_db = dev->nic_info.unmapped_db +
1236 (pd->id * dev->nic_info.db_page_size);
1237 uresp.qp_id = qp->id;
1238 uresp.sq_dbid = qp->sq.dbid;
1239 uresp.num_sq_pages = 1;
1240 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
1241 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
1242 uresp.num_wqe_allocated = qp->sq.max_cnt;
1243 if (!srq) {
1244 uresp.rq_dbid = qp->rq.dbid;
1245 uresp.num_rq_pages = 1;
1246 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
1247 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
1248 uresp.num_rqe_allocated = qp->rq.max_cnt;
1249 }
1250 uresp.db_page_addr = usr_db;
1251 uresp.db_page_size = dev->nic_info.db_page_size;
1252 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1253 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1254 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
1255
1256 if (qp->dpp_enabled) {
1257 uresp.dpp_credit = dpp_credit_lmt;
1258 uresp.dpp_offset = dpp_offset;
1259 }
1260 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1261 if (status) {
1262 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
1263 goto err;
1264 }
1265 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1266 uresp.sq_page_size);
1267 if (status)
1268 goto err;
1269
1270 if (!srq) {
1271 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1272 uresp.rq_page_size);
1273 if (status)
1274 goto rq_map_err;
1275 }
1276 return status;
1277 rq_map_err:
1278 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1279 err:
1280 return status;
1281 }
1282
1283 static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1284 struct ocrdma_pd *pd)
1285 {
1286 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1287 qp->sq_db = dev->nic_info.db +
1288 (pd->id * dev->nic_info.db_page_size) +
1289 OCRDMA_DB_GEN2_SQ_OFFSET;
1290 qp->rq_db = dev->nic_info.db +
1291 (pd->id * dev->nic_info.db_page_size) +
1292 OCRDMA_DB_GEN2_RQ_OFFSET;
1293 } else {
1294 qp->sq_db = dev->nic_info.db +
1295 (pd->id * dev->nic_info.db_page_size) +
1296 OCRDMA_DB_SQ_OFFSET;
1297 qp->rq_db = dev->nic_info.db +
1298 (pd->id * dev->nic_info.db_page_size) +
1299 OCRDMA_DB_RQ_OFFSET;
1300 }
1301 }
1302
1303 static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1304 {
1305 qp->wqe_wr_id_tbl =
1306 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1307 GFP_KERNEL);
1308 if (qp->wqe_wr_id_tbl == NULL)
1309 return -ENOMEM;
1310 qp->rqe_wr_id_tbl =
1311 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1312 if (qp->rqe_wr_id_tbl == NULL)
1313 return -ENOMEM;
1314
1315 return 0;
1316 }
1317
1318 static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1319 struct ocrdma_pd *pd,
1320 struct ib_qp_init_attr *attrs)
1321 {
1322 qp->pd = pd;
1323 spin_lock_init(&qp->q_lock);
1324 INIT_LIST_HEAD(&qp->sq_entry);
1325 INIT_LIST_HEAD(&qp->rq_entry);
1326
1327 qp->qp_type = attrs->qp_type;
1328 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1329 qp->max_inline_data = attrs->cap.max_inline_data;
1330 qp->sq.max_sges = attrs->cap.max_send_sge;
1331 qp->rq.max_sges = attrs->cap.max_recv_sge;
1332 qp->state = OCRDMA_QPS_RST;
1333 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
1334 }
1335
1336 static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1337 struct ib_qp_init_attr *attrs)
1338 {
1339 if (attrs->qp_type == IB_QPT_GSI) {
1340 dev->gsi_qp_created = 1;
1341 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1342 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1343 }
1344 }
1345
1346 struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1347 struct ib_qp_init_attr *attrs,
1348 struct ib_udata *udata)
1349 {
1350 int status;
1351 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1352 struct ocrdma_qp *qp;
1353 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1354 struct ocrdma_create_qp_ureq ureq;
1355 u16 dpp_credit_lmt, dpp_offset;
1356
1357 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1358 if (status)
1359 goto gen_err;
1360
1361 memset(&ureq, 0, sizeof(ureq));
1362 if (udata) {
1363 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1364 return ERR_PTR(-EFAULT);
1365 }
1366 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1367 if (!qp) {
1368 status = -ENOMEM;
1369 goto gen_err;
1370 }
1371 ocrdma_set_qp_init_params(qp, pd, attrs);
1372 if (udata == NULL)
1373 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1374 OCRDMA_QP_FAST_REG);
1375
1376 mutex_lock(&dev->dev_lock);
1377 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1378 ureq.dpp_cq_id,
1379 &dpp_offset, &dpp_credit_lmt);
1380 if (status)
1381 goto mbx_err;
1382
1383 /* user space QP's wr_id table are managed in library */
1384 if (udata == NULL) {
1385 status = ocrdma_alloc_wr_id_tbl(qp);
1386 if (status)
1387 goto map_err;
1388 }
1389
1390 status = ocrdma_add_qpn_map(dev, qp);
1391 if (status)
1392 goto map_err;
1393 ocrdma_set_qp_db(dev, qp, pd);
1394 if (udata) {
1395 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1396 dpp_credit_lmt,
1397 (attrs->srq != NULL));
1398 if (status)
1399 goto cpy_err;
1400 }
1401 ocrdma_store_gsi_qp_cq(dev, attrs);
1402 qp->ibqp.qp_num = qp->id;
1403 mutex_unlock(&dev->dev_lock);
1404 return &qp->ibqp;
1405
1406 cpy_err:
1407 ocrdma_del_qpn_map(dev, qp);
1408 map_err:
1409 ocrdma_mbx_destroy_qp(dev, qp);
1410 mbx_err:
1411 mutex_unlock(&dev->dev_lock);
1412 kfree(qp->wqe_wr_id_tbl);
1413 kfree(qp->rqe_wr_id_tbl);
1414 kfree(qp);
1415 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
1416 gen_err:
1417 return ERR_PTR(status);
1418 }
1419
1420 int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1421 int attr_mask)
1422 {
1423 int status = 0;
1424 struct ocrdma_qp *qp;
1425 struct ocrdma_dev *dev;
1426 enum ib_qp_state old_qps;
1427
1428 qp = get_ocrdma_qp(ibqp);
1429 dev = get_ocrdma_dev(ibqp->device);
1430 if (attr_mask & IB_QP_STATE)
1431 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
1432 /* if new and previous states are same hw doesn't need to
1433 * know about it.
1434 */
1435 if (status < 0)
1436 return status;
1437 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
1438
1439 return status;
1440 }
1441
1442 int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1443 int attr_mask, struct ib_udata *udata)
1444 {
1445 unsigned long flags;
1446 int status = -EINVAL;
1447 struct ocrdma_qp *qp;
1448 struct ocrdma_dev *dev;
1449 enum ib_qp_state old_qps, new_qps;
1450
1451 qp = get_ocrdma_qp(ibqp);
1452 dev = get_ocrdma_dev(ibqp->device);
1453
1454 /* syncronize with multiple context trying to change, retrive qps */
1455 mutex_lock(&dev->dev_lock);
1456 /* syncronize with wqe, rqe posting and cqe processing contexts */
1457 spin_lock_irqsave(&qp->q_lock, flags);
1458 old_qps = get_ibqp_state(qp->state);
1459 if (attr_mask & IB_QP_STATE)
1460 new_qps = attr->qp_state;
1461 else
1462 new_qps = old_qps;
1463 spin_unlock_irqrestore(&qp->q_lock, flags);
1464
1465 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
1466 IB_LINK_LAYER_ETHERNET)) {
1467 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1468 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1469 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1470 old_qps, new_qps);
1471 goto param_err;
1472 }
1473
1474 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1475 if (status > 0)
1476 status = 0;
1477 param_err:
1478 mutex_unlock(&dev->dev_lock);
1479 return status;
1480 }
1481
1482 static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1483 {
1484 switch (mtu) {
1485 case 256:
1486 return IB_MTU_256;
1487 case 512:
1488 return IB_MTU_512;
1489 case 1024:
1490 return IB_MTU_1024;
1491 case 2048:
1492 return IB_MTU_2048;
1493 case 4096:
1494 return IB_MTU_4096;
1495 default:
1496 return IB_MTU_1024;
1497 }
1498 }
1499
1500 static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1501 {
1502 int ib_qp_acc_flags = 0;
1503
1504 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1505 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1506 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1507 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1508 return ib_qp_acc_flags;
1509 }
1510
1511 int ocrdma_query_qp(struct ib_qp *ibqp,
1512 struct ib_qp_attr *qp_attr,
1513 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1514 {
1515 int status;
1516 u32 qp_state;
1517 struct ocrdma_qp_params params;
1518 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1519 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
1520
1521 memset(&params, 0, sizeof(params));
1522 mutex_lock(&dev->dev_lock);
1523 status = ocrdma_mbx_query_qp(dev, qp, &params);
1524 mutex_unlock(&dev->dev_lock);
1525 if (status)
1526 goto mbx_err;
1527 if (qp->qp_type == IB_QPT_UD)
1528 qp_attr->qkey = params.qkey;
1529 qp_attr->path_mtu =
1530 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1531 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1532 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1533 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1534 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1535 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1536 qp_attr->dest_qp_num =
1537 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1538
1539 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1540 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1541 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1542 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1543 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
1544 qp_attr->cap.max_inline_data = qp->max_inline_data;
1545 qp_init_attr->cap = qp_attr->cap;
1546 memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
1547 sizeof(params.dgid));
1548 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
1549 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
1550 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
1551 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
1552 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1553 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
1554 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
1555 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
1556 OCRDMA_QP_PARAMS_TCLASS_SHIFT;
1557
1558 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1559 qp_attr->ah_attr.port_num = 1;
1560 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
1561 OCRDMA_QP_PARAMS_SL_MASK) >>
1562 OCRDMA_QP_PARAMS_SL_SHIFT;
1563 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1564 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1565 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1566 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1567 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1568 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1569 qp_attr->retry_cnt =
1570 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1571 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1572 qp_attr->min_rnr_timer = 0;
1573 qp_attr->pkey_index = 0;
1574 qp_attr->port_num = 1;
1575 qp_attr->ah_attr.src_path_bits = 0;
1576 qp_attr->ah_attr.static_rate = 0;
1577 qp_attr->alt_pkey_index = 0;
1578 qp_attr->alt_port_num = 0;
1579 qp_attr->alt_timeout = 0;
1580 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1581 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1582 OCRDMA_QP_PARAMS_STATE_SHIFT;
1583 qp_attr->qp_state = get_ibqp_state(qp_state);
1584 qp_attr->cur_qp_state = qp_attr->qp_state;
1585 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1586 qp_attr->max_dest_rd_atomic =
1587 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1588 qp_attr->max_rd_atomic =
1589 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1590 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1591 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1592 /* Sync driver QP state with FW */
1593 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
1594 mbx_err:
1595 return status;
1596 }
1597
1598 static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx)
1599 {
1600 unsigned int i = idx / 32;
1601 u32 mask = (1U << (idx % 32));
1602
1603 srq->idx_bit_fields[i] ^= mask;
1604 }
1605
1606 static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1607 {
1608 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
1609 }
1610
1611 static int is_hw_sq_empty(struct ocrdma_qp *qp)
1612 {
1613 return (qp->sq.tail == qp->sq.head);
1614 }
1615
1616 static int is_hw_rq_empty(struct ocrdma_qp *qp)
1617 {
1618 return (qp->rq.tail == qp->rq.head);
1619 }
1620
1621 static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1622 {
1623 return q->va + (q->head * q->entry_size);
1624 }
1625
1626 static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1627 u32 idx)
1628 {
1629 return q->va + (idx * q->entry_size);
1630 }
1631
1632 static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1633 {
1634 q->head = (q->head + 1) & q->max_wqe_idx;
1635 }
1636
1637 static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1638 {
1639 q->tail = (q->tail + 1) & q->max_wqe_idx;
1640 }
1641
1642 /* discard the cqe for a given QP */
1643 static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1644 {
1645 unsigned long cq_flags;
1646 unsigned long flags;
1647 int discard_cnt = 0;
1648 u32 cur_getp, stop_getp;
1649 struct ocrdma_cqe *cqe;
1650 u32 qpn = 0, wqe_idx = 0;
1651
1652 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1653
1654 /* traverse through the CQEs in the hw CQ,
1655 * find the matching CQE for a given qp,
1656 * mark the matching one discarded by clearing qpn.
1657 * ring the doorbell in the poll_cq() as
1658 * we don't complete out of order cqe.
1659 */
1660
1661 cur_getp = cq->getp;
1662 /* find upto when do we reap the cq. */
1663 stop_getp = cur_getp;
1664 do {
1665 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1666 break;
1667
1668 cqe = cq->va + cur_getp;
1669 /* if (a) done reaping whole hw cq, or
1670 * (b) qp_xq becomes empty.
1671 * then exit
1672 */
1673 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1674 /* if previously discarded cqe found, skip that too. */
1675 /* check for matching qp */
1676 if (qpn == 0 || qpn != qp->id)
1677 goto skip_cqe;
1678
1679 if (is_cqe_for_sq(cqe)) {
1680 ocrdma_hwq_inc_tail(&qp->sq);
1681 } else {
1682 if (qp->srq) {
1683 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
1684 OCRDMA_CQE_BUFTAG_SHIFT) &
1685 qp->srq->rq.max_wqe_idx;
1686 if (wqe_idx < 1)
1687 BUG();
1688 spin_lock_irqsave(&qp->srq->q_lock, flags);
1689 ocrdma_hwq_inc_tail(&qp->srq->rq);
1690 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
1691 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1692
1693 } else {
1694 ocrdma_hwq_inc_tail(&qp->rq);
1695 }
1696 }
1697 /* mark cqe discarded so that it is not picked up later
1698 * in the poll_cq().
1699 */
1700 discard_cnt += 1;
1701 cqe->cmn.qpn = 0;
1702 skip_cqe:
1703 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1704 } while (cur_getp != stop_getp);
1705 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1706 }
1707
1708 void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
1709 {
1710 int found = false;
1711 unsigned long flags;
1712 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
1713 /* sync with any active CQ poll */
1714
1715 spin_lock_irqsave(&dev->flush_q_lock, flags);
1716 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1717 if (found)
1718 list_del(&qp->sq_entry);
1719 if (!qp->srq) {
1720 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1721 if (found)
1722 list_del(&qp->rq_entry);
1723 }
1724 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1725 }
1726
1727 int ocrdma_destroy_qp(struct ib_qp *ibqp)
1728 {
1729 struct ocrdma_pd *pd;
1730 struct ocrdma_qp *qp;
1731 struct ocrdma_dev *dev;
1732 struct ib_qp_attr attrs;
1733 int attr_mask = IB_QP_STATE;
1734 unsigned long flags;
1735
1736 qp = get_ocrdma_qp(ibqp);
1737 dev = get_ocrdma_dev(ibqp->device);
1738
1739 attrs.qp_state = IB_QPS_ERR;
1740 pd = qp->pd;
1741
1742 /* change the QP state to ERROR */
1743 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1744
1745 /* ensure that CQEs for newly created QP (whose id may be same with
1746 * one which just getting destroyed are same), dont get
1747 * discarded until the old CQEs are discarded.
1748 */
1749 mutex_lock(&dev->dev_lock);
1750 (void) ocrdma_mbx_destroy_qp(dev, qp);
1751
1752 /*
1753 * acquire CQ lock while destroy is in progress, in order to
1754 * protect against proessing in-flight CQEs for this QP.
1755 */
1756 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
1757 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1758 spin_lock(&qp->rq_cq->cq_lock);
1759
1760 ocrdma_del_qpn_map(dev, qp);
1761
1762 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1763 spin_unlock(&qp->rq_cq->cq_lock);
1764 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
1765
1766 if (!pd->uctx) {
1767 ocrdma_discard_cqes(qp, qp->sq_cq);
1768 ocrdma_discard_cqes(qp, qp->rq_cq);
1769 }
1770 mutex_unlock(&dev->dev_lock);
1771
1772 if (pd->uctx) {
1773 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1774 PAGE_ALIGN(qp->sq.len));
1775 if (!qp->srq)
1776 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1777 PAGE_ALIGN(qp->rq.len));
1778 }
1779
1780 ocrdma_del_flush_qp(qp);
1781
1782 kfree(qp->wqe_wr_id_tbl);
1783 kfree(qp->rqe_wr_id_tbl);
1784 kfree(qp);
1785 return 0;
1786 }
1787
1788 static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1789 struct ib_udata *udata)
1790 {
1791 int status;
1792 struct ocrdma_create_srq_uresp uresp;
1793
1794 memset(&uresp, 0, sizeof(uresp));
1795 uresp.rq_dbid = srq->rq.dbid;
1796 uresp.num_rq_pages = 1;
1797 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
1798 uresp.rq_page_size = srq->rq.len;
1799 uresp.db_page_addr = dev->nic_info.unmapped_db +
1800 (srq->pd->id * dev->nic_info.db_page_size);
1801 uresp.db_page_size = dev->nic_info.db_page_size;
1802 uresp.num_rqe_allocated = srq->rq.max_cnt;
1803 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1804 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1805 uresp.db_shift = 24;
1806 } else {
1807 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1808 uresp.db_shift = 16;
1809 }
1810
1811 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1812 if (status)
1813 return status;
1814 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1815 uresp.rq_page_size);
1816 if (status)
1817 return status;
1818 return status;
1819 }
1820
1821 struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1822 struct ib_srq_init_attr *init_attr,
1823 struct ib_udata *udata)
1824 {
1825 int status = -ENOMEM;
1826 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1827 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1828 struct ocrdma_srq *srq;
1829
1830 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1831 return ERR_PTR(-EINVAL);
1832 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1833 return ERR_PTR(-EINVAL);
1834
1835 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1836 if (!srq)
1837 return ERR_PTR(status);
1838
1839 spin_lock_init(&srq->q_lock);
1840 srq->pd = pd;
1841 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1842 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
1843 if (status)
1844 goto err;
1845
1846 if (udata == NULL) {
1847 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1848 GFP_KERNEL);
1849 if (srq->rqe_wr_id_tbl == NULL)
1850 goto arm_err;
1851
1852 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1853 (srq->rq.max_cnt % 32 ? 1 : 0);
1854 srq->idx_bit_fields =
1855 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1856 if (srq->idx_bit_fields == NULL)
1857 goto arm_err;
1858 memset(srq->idx_bit_fields, 0xff,
1859 srq->bit_fields_len * sizeof(u32));
1860 }
1861
1862 if (init_attr->attr.srq_limit) {
1863 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1864 if (status)
1865 goto arm_err;
1866 }
1867
1868 if (udata) {
1869 status = ocrdma_copy_srq_uresp(dev, srq, udata);
1870 if (status)
1871 goto arm_err;
1872 }
1873
1874 return &srq->ibsrq;
1875
1876 arm_err:
1877 ocrdma_mbx_destroy_srq(dev, srq);
1878 err:
1879 kfree(srq->rqe_wr_id_tbl);
1880 kfree(srq->idx_bit_fields);
1881 kfree(srq);
1882 return ERR_PTR(status);
1883 }
1884
1885 int ocrdma_modify_srq(struct ib_srq *ibsrq,
1886 struct ib_srq_attr *srq_attr,
1887 enum ib_srq_attr_mask srq_attr_mask,
1888 struct ib_udata *udata)
1889 {
1890 int status = 0;
1891 struct ocrdma_srq *srq;
1892
1893 srq = get_ocrdma_srq(ibsrq);
1894 if (srq_attr_mask & IB_SRQ_MAX_WR)
1895 status = -EINVAL;
1896 else
1897 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1898 return status;
1899 }
1900
1901 int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1902 {
1903 int status;
1904 struct ocrdma_srq *srq;
1905
1906 srq = get_ocrdma_srq(ibsrq);
1907 status = ocrdma_mbx_query_srq(srq, srq_attr);
1908 return status;
1909 }
1910
1911 int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1912 {
1913 int status;
1914 struct ocrdma_srq *srq;
1915 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
1916
1917 srq = get_ocrdma_srq(ibsrq);
1918
1919 status = ocrdma_mbx_destroy_srq(dev, srq);
1920
1921 if (srq->pd->uctx)
1922 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1923 PAGE_ALIGN(srq->rq.len));
1924
1925 kfree(srq->idx_bit_fields);
1926 kfree(srq->rqe_wr_id_tbl);
1927 kfree(srq);
1928 return status;
1929 }
1930
1931 /* unprivileged verbs and their support functions. */
1932 static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1933 struct ocrdma_hdr_wqe *hdr,
1934 struct ib_send_wr *wr)
1935 {
1936 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1937 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
1938 struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
1939
1940 ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
1941 if (qp->qp_type == IB_QPT_GSI)
1942 ud_hdr->qkey = qp->qkey;
1943 else
1944 ud_hdr->qkey = wr->wr.ud.remote_qkey;
1945 ud_hdr->rsvd_ahid = ah->id;
1946 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
1947 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
1948 }
1949
1950 static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
1951 struct ocrdma_sge *sge, int num_sge,
1952 struct ib_sge *sg_list)
1953 {
1954 int i;
1955
1956 for (i = 0; i < num_sge; i++) {
1957 sge[i].lrkey = sg_list[i].lkey;
1958 sge[i].addr_lo = sg_list[i].addr;
1959 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
1960 sge[i].len = sg_list[i].length;
1961 hdr->total_len += sg_list[i].length;
1962 }
1963 if (num_sge == 0)
1964 memset(sge, 0, sizeof(*sge));
1965 }
1966
1967 static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
1968 {
1969 uint32_t total_len = 0, i;
1970
1971 for (i = 0; i < num_sge; i++)
1972 total_len += sg_list[i].length;
1973 return total_len;
1974 }
1975
1976
1977 static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
1978 struct ocrdma_hdr_wqe *hdr,
1979 struct ocrdma_sge *sge,
1980 struct ib_send_wr *wr, u32 wqe_size)
1981 {
1982 int i;
1983 char *dpp_addr;
1984
1985 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
1986 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
1987 if (unlikely(hdr->total_len > qp->max_inline_data)) {
1988 pr_err("%s() supported_len=0x%x,\n"
1989 " unsupported len req=0x%x\n", __func__,
1990 qp->max_inline_data, hdr->total_len);
1991 return -EINVAL;
1992 }
1993 dpp_addr = (char *)sge;
1994 for (i = 0; i < wr->num_sge; i++) {
1995 memcpy(dpp_addr,
1996 (void *)(unsigned long)wr->sg_list[i].addr,
1997 wr->sg_list[i].length);
1998 dpp_addr += wr->sg_list[i].length;
1999 }
2000
2001 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
2002 if (0 == hdr->total_len)
2003 wqe_size += sizeof(struct ocrdma_sge);
2004 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
2005 } else {
2006 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2007 if (wr->num_sge)
2008 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
2009 else
2010 wqe_size += sizeof(struct ocrdma_sge);
2011 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2012 }
2013 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2014 return 0;
2015 }
2016
2017 static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2018 struct ib_send_wr *wr)
2019 {
2020 int status;
2021 struct ocrdma_sge *sge;
2022 u32 wqe_size = sizeof(*hdr);
2023
2024 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2025 ocrdma_build_ud_hdr(qp, hdr, wr);
2026 sge = (struct ocrdma_sge *)(hdr + 2);
2027 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
2028 } else {
2029 sge = (struct ocrdma_sge *)(hdr + 1);
2030 }
2031
2032 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2033 return status;
2034 }
2035
2036 static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2037 struct ib_send_wr *wr)
2038 {
2039 int status;
2040 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2041 struct ocrdma_sge *sge = ext_rw + 1;
2042 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
2043
2044 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2045 if (status)
2046 return status;
2047 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
2048 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
2049 ext_rw->lrkey = wr->wr.rdma.rkey;
2050 ext_rw->len = hdr->total_len;
2051 return 0;
2052 }
2053
2054 static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2055 struct ib_send_wr *wr)
2056 {
2057 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2058 struct ocrdma_sge *sge = ext_rw + 1;
2059 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
2060 sizeof(struct ocrdma_hdr_wqe);
2061
2062 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2063 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2064 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
2065 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2066
2067 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
2068 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
2069 ext_rw->lrkey = wr->wr.rdma.rkey;
2070 ext_rw->len = hdr->total_len;
2071 }
2072
2073 static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl,
2074 struct ocrdma_hw_mr *hwmr)
2075 {
2076 int i;
2077 u64 buf_addr = 0;
2078 int num_pbes;
2079 struct ocrdma_pbe *pbe;
2080
2081 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2082 num_pbes = 0;
2083
2084 /* go through the OS phy regions & fill hw pbe entries into pbls. */
2085 for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) {
2086 /* number of pbes can be more for one OS buf, when
2087 * buffers are of different sizes.
2088 * split the ib_buf to one or more pbes.
2089 */
2090 buf_addr = wr->wr.fast_reg.page_list->page_list[i];
2091 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2092 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
2093 num_pbes += 1;
2094 pbe++;
2095
2096 /* if the pbl is full storing the pbes,
2097 * move to next pbl.
2098 */
2099 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
2100 pbl_tbl++;
2101 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2102 }
2103 }
2104 return;
2105 }
2106
2107 static int get_encoded_page_size(int pg_sz)
2108 {
2109 /* Max size is 256M 4096 << 16 */
2110 int i = 0;
2111 for (; i < 17; i++)
2112 if (pg_sz == (4096 << i))
2113 break;
2114 return i;
2115 }
2116
2117
2118 static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2119 struct ib_send_wr *wr)
2120 {
2121 u64 fbo;
2122 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2123 struct ocrdma_mr *mr;
2124 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2125 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2126
2127 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2128
2129 if (wr->wr.fast_reg.page_list_len > dev->attr.max_pages_per_frmr)
2130 return -EINVAL;
2131
2132 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2133 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2134
2135 if (wr->wr.fast_reg.page_list_len == 0)
2136 BUG();
2137 if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE)
2138 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2139 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE)
2140 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2141 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ)
2142 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2143 hdr->lkey = wr->wr.fast_reg.rkey;
2144 hdr->total_len = wr->wr.fast_reg.length;
2145
2146 fbo = wr->wr.fast_reg.iova_start -
2147 (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK);
2148
2149 fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start);
2150 fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff);
2151 fast_reg->fbo_hi = upper_32_bits(fbo);
2152 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2153 fast_reg->num_sges = wr->wr.fast_reg.page_list_len;
2154 fast_reg->size_sge =
2155 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
2156 mr = (struct ocrdma_mr *) (unsigned long)
2157 dev->stag_arr[(hdr->lkey >> 8) & (OCRDMA_MAX_STAG - 1)];
2158 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
2159 return 0;
2160 }
2161
2162 static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2163 {
2164 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
2165
2166 iowrite32(val, qp->sq_db);
2167 }
2168
2169 int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2170 struct ib_send_wr **bad_wr)
2171 {
2172 int status = 0;
2173 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2174 struct ocrdma_hdr_wqe *hdr;
2175 unsigned long flags;
2176
2177 spin_lock_irqsave(&qp->q_lock, flags);
2178 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2179 spin_unlock_irqrestore(&qp->q_lock, flags);
2180 *bad_wr = wr;
2181 return -EINVAL;
2182 }
2183
2184 while (wr) {
2185 if (qp->qp_type == IB_QPT_UD &&
2186 (wr->opcode != IB_WR_SEND &&
2187 wr->opcode != IB_WR_SEND_WITH_IMM)) {
2188 *bad_wr = wr;
2189 status = -EINVAL;
2190 break;
2191 }
2192 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2193 wr->num_sge > qp->sq.max_sges) {
2194 *bad_wr = wr;
2195 status = -ENOMEM;
2196 break;
2197 }
2198 hdr = ocrdma_hwq_head(&qp->sq);
2199 hdr->cw = 0;
2200 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2201 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2202 if (wr->send_flags & IB_SEND_FENCE)
2203 hdr->cw |=
2204 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2205 if (wr->send_flags & IB_SEND_SOLICITED)
2206 hdr->cw |=
2207 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2208 hdr->total_len = 0;
2209 switch (wr->opcode) {
2210 case IB_WR_SEND_WITH_IMM:
2211 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2212 hdr->immdt = ntohl(wr->ex.imm_data);
2213 case IB_WR_SEND:
2214 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2215 ocrdma_build_send(qp, hdr, wr);
2216 break;
2217 case IB_WR_SEND_WITH_INV:
2218 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2219 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2220 hdr->lkey = wr->ex.invalidate_rkey;
2221 status = ocrdma_build_send(qp, hdr, wr);
2222 break;
2223 case IB_WR_RDMA_WRITE_WITH_IMM:
2224 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2225 hdr->immdt = ntohl(wr->ex.imm_data);
2226 case IB_WR_RDMA_WRITE:
2227 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2228 status = ocrdma_build_write(qp, hdr, wr);
2229 break;
2230 case IB_WR_RDMA_READ:
2231 ocrdma_build_read(qp, hdr, wr);
2232 break;
2233 case IB_WR_LOCAL_INV:
2234 hdr->cw |=
2235 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
2236 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2237 sizeof(struct ocrdma_sge)) /
2238 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2239 hdr->lkey = wr->ex.invalidate_rkey;
2240 break;
2241 case IB_WR_FAST_REG_MR:
2242 status = ocrdma_build_fr(qp, hdr, wr);
2243 break;
2244 default:
2245 status = -EINVAL;
2246 break;
2247 }
2248 if (status) {
2249 *bad_wr = wr;
2250 break;
2251 }
2252 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2253 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2254 else
2255 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2256 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2257 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2258 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2259 /* make sure wqe is written before adapter can access it */
2260 wmb();
2261 /* inform hw to start processing it */
2262 ocrdma_ring_sq_db(qp);
2263
2264 /* update pointer, counter for next wr */
2265 ocrdma_hwq_inc_head(&qp->sq);
2266 wr = wr->next;
2267 }
2268 spin_unlock_irqrestore(&qp->q_lock, flags);
2269 return status;
2270 }
2271
2272 static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2273 {
2274 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
2275
2276 iowrite32(val, qp->rq_db);
2277 }
2278
2279 static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2280 u16 tag)
2281 {
2282 u32 wqe_size = 0;
2283 struct ocrdma_sge *sge;
2284 if (wr->num_sge)
2285 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2286 else
2287 wqe_size = sizeof(*sge) + sizeof(*rqe);
2288
2289 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2290 OCRDMA_WQE_SIZE_SHIFT);
2291 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2292 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2293 rqe->total_len = 0;
2294 rqe->rsvd_tag = tag;
2295 sge = (struct ocrdma_sge *)(rqe + 1);
2296 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2297 ocrdma_cpu_to_le32(rqe, wqe_size);
2298 }
2299
2300 int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2301 struct ib_recv_wr **bad_wr)
2302 {
2303 int status = 0;
2304 unsigned long flags;
2305 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2306 struct ocrdma_hdr_wqe *rqe;
2307
2308 spin_lock_irqsave(&qp->q_lock, flags);
2309 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2310 spin_unlock_irqrestore(&qp->q_lock, flags);
2311 *bad_wr = wr;
2312 return -EINVAL;
2313 }
2314 while (wr) {
2315 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2316 wr->num_sge > qp->rq.max_sges) {
2317 *bad_wr = wr;
2318 status = -ENOMEM;
2319 break;
2320 }
2321 rqe = ocrdma_hwq_head(&qp->rq);
2322 ocrdma_build_rqe(rqe, wr, 0);
2323
2324 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2325 /* make sure rqe is written before adapter can access it */
2326 wmb();
2327
2328 /* inform hw to start processing it */
2329 ocrdma_ring_rq_db(qp);
2330
2331 /* update pointer, counter for next wr */
2332 ocrdma_hwq_inc_head(&qp->rq);
2333 wr = wr->next;
2334 }
2335 spin_unlock_irqrestore(&qp->q_lock, flags);
2336 return status;
2337 }
2338
2339 /* cqe for srq's rqe can potentially arrive out of order.
2340 * index gives the entry in the shadow table where to store
2341 * the wr_id. tag/index is returned in cqe to reference back
2342 * for a given rqe.
2343 */
2344 static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2345 {
2346 int row = 0;
2347 int indx = 0;
2348
2349 for (row = 0; row < srq->bit_fields_len; row++) {
2350 if (srq->idx_bit_fields[row]) {
2351 indx = ffs(srq->idx_bit_fields[row]);
2352 indx = (row * 32) + (indx - 1);
2353 if (indx >= srq->rq.max_cnt)
2354 BUG();
2355 ocrdma_srq_toggle_bit(srq, indx);
2356 break;
2357 }
2358 }
2359
2360 if (row == srq->bit_fields_len)
2361 BUG();
2362 return indx + 1; /* Use from index 1 */
2363 }
2364
2365 static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2366 {
2367 u32 val = srq->rq.dbid | (1 << 16);
2368
2369 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2370 }
2371
2372 int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2373 struct ib_recv_wr **bad_wr)
2374 {
2375 int status = 0;
2376 unsigned long flags;
2377 struct ocrdma_srq *srq;
2378 struct ocrdma_hdr_wqe *rqe;
2379 u16 tag;
2380
2381 srq = get_ocrdma_srq(ibsrq);
2382
2383 spin_lock_irqsave(&srq->q_lock, flags);
2384 while (wr) {
2385 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2386 wr->num_sge > srq->rq.max_sges) {
2387 status = -ENOMEM;
2388 *bad_wr = wr;
2389 break;
2390 }
2391 tag = ocrdma_srq_get_idx(srq);
2392 rqe = ocrdma_hwq_head(&srq->rq);
2393 ocrdma_build_rqe(rqe, wr, tag);
2394
2395 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2396 /* make sure rqe is written before adapter can perform DMA */
2397 wmb();
2398 /* inform hw to start processing it */
2399 ocrdma_ring_srq_db(srq);
2400 /* update pointer, counter for next wr */
2401 ocrdma_hwq_inc_head(&srq->rq);
2402 wr = wr->next;
2403 }
2404 spin_unlock_irqrestore(&srq->q_lock, flags);
2405 return status;
2406 }
2407
2408 static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2409 {
2410 enum ib_wc_status ibwc_status;
2411
2412 switch (status) {
2413 case OCRDMA_CQE_GENERAL_ERR:
2414 ibwc_status = IB_WC_GENERAL_ERR;
2415 break;
2416 case OCRDMA_CQE_LOC_LEN_ERR:
2417 ibwc_status = IB_WC_LOC_LEN_ERR;
2418 break;
2419 case OCRDMA_CQE_LOC_QP_OP_ERR:
2420 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2421 break;
2422 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2423 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2424 break;
2425 case OCRDMA_CQE_LOC_PROT_ERR:
2426 ibwc_status = IB_WC_LOC_PROT_ERR;
2427 break;
2428 case OCRDMA_CQE_WR_FLUSH_ERR:
2429 ibwc_status = IB_WC_WR_FLUSH_ERR;
2430 break;
2431 case OCRDMA_CQE_MW_BIND_ERR:
2432 ibwc_status = IB_WC_MW_BIND_ERR;
2433 break;
2434 case OCRDMA_CQE_BAD_RESP_ERR:
2435 ibwc_status = IB_WC_BAD_RESP_ERR;
2436 break;
2437 case OCRDMA_CQE_LOC_ACCESS_ERR:
2438 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2439 break;
2440 case OCRDMA_CQE_REM_INV_REQ_ERR:
2441 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2442 break;
2443 case OCRDMA_CQE_REM_ACCESS_ERR:
2444 ibwc_status = IB_WC_REM_ACCESS_ERR;
2445 break;
2446 case OCRDMA_CQE_REM_OP_ERR:
2447 ibwc_status = IB_WC_REM_OP_ERR;
2448 break;
2449 case OCRDMA_CQE_RETRY_EXC_ERR:
2450 ibwc_status = IB_WC_RETRY_EXC_ERR;
2451 break;
2452 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2453 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2454 break;
2455 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2456 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2457 break;
2458 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2459 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2460 break;
2461 case OCRDMA_CQE_REM_ABORT_ERR:
2462 ibwc_status = IB_WC_REM_ABORT_ERR;
2463 break;
2464 case OCRDMA_CQE_INV_EECN_ERR:
2465 ibwc_status = IB_WC_INV_EECN_ERR;
2466 break;
2467 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2468 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2469 break;
2470 case OCRDMA_CQE_FATAL_ERR:
2471 ibwc_status = IB_WC_FATAL_ERR;
2472 break;
2473 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2474 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2475 break;
2476 default:
2477 ibwc_status = IB_WC_GENERAL_ERR;
2478 break;
2479 }
2480 return ibwc_status;
2481 }
2482
2483 static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2484 u32 wqe_idx)
2485 {
2486 struct ocrdma_hdr_wqe *hdr;
2487 struct ocrdma_sge *rw;
2488 int opcode;
2489
2490 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2491
2492 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2493 /* Undo the hdr->cw swap */
2494 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2495 switch (opcode) {
2496 case OCRDMA_WRITE:
2497 ibwc->opcode = IB_WC_RDMA_WRITE;
2498 break;
2499 case OCRDMA_READ:
2500 rw = (struct ocrdma_sge *)(hdr + 1);
2501 ibwc->opcode = IB_WC_RDMA_READ;
2502 ibwc->byte_len = rw->len;
2503 break;
2504 case OCRDMA_SEND:
2505 ibwc->opcode = IB_WC_SEND;
2506 break;
2507 case OCRDMA_FR_MR:
2508 ibwc->opcode = IB_WC_FAST_REG_MR;
2509 break;
2510 case OCRDMA_LKEY_INV:
2511 ibwc->opcode = IB_WC_LOCAL_INV;
2512 break;
2513 default:
2514 ibwc->status = IB_WC_GENERAL_ERR;
2515 pr_err("%s() invalid opcode received = 0x%x\n",
2516 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
2517 break;
2518 }
2519 }
2520
2521 static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2522 struct ocrdma_cqe *cqe)
2523 {
2524 if (is_cqe_for_sq(cqe)) {
2525 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2526 cqe->flags_status_srcqpn) &
2527 ~OCRDMA_CQE_STATUS_MASK);
2528 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2529 cqe->flags_status_srcqpn) |
2530 (OCRDMA_CQE_WR_FLUSH_ERR <<
2531 OCRDMA_CQE_STATUS_SHIFT));
2532 } else {
2533 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2534 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2535 cqe->flags_status_srcqpn) &
2536 ~OCRDMA_CQE_UD_STATUS_MASK);
2537 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2538 cqe->flags_status_srcqpn) |
2539 (OCRDMA_CQE_WR_FLUSH_ERR <<
2540 OCRDMA_CQE_UD_STATUS_SHIFT));
2541 } else {
2542 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2543 cqe->flags_status_srcqpn) &
2544 ~OCRDMA_CQE_STATUS_MASK);
2545 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2546 cqe->flags_status_srcqpn) |
2547 (OCRDMA_CQE_WR_FLUSH_ERR <<
2548 OCRDMA_CQE_STATUS_SHIFT));
2549 }
2550 }
2551 }
2552
2553 static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2554 struct ocrdma_qp *qp, int status)
2555 {
2556 bool expand = false;
2557
2558 ibwc->byte_len = 0;
2559 ibwc->qp = &qp->ibqp;
2560 ibwc->status = ocrdma_to_ibwc_err(status);
2561
2562 ocrdma_flush_qp(qp);
2563 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
2564
2565 /* if wqe/rqe pending for which cqe needs to be returned,
2566 * trigger inflating it.
2567 */
2568 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2569 expand = true;
2570 ocrdma_set_cqe_status_flushed(qp, cqe);
2571 }
2572 return expand;
2573 }
2574
2575 static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2576 struct ocrdma_qp *qp, int status)
2577 {
2578 ibwc->opcode = IB_WC_RECV;
2579 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2580 ocrdma_hwq_inc_tail(&qp->rq);
2581
2582 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2583 }
2584
2585 static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2586 struct ocrdma_qp *qp, int status)
2587 {
2588 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2589 ocrdma_hwq_inc_tail(&qp->sq);
2590
2591 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2592 }
2593
2594
2595 static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2596 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2597 bool *polled, bool *stop)
2598 {
2599 bool expand;
2600 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2601 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2602 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2603 if (status < OCRDMA_MAX_CQE_ERR)
2604 atomic_inc(&dev->cqe_err_stats[status]);
2605
2606 /* when hw sq is empty, but rq is not empty, so we continue
2607 * to keep the cqe in order to get the cq event again.
2608 */
2609 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2610 /* when cq for rq and sq is same, it is safe to return
2611 * flush cqe for RQEs.
2612 */
2613 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2614 *polled = true;
2615 status = OCRDMA_CQE_WR_FLUSH_ERR;
2616 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2617 } else {
2618 /* stop processing further cqe as this cqe is used for
2619 * triggering cq event on buddy cq of RQ.
2620 * When QP is destroyed, this cqe will be removed
2621 * from the cq's hardware q.
2622 */
2623 *polled = false;
2624 *stop = true;
2625 expand = false;
2626 }
2627 } else if (is_hw_sq_empty(qp)) {
2628 /* Do nothing */
2629 expand = false;
2630 *polled = false;
2631 *stop = false;
2632 } else {
2633 *polled = true;
2634 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2635 }
2636 return expand;
2637 }
2638
2639 static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2640 struct ocrdma_cqe *cqe,
2641 struct ib_wc *ibwc, bool *polled)
2642 {
2643 bool expand = false;
2644 int tail = qp->sq.tail;
2645 u32 wqe_idx;
2646
2647 if (!qp->wqe_wr_id_tbl[tail].signaled) {
2648 *polled = false; /* WC cannot be consumed yet */
2649 } else {
2650 ibwc->status = IB_WC_SUCCESS;
2651 ibwc->wc_flags = 0;
2652 ibwc->qp = &qp->ibqp;
2653 ocrdma_update_wc(qp, ibwc, tail);
2654 *polled = true;
2655 }
2656 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2657 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
2658 if (tail != wqe_idx)
2659 expand = true; /* Coalesced CQE can't be consumed yet */
2660
2661 ocrdma_hwq_inc_tail(&qp->sq);
2662 return expand;
2663 }
2664
2665 static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2666 struct ib_wc *ibwc, bool *polled, bool *stop)
2667 {
2668 int status;
2669 bool expand;
2670
2671 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2672 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2673
2674 if (status == OCRDMA_CQE_SUCCESS)
2675 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2676 else
2677 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2678 return expand;
2679 }
2680
2681 static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
2682 {
2683 int status;
2684
2685 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2686 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2687 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2688 OCRDMA_CQE_SRCQP_MASK;
2689 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
2690 OCRDMA_CQE_PKEY_MASK;
2691 ibwc->wc_flags = IB_WC_GRH;
2692 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2693 OCRDMA_CQE_UD_XFER_LEN_SHIFT);
2694 return status;
2695 }
2696
2697 static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2698 struct ocrdma_cqe *cqe,
2699 struct ocrdma_qp *qp)
2700 {
2701 unsigned long flags;
2702 struct ocrdma_srq *srq;
2703 u32 wqe_idx;
2704
2705 srq = get_ocrdma_srq(qp->ibqp.srq);
2706 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
2707 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
2708 if (wqe_idx < 1)
2709 BUG();
2710
2711 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2712 spin_lock_irqsave(&srq->q_lock, flags);
2713 ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
2714 spin_unlock_irqrestore(&srq->q_lock, flags);
2715 ocrdma_hwq_inc_tail(&srq->rq);
2716 }
2717
2718 static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2719 struct ib_wc *ibwc, bool *polled, bool *stop,
2720 int status)
2721 {
2722 bool expand;
2723 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2724
2725 if (status < OCRDMA_MAX_CQE_ERR)
2726 atomic_inc(&dev->cqe_err_stats[status]);
2727
2728 /* when hw_rq is empty, but wq is not empty, so continue
2729 * to keep the cqe to get the cq event again.
2730 */
2731 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2732 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2733 *polled = true;
2734 status = OCRDMA_CQE_WR_FLUSH_ERR;
2735 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2736 } else {
2737 *polled = false;
2738 *stop = true;
2739 expand = false;
2740 }
2741 } else if (is_hw_rq_empty(qp)) {
2742 /* Do nothing */
2743 expand = false;
2744 *polled = false;
2745 *stop = false;
2746 } else {
2747 *polled = true;
2748 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2749 }
2750 return expand;
2751 }
2752
2753 static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2754 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2755 {
2756 ibwc->opcode = IB_WC_RECV;
2757 ibwc->qp = &qp->ibqp;
2758 ibwc->status = IB_WC_SUCCESS;
2759
2760 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2761 ocrdma_update_ud_rcqe(ibwc, cqe);
2762 else
2763 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2764
2765 if (is_cqe_imm(cqe)) {
2766 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2767 ibwc->wc_flags |= IB_WC_WITH_IMM;
2768 } else if (is_cqe_wr_imm(cqe)) {
2769 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2770 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2771 ibwc->wc_flags |= IB_WC_WITH_IMM;
2772 } else if (is_cqe_invalidated(cqe)) {
2773 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2774 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2775 }
2776 if (qp->ibqp.srq) {
2777 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
2778 } else {
2779 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2780 ocrdma_hwq_inc_tail(&qp->rq);
2781 }
2782 }
2783
2784 static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2785 struct ib_wc *ibwc, bool *polled, bool *stop)
2786 {
2787 int status;
2788 bool expand = false;
2789
2790 ibwc->wc_flags = 0;
2791 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2792 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2793 OCRDMA_CQE_UD_STATUS_MASK) >>
2794 OCRDMA_CQE_UD_STATUS_SHIFT;
2795 } else {
2796 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2797 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2798 }
2799
2800 if (status == OCRDMA_CQE_SUCCESS) {
2801 *polled = true;
2802 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2803 } else {
2804 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2805 status);
2806 }
2807 return expand;
2808 }
2809
2810 static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2811 u16 cur_getp)
2812 {
2813 if (cq->phase_change) {
2814 if (cur_getp == 0)
2815 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
2816 } else {
2817 /* clear valid bit */
2818 cqe->flags_status_srcqpn = 0;
2819 }
2820 }
2821
2822 static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2823 struct ib_wc *ibwc)
2824 {
2825 u16 qpn = 0;
2826 int i = 0;
2827 bool expand = false;
2828 int polled_hw_cqes = 0;
2829 struct ocrdma_qp *qp = NULL;
2830 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
2831 struct ocrdma_cqe *cqe;
2832 u16 cur_getp; bool polled = false; bool stop = false;
2833
2834 cur_getp = cq->getp;
2835 while (num_entries) {
2836 cqe = cq->va + cur_getp;
2837 /* check whether valid cqe or not */
2838 if (!is_cqe_valid(cq, cqe))
2839 break;
2840 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2841 /* ignore discarded cqe */
2842 if (qpn == 0)
2843 goto skip_cqe;
2844 qp = dev->qp_tbl[qpn];
2845 BUG_ON(qp == NULL);
2846
2847 if (is_cqe_for_sq(cqe)) {
2848 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2849 &stop);
2850 } else {
2851 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2852 &stop);
2853 }
2854 if (expand)
2855 goto expand_cqe;
2856 if (stop)
2857 goto stop_cqe;
2858 /* clear qpn to avoid duplicate processing by discard_cqe() */
2859 cqe->cmn.qpn = 0;
2860 skip_cqe:
2861 polled_hw_cqes += 1;
2862 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2863 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2864 expand_cqe:
2865 if (polled) {
2866 num_entries -= 1;
2867 i += 1;
2868 ibwc = ibwc + 1;
2869 polled = false;
2870 }
2871 }
2872 stop_cqe:
2873 cq->getp = cur_getp;
2874 if (cq->deferred_arm) {
2875 ocrdma_ring_cq_db(dev, cq->id, true, cq->deferred_sol,
2876 polled_hw_cqes);
2877 cq->deferred_arm = false;
2878 cq->deferred_sol = false;
2879 } else {
2880 /* We need to pop the CQE. No need to arm */
2881 ocrdma_ring_cq_db(dev, cq->id, false, cq->deferred_sol,
2882 polled_hw_cqes);
2883 cq->deferred_sol = false;
2884 }
2885
2886 return i;
2887 }
2888
2889 /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2890 static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2891 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2892 {
2893 int err_cqes = 0;
2894
2895 while (num_entries) {
2896 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2897 break;
2898 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2899 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2900 ocrdma_hwq_inc_tail(&qp->sq);
2901 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2902 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2903 ocrdma_hwq_inc_tail(&qp->rq);
2904 } else {
2905 return err_cqes;
2906 }
2907 ibwc->byte_len = 0;
2908 ibwc->status = IB_WC_WR_FLUSH_ERR;
2909 ibwc = ibwc + 1;
2910 err_cqes += 1;
2911 num_entries -= 1;
2912 }
2913 return err_cqes;
2914 }
2915
2916 int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2917 {
2918 int cqes_to_poll = num_entries;
2919 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2920 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2921 int num_os_cqe = 0, err_cqes = 0;
2922 struct ocrdma_qp *qp;
2923 unsigned long flags;
2924
2925 /* poll cqes from adapter CQ */
2926 spin_lock_irqsave(&cq->cq_lock, flags);
2927 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2928 spin_unlock_irqrestore(&cq->cq_lock, flags);
2929 cqes_to_poll -= num_os_cqe;
2930
2931 if (cqes_to_poll) {
2932 wc = wc + num_os_cqe;
2933 /* adapter returns single error cqe when qp moves to
2934 * error state. So insert error cqes with wc_status as
2935 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2936 * respectively which uses this CQ.
2937 */
2938 spin_lock_irqsave(&dev->flush_q_lock, flags);
2939 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2940 if (cqes_to_poll == 0)
2941 break;
2942 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2943 cqes_to_poll -= err_cqes;
2944 num_os_cqe += err_cqes;
2945 wc = wc + err_cqes;
2946 }
2947 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2948 }
2949 return num_os_cqe;
2950 }
2951
2952 int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2953 {
2954 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2955 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2956 u16 cq_id;
2957 unsigned long flags;
2958 bool arm_needed = false, sol_needed = false;
2959
2960 cq_id = cq->id;
2961
2962 spin_lock_irqsave(&cq->cq_lock, flags);
2963 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
2964 arm_needed = true;
2965 if (cq_flags & IB_CQ_SOLICITED)
2966 sol_needed = true;
2967
2968 if (cq->first_arm) {
2969 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
2970 cq->first_arm = false;
2971 }
2972
2973 cq->deferred_arm = true;
2974 cq->deferred_sol = sol_needed;
2975 spin_unlock_irqrestore(&cq->cq_lock, flags);
2976
2977 return 0;
2978 }
2979
2980 struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len)
2981 {
2982 int status;
2983 struct ocrdma_mr *mr;
2984 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
2985 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
2986
2987 if (max_page_list_len > dev->attr.max_pages_per_frmr)
2988 return ERR_PTR(-EINVAL);
2989
2990 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
2991 if (!mr)
2992 return ERR_PTR(-ENOMEM);
2993
2994 status = ocrdma_get_pbl_info(dev, mr, max_page_list_len);
2995 if (status)
2996 goto pbl_err;
2997 mr->hwmr.fr_mr = 1;
2998 mr->hwmr.remote_rd = 0;
2999 mr->hwmr.remote_wr = 0;
3000 mr->hwmr.local_rd = 0;
3001 mr->hwmr.local_wr = 0;
3002 mr->hwmr.mw_bind = 0;
3003 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3004 if (status)
3005 goto pbl_err;
3006 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
3007 if (status)
3008 goto mbx_err;
3009 mr->ibmr.rkey = mr->hwmr.lkey;
3010 mr->ibmr.lkey = mr->hwmr.lkey;
3011 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
3012 (unsigned long) mr;
3013 return &mr->ibmr;
3014 mbx_err:
3015 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3016 pbl_err:
3017 kfree(mr);
3018 return ERR_PTR(-ENOMEM);
3019 }
3020
3021 struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device
3022 *ibdev,
3023 int page_list_len)
3024 {
3025 struct ib_fast_reg_page_list *frmr_list;
3026 int size;
3027
3028 size = sizeof(*frmr_list) + (page_list_len * sizeof(u64));
3029 frmr_list = kzalloc(size, GFP_KERNEL);
3030 if (!frmr_list)
3031 return ERR_PTR(-ENOMEM);
3032 frmr_list->page_list = (u64 *)(frmr_list + 1);
3033 return frmr_list;
3034 }
3035
3036 void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list)
3037 {
3038 kfree(page_list);
3039 }
3040
3041 #define MAX_KERNEL_PBE_SIZE 65536
3042 static inline int count_kernel_pbes(struct ib_phys_buf *buf_list,
3043 int buf_cnt, u32 *pbe_size)
3044 {
3045 u64 total_size = 0;
3046 u64 buf_size = 0;
3047 int i;
3048 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE);
3049 *pbe_size = roundup_pow_of_two(*pbe_size);
3050
3051 /* find the smallest PBE size that we can have */
3052 for (i = 0; i < buf_cnt; i++) {
3053 /* first addr may not be page aligned, so ignore checking */
3054 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) ||
3055 (buf_list[i].size & ~PAGE_MASK))) {
3056 return 0;
3057 }
3058
3059 /* if configured PBE size is greater then the chosen one,
3060 * reduce the PBE size.
3061 */
3062 buf_size = roundup(buf_list[i].size, PAGE_SIZE);
3063 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/
3064 buf_size = roundup_pow_of_two(buf_size);
3065 if (*pbe_size > buf_size)
3066 *pbe_size = buf_size;
3067
3068 total_size += buf_size;
3069 }
3070 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ?
3071 (MAX_KERNEL_PBE_SIZE) : (*pbe_size);
3072
3073 /* num_pbes = total_size / (*pbe_size); this is implemented below. */
3074
3075 return total_size >> ilog2(*pbe_size);
3076 }
3077
3078 static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt,
3079 u32 pbe_size, struct ocrdma_pbl *pbl_tbl,
3080 struct ocrdma_hw_mr *hwmr)
3081 {
3082 int i;
3083 int idx;
3084 int pbes_per_buf = 0;
3085 u64 buf_addr = 0;
3086 int num_pbes;
3087 struct ocrdma_pbe *pbe;
3088 int total_num_pbes = 0;
3089
3090 if (!hwmr->num_pbes)
3091 return;
3092
3093 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
3094 num_pbes = 0;
3095
3096 /* go through the OS phy regions & fill hw pbe entries into pbls. */
3097 for (i = 0; i < ib_buf_cnt; i++) {
3098 buf_addr = buf_list[i].addr;
3099 pbes_per_buf =
3100 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) /
3101 pbe_size;
3102 hwmr->len += buf_list[i].size;
3103 /* number of pbes can be more for one OS buf, when
3104 * buffers are of different sizes.
3105 * split the ib_buf to one or more pbes.
3106 */
3107 for (idx = 0; idx < pbes_per_buf; idx++) {
3108 /* we program always page aligned addresses,
3109 * first unaligned address is taken care by fbo.
3110 */
3111 if (i == 0) {
3112 /* for non zero fbo, assign the
3113 * start of the page.
3114 */
3115 pbe->pa_lo =
3116 cpu_to_le32((u32) (buf_addr & PAGE_MASK));
3117 pbe->pa_hi =
3118 cpu_to_le32((u32) upper_32_bits(buf_addr));
3119 } else {
3120 pbe->pa_lo =
3121 cpu_to_le32((u32) (buf_addr & 0xffffffff));
3122 pbe->pa_hi =
3123 cpu_to_le32((u32) upper_32_bits(buf_addr));
3124 }
3125 buf_addr += pbe_size;
3126 num_pbes += 1;
3127 total_num_pbes += 1;
3128 pbe++;
3129
3130 if (total_num_pbes == hwmr->num_pbes)
3131 goto mr_tbl_done;
3132 /* if the pbl is full storing the pbes,
3133 * move to next pbl.
3134 */
3135 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
3136 pbl_tbl++;
3137 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
3138 num_pbes = 0;
3139 }
3140 }
3141 }
3142 mr_tbl_done:
3143 return;
3144 }
3145
3146 struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd,
3147 struct ib_phys_buf *buf_list,
3148 int buf_cnt, int acc, u64 *iova_start)
3149 {
3150 int status = -ENOMEM;
3151 struct ocrdma_mr *mr;
3152 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3153 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3154 u32 num_pbes;
3155 u32 pbe_size = 0;
3156
3157 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE))
3158 return ERR_PTR(-EINVAL);
3159
3160 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3161 if (!mr)
3162 return ERR_PTR(status);
3163
3164 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size);
3165 if (num_pbes == 0) {
3166 status = -EINVAL;
3167 goto pbl_err;
3168 }
3169 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
3170 if (status)
3171 goto pbl_err;
3172
3173 mr->hwmr.pbe_size = pbe_size;
3174 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK);
3175 mr->hwmr.va = *iova_start;
3176 mr->hwmr.local_rd = 1;
3177 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
3178 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
3179 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
3180 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3181 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
3182
3183 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3184 if (status)
3185 goto pbl_err;
3186 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table,
3187 &mr->hwmr);
3188 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
3189 if (status)
3190 goto mbx_err;
3191
3192 mr->ibmr.lkey = mr->hwmr.lkey;
3193 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
3194 mr->ibmr.rkey = mr->hwmr.lkey;
3195 return &mr->ibmr;
3196
3197 mbx_err:
3198 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3199 pbl_err:
3200 kfree(mr);
3201 return ERR_PTR(status);
3202 }
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