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1 /*
2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of EITHER the GNU General Public License
6 * version 2 as published by the Free Software Foundation or the BSD
7 * 2-Clause License. This program is distributed in the hope that it
8 * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9 * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10 * See the GNU General Public License version 2 for more details at
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program available in the file COPYING in the main
15 * directory of this source tree.
16 *
17 * The BSD 2-Clause License
18 *
19 * Redistribution and use in source and binary forms, with or
20 * without modification, are permitted provided that the following
21 * conditions are met:
22 *
23 * - Redistributions of source code must retain the above
24 * copyright notice, this list of conditions and the following
25 * disclaimer.
26 *
27 * - Redistributions in binary form must reproduce the above
28 * copyright notice, this list of conditions and the following
29 * disclaimer in the documentation and/or other materials
30 * provided with the distribution.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43 * OF THE POSSIBILITY OF SUCH DAMAGE.
44 */
45
46 #ifndef __PVRDMA_H__
47 #define __PVRDMA_H__
48
49 #include <linux/compiler.h>
50 #include <linux/interrupt.h>
51 #include <linux/list.h>
52 #include <linux/mutex.h>
53 #include <linux/pci.h>
54 #include <linux/semaphore.h>
55 #include <linux/workqueue.h>
56 #include <rdma/ib_umem.h>
57 #include <rdma/ib_verbs.h>
58 #include <rdma/vmw_pvrdma-abi.h>
59
60 #include "pvrdma_ring.h"
61 #include "pvrdma_dev_api.h"
62 #include "pvrdma_verbs.h"
63
64 /* NOT the same as BIT_MASK(). */
65 #define PVRDMA_MASK(n) ((n << 1) - 1)
66
67 /*
68 * VMware PVRDMA PCI device id.
69 */
70 #define PCI_DEVICE_ID_VMWARE_PVRDMA 0x0820
71
72 struct pvrdma_dev;
73
74 struct pvrdma_page_dir {
75 dma_addr_t dir_dma;
76 u64 *dir;
77 int ntables;
78 u64 **tables;
79 u64 npages;
80 void **pages;
81 };
82
83 struct pvrdma_cq {
84 struct ib_cq ibcq;
85 int offset;
86 spinlock_t cq_lock; /* Poll lock. */
87 struct pvrdma_uar_map *uar;
88 struct ib_umem *umem;
89 struct pvrdma_ring_state *ring_state;
90 struct pvrdma_page_dir pdir;
91 u32 cq_handle;
92 bool is_kernel;
93 atomic_t refcnt;
94 wait_queue_head_t wait;
95 };
96
97 struct pvrdma_id_table {
98 u32 last;
99 u32 top;
100 u32 max;
101 u32 mask;
102 spinlock_t lock; /* Table lock. */
103 unsigned long *table;
104 };
105
106 struct pvrdma_uar_map {
107 unsigned long pfn;
108 void __iomem *map;
109 int index;
110 };
111
112 struct pvrdma_uar_table {
113 struct pvrdma_id_table tbl;
114 int size;
115 };
116
117 struct pvrdma_ucontext {
118 struct ib_ucontext ibucontext;
119 struct pvrdma_dev *dev;
120 struct pvrdma_uar_map uar;
121 u64 ctx_handle;
122 };
123
124 struct pvrdma_pd {
125 struct ib_pd ibpd;
126 u32 pdn;
127 u32 pd_handle;
128 int privileged;
129 };
130
131 struct pvrdma_mr {
132 u32 mr_handle;
133 u64 iova;
134 u64 size;
135 };
136
137 struct pvrdma_user_mr {
138 struct ib_mr ibmr;
139 struct ib_umem *umem;
140 struct pvrdma_mr mmr;
141 struct pvrdma_page_dir pdir;
142 u64 *pages;
143 u32 npages;
144 u32 max_pages;
145 u32 page_shift;
146 };
147
148 struct pvrdma_wq {
149 struct pvrdma_ring *ring;
150 spinlock_t lock; /* Work queue lock. */
151 int wqe_cnt;
152 int wqe_size;
153 int max_sg;
154 int offset;
155 };
156
157 struct pvrdma_ah {
158 struct ib_ah ibah;
159 struct pvrdma_av av;
160 };
161
162 struct pvrdma_qp {
163 struct ib_qp ibqp;
164 u32 qp_handle;
165 u32 qkey;
166 struct pvrdma_wq sq;
167 struct pvrdma_wq rq;
168 struct ib_umem *rumem;
169 struct ib_umem *sumem;
170 struct pvrdma_page_dir pdir;
171 int npages;
172 int npages_send;
173 int npages_recv;
174 u32 flags;
175 u8 port;
176 u8 state;
177 bool is_kernel;
178 struct mutex mutex; /* QP state mutex. */
179 atomic_t refcnt;
180 wait_queue_head_t wait;
181 };
182
183 struct pvrdma_dev {
184 /* PCI device-related information. */
185 struct ib_device ib_dev;
186 struct pci_dev *pdev;
187 void __iomem *regs;
188 struct pvrdma_device_shared_region *dsr; /* Shared region pointer */
189 dma_addr_t dsrbase; /* Shared region base address */
190 void *cmd_slot;
191 void *resp_slot;
192 unsigned long flags;
193 struct list_head device_link;
194
195 /* Locking and interrupt information. */
196 spinlock_t cmd_lock; /* Command lock. */
197 struct semaphore cmd_sema;
198 struct completion cmd_done;
199 unsigned int nr_vectors;
200
201 /* RDMA-related device information. */
202 union ib_gid *sgid_tbl;
203 struct pvrdma_ring_state *async_ring_state;
204 struct pvrdma_page_dir async_pdir;
205 struct pvrdma_ring_state *cq_ring_state;
206 struct pvrdma_page_dir cq_pdir;
207 struct pvrdma_cq **cq_tbl;
208 spinlock_t cq_tbl_lock;
209 struct pvrdma_qp **qp_tbl;
210 spinlock_t qp_tbl_lock;
211 struct pvrdma_uar_table uar_table;
212 struct pvrdma_uar_map driver_uar;
213 __be64 sys_image_guid;
214 spinlock_t desc_lock; /* Device modification lock. */
215 u32 port_cap_mask;
216 struct mutex port_mutex; /* Port modification mutex. */
217 bool ib_active;
218 atomic_t num_qps;
219 atomic_t num_cqs;
220 atomic_t num_pds;
221 atomic_t num_ahs;
222
223 /* Network device information. */
224 struct net_device *netdev;
225 struct notifier_block nb_netdev;
226 };
227
228 struct pvrdma_netdevice_work {
229 struct work_struct work;
230 struct net_device *event_netdev;
231 unsigned long event;
232 };
233
234 static inline struct pvrdma_dev *to_vdev(struct ib_device *ibdev)
235 {
236 return container_of(ibdev, struct pvrdma_dev, ib_dev);
237 }
238
239 static inline struct
240 pvrdma_ucontext *to_vucontext(struct ib_ucontext *ibucontext)
241 {
242 return container_of(ibucontext, struct pvrdma_ucontext, ibucontext);
243 }
244
245 static inline struct pvrdma_pd *to_vpd(struct ib_pd *ibpd)
246 {
247 return container_of(ibpd, struct pvrdma_pd, ibpd);
248 }
249
250 static inline struct pvrdma_cq *to_vcq(struct ib_cq *ibcq)
251 {
252 return container_of(ibcq, struct pvrdma_cq, ibcq);
253 }
254
255 static inline struct pvrdma_user_mr *to_vmr(struct ib_mr *ibmr)
256 {
257 return container_of(ibmr, struct pvrdma_user_mr, ibmr);
258 }
259
260 static inline struct pvrdma_qp *to_vqp(struct ib_qp *ibqp)
261 {
262 return container_of(ibqp, struct pvrdma_qp, ibqp);
263 }
264
265 static inline struct pvrdma_ah *to_vah(struct ib_ah *ibah)
266 {
267 return container_of(ibah, struct pvrdma_ah, ibah);
268 }
269
270 static inline void pvrdma_write_reg(struct pvrdma_dev *dev, u32 reg, u32 val)
271 {
272 writel(cpu_to_le32(val), dev->regs + reg);
273 }
274
275 static inline u32 pvrdma_read_reg(struct pvrdma_dev *dev, u32 reg)
276 {
277 return le32_to_cpu(readl(dev->regs + reg));
278 }
279
280 static inline void pvrdma_write_uar_cq(struct pvrdma_dev *dev, u32 val)
281 {
282 writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_CQ_OFFSET);
283 }
284
285 static inline void pvrdma_write_uar_qp(struct pvrdma_dev *dev, u32 val)
286 {
287 writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_QP_OFFSET);
288 }
289
290 static inline void *pvrdma_page_dir_get_ptr(struct pvrdma_page_dir *pdir,
291 u64 offset)
292 {
293 return pdir->pages[offset / PAGE_SIZE] + (offset % PAGE_SIZE);
294 }
295
296 static inline enum pvrdma_mtu ib_mtu_to_pvrdma(enum ib_mtu mtu)
297 {
298 return (enum pvrdma_mtu)mtu;
299 }
300
301 static inline enum ib_mtu pvrdma_mtu_to_ib(enum pvrdma_mtu mtu)
302 {
303 return (enum ib_mtu)mtu;
304 }
305
306 static inline enum pvrdma_port_state ib_port_state_to_pvrdma(
307 enum ib_port_state state)
308 {
309 return (enum pvrdma_port_state)state;
310 }
311
312 static inline enum ib_port_state pvrdma_port_state_to_ib(
313 enum pvrdma_port_state state)
314 {
315 return (enum ib_port_state)state;
316 }
317
318 static inline int ib_port_cap_flags_to_pvrdma(int flags)
319 {
320 return flags & PVRDMA_MASK(PVRDMA_PORT_CAP_FLAGS_MAX);
321 }
322
323 static inline int pvrdma_port_cap_flags_to_ib(int flags)
324 {
325 return flags;
326 }
327
328 static inline enum pvrdma_port_width ib_port_width_to_pvrdma(
329 enum ib_port_width width)
330 {
331 return (enum pvrdma_port_width)width;
332 }
333
334 static inline enum ib_port_width pvrdma_port_width_to_ib(
335 enum pvrdma_port_width width)
336 {
337 return (enum ib_port_width)width;
338 }
339
340 static inline enum pvrdma_port_speed ib_port_speed_to_pvrdma(
341 enum ib_port_speed speed)
342 {
343 return (enum pvrdma_port_speed)speed;
344 }
345
346 static inline enum ib_port_speed pvrdma_port_speed_to_ib(
347 enum pvrdma_port_speed speed)
348 {
349 return (enum ib_port_speed)speed;
350 }
351
352 static inline int pvrdma_qp_attr_mask_to_ib(int attr_mask)
353 {
354 return attr_mask;
355 }
356
357 static inline int ib_qp_attr_mask_to_pvrdma(int attr_mask)
358 {
359 return attr_mask & PVRDMA_MASK(PVRDMA_QP_ATTR_MASK_MAX);
360 }
361
362 static inline enum pvrdma_mig_state ib_mig_state_to_pvrdma(
363 enum ib_mig_state state)
364 {
365 return (enum pvrdma_mig_state)state;
366 }
367
368 static inline enum ib_mig_state pvrdma_mig_state_to_ib(
369 enum pvrdma_mig_state state)
370 {
371 return (enum ib_mig_state)state;
372 }
373
374 static inline int ib_access_flags_to_pvrdma(int flags)
375 {
376 return flags;
377 }
378
379 static inline int pvrdma_access_flags_to_ib(int flags)
380 {
381 return flags & PVRDMA_MASK(PVRDMA_ACCESS_FLAGS_MAX);
382 }
383
384 static inline enum pvrdma_qp_type ib_qp_type_to_pvrdma(enum ib_qp_type type)
385 {
386 return (enum pvrdma_qp_type)type;
387 }
388
389 static inline enum ib_qp_type pvrdma_qp_type_to_ib(enum pvrdma_qp_type type)
390 {
391 return (enum ib_qp_type)type;
392 }
393
394 static inline enum pvrdma_qp_state ib_qp_state_to_pvrdma(enum ib_qp_state state)
395 {
396 return (enum pvrdma_qp_state)state;
397 }
398
399 static inline enum ib_qp_state pvrdma_qp_state_to_ib(enum pvrdma_qp_state state)
400 {
401 return (enum ib_qp_state)state;
402 }
403
404 static inline enum pvrdma_wr_opcode ib_wr_opcode_to_pvrdma(enum ib_wr_opcode op)
405 {
406 return (enum pvrdma_wr_opcode)op;
407 }
408
409 static inline enum ib_wc_status pvrdma_wc_status_to_ib(
410 enum pvrdma_wc_status status)
411 {
412 return (enum ib_wc_status)status;
413 }
414
415 static inline int pvrdma_wc_opcode_to_ib(int opcode)
416 {
417 return opcode;
418 }
419
420 static inline int pvrdma_wc_flags_to_ib(int flags)
421 {
422 return flags;
423 }
424
425 static inline int ib_send_flags_to_pvrdma(int flags)
426 {
427 return flags & PVRDMA_MASK(PVRDMA_SEND_FLAGS_MAX);
428 }
429
430 void pvrdma_qp_cap_to_ib(struct ib_qp_cap *dst,
431 const struct pvrdma_qp_cap *src);
432 void ib_qp_cap_to_pvrdma(struct pvrdma_qp_cap *dst,
433 const struct ib_qp_cap *src);
434 void pvrdma_gid_to_ib(union ib_gid *dst, const union pvrdma_gid *src);
435 void ib_gid_to_pvrdma(union pvrdma_gid *dst, const union ib_gid *src);
436 void pvrdma_global_route_to_ib(struct ib_global_route *dst,
437 const struct pvrdma_global_route *src);
438 void ib_global_route_to_pvrdma(struct pvrdma_global_route *dst,
439 const struct ib_global_route *src);
440 void pvrdma_ah_attr_to_ib(struct ib_ah_attr *dst,
441 const struct pvrdma_ah_attr *src);
442 void ib_ah_attr_to_pvrdma(struct pvrdma_ah_attr *dst,
443 const struct ib_ah_attr *src);
444
445 int pvrdma_uar_table_init(struct pvrdma_dev *dev);
446 void pvrdma_uar_table_cleanup(struct pvrdma_dev *dev);
447
448 int pvrdma_uar_alloc(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar);
449 void pvrdma_uar_free(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar);
450
451 void _pvrdma_flush_cqe(struct pvrdma_qp *qp, struct pvrdma_cq *cq);
452
453 int pvrdma_page_dir_init(struct pvrdma_dev *dev, struct pvrdma_page_dir *pdir,
454 u64 npages, bool alloc_pages);
455 void pvrdma_page_dir_cleanup(struct pvrdma_dev *dev,
456 struct pvrdma_page_dir *pdir);
457 int pvrdma_page_dir_insert_dma(struct pvrdma_page_dir *pdir, u64 idx,
458 dma_addr_t daddr);
459 int pvrdma_page_dir_insert_umem(struct pvrdma_page_dir *pdir,
460 struct ib_umem *umem, u64 offset);
461 dma_addr_t pvrdma_page_dir_get_dma(struct pvrdma_page_dir *pdir, u64 idx);
462 int pvrdma_page_dir_insert_page_list(struct pvrdma_page_dir *pdir,
463 u64 *page_list, int num_pages);
464
465 int pvrdma_cmd_post(struct pvrdma_dev *dev, union pvrdma_cmd_req *req,
466 union pvrdma_cmd_resp *rsp, unsigned resp_code);
467
468 #endif /* __PVRDMA_H__ */