2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
26 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
27 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
28 MODULE_LICENSE("GPL");
30 static unsigned int i8042_nokbd
;
31 module_param_named(nokbd
, i8042_nokbd
, bool, 0);
32 MODULE_PARM_DESC(nokbd
, "Do not probe or use KBD port.");
34 static unsigned int i8042_noaux
;
35 module_param_named(noaux
, i8042_noaux
, bool, 0);
36 MODULE_PARM_DESC(noaux
, "Do not probe or use AUX (mouse) port.");
38 static unsigned int i8042_nomux
;
39 module_param_named(nomux
, i8042_nomux
, bool, 0);
40 MODULE_PARM_DESC(nomux
, "Do not check whether an active multiplexing conrtoller is present.");
42 static unsigned int i8042_unlock
;
43 module_param_named(unlock
, i8042_unlock
, bool, 0);
44 MODULE_PARM_DESC(unlock
, "Ignore keyboard lock.");
46 static unsigned int i8042_reset
;
47 module_param_named(reset
, i8042_reset
, bool, 0);
48 MODULE_PARM_DESC(reset
, "Reset controller during init and cleanup.");
50 static unsigned int i8042_direct
;
51 module_param_named(direct
, i8042_direct
, bool, 0);
52 MODULE_PARM_DESC(direct
, "Put keyboard port into non-translated mode.");
54 static unsigned int i8042_dumbkbd
;
55 module_param_named(dumbkbd
, i8042_dumbkbd
, bool, 0);
56 MODULE_PARM_DESC(dumbkbd
, "Pretend that controller can only read data from keyboard");
58 static unsigned int i8042_noloop
;
59 module_param_named(noloop
, i8042_noloop
, bool, 0);
60 MODULE_PARM_DESC(noloop
, "Disable the AUX Loopback command while probing for the AUX port");
62 static unsigned int i8042_blink_frequency
= 500;
63 module_param_named(panicblink
, i8042_blink_frequency
, uint
, 0600);
64 MODULE_PARM_DESC(panicblink
, "Frequency with which keyboard LEDs should blink when kernel panics");
67 static int i8042_nopnp
;
68 module_param_named(nopnp
, i8042_nopnp
, bool, 0);
69 MODULE_PARM_DESC(nopnp
, "Do not use PNP to detect controller settings");
74 static int i8042_debug
;
75 module_param_named(debug
, i8042_debug
, bool, 0600);
76 MODULE_PARM_DESC(debug
, "Turn i8042 debugging mode on and off");
81 static DEFINE_SPINLOCK(i8042_lock
);
90 #define I8042_KBD_PORT_NO 0
91 #define I8042_AUX_PORT_NO 1
92 #define I8042_MUX_PORT_NO 2
93 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
95 static struct i8042_port i8042_ports
[I8042_NUM_PORTS
];
97 static unsigned char i8042_initial_ctr
;
98 static unsigned char i8042_ctr
;
99 static unsigned char i8042_mux_present
;
100 static unsigned char i8042_kbd_irq_registered
;
101 static unsigned char i8042_aux_irq_registered
;
102 static unsigned char i8042_suppress_kbd_ack
;
103 static struct platform_device
*i8042_platform_device
;
105 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
);
108 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
109 * be ready for reading values from it / writing values to it.
110 * Called always with i8042_lock held.
113 static int i8042_wait_read(void)
117 while ((~i8042_read_status() & I8042_STR_OBF
) && (i
< I8042_CTL_TIMEOUT
)) {
121 return -(i
== I8042_CTL_TIMEOUT
);
124 static int i8042_wait_write(void)
128 while ((i8042_read_status() & I8042_STR_IBF
) && (i
< I8042_CTL_TIMEOUT
)) {
132 return -(i
== I8042_CTL_TIMEOUT
);
136 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
137 * of the i8042 down the toilet.
140 static int i8042_flush(void)
143 unsigned char data
, str
;
146 spin_lock_irqsave(&i8042_lock
, flags
);
148 while (((str
= i8042_read_status()) & I8042_STR_OBF
) && (i
< I8042_BUFFER_SIZE
)) {
150 data
= i8042_read_data();
152 dbg("%02x <- i8042 (flush, %s)", data
,
153 str
& I8042_STR_AUXDATA
? "aux" : "kbd");
156 spin_unlock_irqrestore(&i8042_lock
, flags
);
162 * i8042_command() executes a command on the i8042. It also sends the input
163 * parameter(s) of the commands to it, and receives the output value(s). The
164 * parameters are to be stored in the param array, and the output is placed
165 * into the same array. The number of the parameters and output values is
166 * encoded in bits 8-11 of the command number.
169 static int __i8042_command(unsigned char *param
, int command
)
173 if (i8042_noloop
&& command
== I8042_CMD_AUX_LOOP
)
176 error
= i8042_wait_write();
180 dbg("%02x -> i8042 (command)", command
& 0xff);
181 i8042_write_command(command
& 0xff);
183 for (i
= 0; i
< ((command
>> 12) & 0xf); i
++) {
184 error
= i8042_wait_write();
187 dbg("%02x -> i8042 (parameter)", param
[i
]);
188 i8042_write_data(param
[i
]);
191 for (i
= 0; i
< ((command
>> 8) & 0xf); i
++) {
192 error
= i8042_wait_read();
194 dbg(" -- i8042 (timeout)");
198 if (command
== I8042_CMD_AUX_LOOP
&&
199 !(i8042_read_status() & I8042_STR_AUXDATA
)) {
200 dbg(" -- i8042 (auxerr)");
204 param
[i
] = i8042_read_data();
205 dbg("%02x <- i8042 (return)", param
[i
]);
211 static int i8042_command(unsigned char *param
, int command
)
216 spin_lock_irqsave(&i8042_lock
, flags
);
217 retval
= __i8042_command(param
, command
);
218 spin_unlock_irqrestore(&i8042_lock
, flags
);
224 * i8042_kbd_write() sends a byte out through the keyboard interface.
227 static int i8042_kbd_write(struct serio
*port
, unsigned char c
)
232 spin_lock_irqsave(&i8042_lock
, flags
);
234 if (!(retval
= i8042_wait_write())) {
235 dbg("%02x -> i8042 (kbd-data)", c
);
239 spin_unlock_irqrestore(&i8042_lock
, flags
);
245 * i8042_aux_write() sends a byte out through the aux interface.
248 static int i8042_aux_write(struct serio
*serio
, unsigned char c
)
250 struct i8042_port
*port
= serio
->port_data
;
252 return i8042_command(&c
, port
->mux
== -1 ?
254 I8042_CMD_MUX_SEND
+ port
->mux
);
258 * i8042_start() is called by serio core when port is about to finish
259 * registering. It will mark port as existing so i8042_interrupt can
260 * start sending data through it.
262 static int i8042_start(struct serio
*serio
)
264 struct i8042_port
*port
= serio
->port_data
;
272 * i8042_stop() marks serio port as non-existing so i8042_interrupt
273 * will not try to send data to the port that is about to go away.
274 * The function is called by serio core as part of unregister procedure.
276 static void i8042_stop(struct serio
*serio
)
278 struct i8042_port
*port
= serio
->port_data
;
286 * i8042_interrupt() is the most important function in this driver -
287 * it handles the interrupts from the i8042, and sends incoming bytes
288 * to the upper layers.
291 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
)
293 struct i8042_port
*port
;
295 unsigned char str
, data
;
297 unsigned int port_no
;
300 spin_lock_irqsave(&i8042_lock
, flags
);
301 str
= i8042_read_status();
302 if (unlikely(~str
& I8042_STR_OBF
)) {
303 spin_unlock_irqrestore(&i8042_lock
, flags
);
304 if (irq
) dbg("Interrupt %d, without any data", irq
);
308 data
= i8042_read_data();
309 spin_unlock_irqrestore(&i8042_lock
, flags
);
311 if (i8042_mux_present
&& (str
& I8042_STR_AUXDATA
)) {
312 static unsigned long last_transmit
;
313 static unsigned char last_str
;
316 if (str
& I8042_STR_MUXERR
) {
317 dbg("MUX error, status is %02x, data is %02x", str
, data
);
319 * When MUXERR condition is signalled the data register can only contain
320 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
321 * it is not always the case. Some KBCs also report 0xfc when there is
322 * nothing connected to the port while others sometimes get confused which
323 * port the data came from and signal error leaving the data intact. They
324 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
325 * to legacy mode yet, when we see one we'll add proper handling).
326 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
327 * rest assume that the data came from the same serio last byte
328 * was transmitted (if transmission happened not too long ago).
333 if (time_before(jiffies
, last_transmit
+ HZ
/10)) {
337 /* fall through - report timeout */
340 case 0xfe: dfl
= SERIO_TIMEOUT
; data
= 0xfe; break;
341 case 0xff: dfl
= SERIO_PARITY
; data
= 0xfe; break;
345 port_no
= I8042_MUX_PORT_NO
+ ((str
>> 6) & 3);
347 last_transmit
= jiffies
;
350 dfl
= ((str
& I8042_STR_PARITY
) ? SERIO_PARITY
: 0) |
351 ((str
& I8042_STR_TIMEOUT
) ? SERIO_TIMEOUT
: 0);
353 port_no
= (str
& I8042_STR_AUXDATA
) ?
354 I8042_AUX_PORT_NO
: I8042_KBD_PORT_NO
;
357 port
= &i8042_ports
[port_no
];
359 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
361 dfl
& SERIO_PARITY
? ", bad parity" : "",
362 dfl
& SERIO_TIMEOUT
? ", timeout" : "");
364 if (unlikely(i8042_suppress_kbd_ack
))
365 if (port_no
== I8042_KBD_PORT_NO
&&
366 (data
== 0xfa || data
== 0xfe)) {
367 i8042_suppress_kbd_ack
--;
371 if (likely(port
->exists
))
372 serio_interrupt(port
->serio
, data
, dfl
);
375 return IRQ_RETVAL(ret
);
379 * i8042_enable_kbd_port enables keybaord port on chip
382 static int i8042_enable_kbd_port(void)
384 i8042_ctr
&= ~I8042_CTR_KBDDIS
;
385 i8042_ctr
|= I8042_CTR_KBDINT
;
387 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
388 printk(KERN_ERR
"i8042.c: Failed to enable KBD port.\n");
396 * i8042_enable_aux_port enables AUX (mouse) port on chip
399 static int i8042_enable_aux_port(void)
401 i8042_ctr
&= ~I8042_CTR_AUXDIS
;
402 i8042_ctr
|= I8042_CTR_AUXINT
;
404 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
405 printk(KERN_ERR
"i8042.c: Failed to enable AUX port.\n");
413 * i8042_enable_mux_ports enables 4 individual AUX ports after
414 * the controller has been switched into Multiplexed mode
417 static int i8042_enable_mux_ports(void)
422 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
423 i8042_command(¶m
, I8042_CMD_MUX_PFX
+ i
);
424 i8042_command(¶m
, I8042_CMD_AUX_ENABLE
);
427 return i8042_enable_aux_port();
431 * i8042_set_mux_mode checks whether the controller has an active
432 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
435 static int i8042_set_mux_mode(unsigned int mode
, unsigned char *mux_version
)
440 * Get rid of bytes in the queue.
446 * Internal loopback test - send three bytes, they should come back from the
447 * mouse interface, the last should be version.
451 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= 0xf0)
453 param
= mode
? 0x56 : 0xf6;
454 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= (mode
? 0x56 : 0xf6))
456 param
= mode
? 0xa4 : 0xa5;
457 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
== (mode
? 0xa4 : 0xa5))
461 *mux_version
= param
;
467 * i8042_check_mux() checks whether the controller supports the PS/2 Active
468 * Multiplexing specification by Synaptics, Phoenix, Insyde and
472 static int __devinit
i8042_check_mux(void)
474 unsigned char mux_version
;
476 if (i8042_set_mux_mode(1, &mux_version
))
480 * Workaround for interference with USB Legacy emulation
481 * that causes a v10.12 MUX to be found.
483 if (mux_version
== 0xAC)
486 printk(KERN_INFO
"i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
487 (mux_version
>> 4) & 0xf, mux_version
& 0xf);
490 * Disable all muxed ports by disabling AUX.
492 i8042_ctr
|= I8042_CTR_AUXDIS
;
493 i8042_ctr
&= ~I8042_CTR_AUXINT
;
495 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
496 printk(KERN_ERR
"i8042.c: Failed to disable AUX port, can't use MUX.\n");
500 i8042_mux_present
= 1;
506 * The following is used to test AUX IRQ delivery.
508 static struct completion i8042_aux_irq_delivered __devinitdata
;
509 static int i8042_irq_being_tested __devinitdata
;
511 static irqreturn_t __devinit
i8042_aux_test_irq(int irq
, void *dev_id
)
514 unsigned char str
, data
;
516 spin_lock_irqsave(&i8042_lock
, flags
);
517 str
= i8042_read_status();
518 if (str
& I8042_STR_OBF
) {
519 data
= i8042_read_data();
520 if (i8042_irq_being_tested
&&
521 data
== 0xa5 && (str
& I8042_STR_AUXDATA
))
522 complete(&i8042_aux_irq_delivered
);
524 spin_unlock_irqrestore(&i8042_lock
, flags
);
530 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
531 * verifies success by readinng CTR. Used when testing for presence of AUX
534 static int __devinit
i8042_toggle_aux(int on
)
539 if (i8042_command(¶m
,
540 on
? I8042_CMD_AUX_ENABLE
: I8042_CMD_AUX_DISABLE
))
543 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
544 for (i
= 0; i
< 100; i
++) {
547 if (i8042_command(¶m
, I8042_CMD_CTL_RCTR
))
550 if (!(param
& I8042_CTR_AUXDIS
) == on
)
558 * i8042_check_aux() applies as much paranoia as it can at detecting
559 * the presence of an AUX interface.
562 static int __devinit
i8042_check_aux(void)
565 int irq_registered
= 0;
566 int aux_loop_broken
= 0;
571 * Get rid of bytes in the queue.
577 * Internal loopback test - filters out AT-type i8042's. Unfortunately
578 * SiS screwed up and their 5597 doesn't support the LOOP command even
579 * though it has an AUX port.
583 retval
= i8042_command(¶m
, I8042_CMD_AUX_LOOP
);
584 if (retval
|| param
!= 0x5a) {
587 * External connection test - filters out AT-soldered PS/2 i8042's
588 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
589 * 0xfa - no error on some notebooks which ignore the spec
590 * Because it's common for chipsets to return error on perfectly functioning
591 * AUX ports, we test for this only when the LOOP command failed.
594 if (i8042_command(¶m
, I8042_CMD_AUX_TEST
) ||
595 (param
&& param
!= 0xfa && param
!= 0xff))
599 * If AUX_LOOP completed without error but returned unexpected data
607 * Bit assignment test - filters out PS/2 i8042's in AT mode
610 if (i8042_toggle_aux(0)) {
611 printk(KERN_WARNING
"Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
612 printk(KERN_WARNING
"If AUX port is really absent please use the 'i8042.noaux' option.\n");
615 if (i8042_toggle_aux(1))
619 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
620 * used it for a PCI card or somethig else.
623 if (i8042_noloop
|| aux_loop_broken
) {
625 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
626 * is working and hope we are right.
632 if (request_irq(I8042_AUX_IRQ
, i8042_aux_test_irq
, IRQF_SHARED
,
633 "i8042", i8042_platform_device
))
638 if (i8042_enable_aux_port())
641 spin_lock_irqsave(&i8042_lock
, flags
);
643 init_completion(&i8042_aux_irq_delivered
);
644 i8042_irq_being_tested
= 1;
647 retval
= __i8042_command(¶m
, I8042_CMD_AUX_LOOP
& 0xf0ff);
649 spin_unlock_irqrestore(&i8042_lock
, flags
);
654 if (wait_for_completion_timeout(&i8042_aux_irq_delivered
,
655 msecs_to_jiffies(250)) == 0) {
657 * AUX IRQ was never delivered so we need to flush the controller to
658 * get rid of the byte we put there; otherwise keyboard may not work.
667 * Disable the interface.
670 i8042_ctr
|= I8042_CTR_AUXDIS
;
671 i8042_ctr
&= ~I8042_CTR_AUXINT
;
673 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
677 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
682 static int i8042_controller_check(void)
684 if (i8042_flush() == I8042_BUFFER_SIZE
) {
685 printk(KERN_ERR
"i8042.c: No controller found.\n");
692 static int i8042_controller_selftest(void)
699 if (i8042_command(¶m
, I8042_CMD_CTL_TEST
)) {
700 printk(KERN_ERR
"i8042.c: i8042 controller self test timeout.\n");
704 if (param
!= I8042_RET_CTL_TEST
) {
705 printk(KERN_ERR
"i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
706 param
, I8042_RET_CTL_TEST
);
714 * i8042_controller init initializes the i8042 controller, and,
715 * most importantly, sets it into non-xlated mode if that's
719 static int i8042_controller_init(void)
724 * Save the CTR for restoral on unload / reboot.
727 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_RCTR
)) {
728 printk(KERN_ERR
"i8042.c: Can't read CTR while initializing i8042.\n");
732 i8042_initial_ctr
= i8042_ctr
;
735 * Disable the keyboard interface and interrupt.
738 i8042_ctr
|= I8042_CTR_KBDDIS
;
739 i8042_ctr
&= ~I8042_CTR_KBDINT
;
745 spin_lock_irqsave(&i8042_lock
, flags
);
746 if (~i8042_read_status() & I8042_STR_KEYLOCK
) {
748 i8042_ctr
|= I8042_CTR_IGNKEYLOCK
;
750 printk(KERN_WARNING
"i8042.c: Warning: Keylock active.\n");
752 spin_unlock_irqrestore(&i8042_lock
, flags
);
755 * If the chip is configured into nontranslated mode by the BIOS, don't
756 * bother enabling translating and be happy.
759 if (~i8042_ctr
& I8042_CTR_XLATE
)
763 * Set nontranslated mode for the kbd interface if requested by an option.
764 * After this the kbd interface becomes a simple serial in/out, like the aux
765 * interface is. We don't do this by default, since it can confuse notebook
770 i8042_ctr
&= ~I8042_CTR_XLATE
;
776 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
777 printk(KERN_ERR
"i8042.c: Can't write CTR while initializing i8042.\n");
786 * Reset the controller and reset CRT to the original value set by BIOS.
789 static void i8042_controller_reset(void)
794 * Disable both KBD and AUX interfaces so they don't get in the way
797 i8042_ctr
|= I8042_CTR_KBDDIS
| I8042_CTR_AUXDIS
;
798 i8042_ctr
&= ~(I8042_CTR_KBDINT
| I8042_CTR_AUXINT
);
801 * Disable MUX mode if present.
804 if (i8042_mux_present
)
805 i8042_set_mux_mode(0, NULL
);
808 * Reset the controller if requested.
811 i8042_controller_selftest();
814 * Restore the original control register setting.
817 if (i8042_command(&i8042_initial_ctr
, I8042_CMD_CTL_WCTR
))
818 printk(KERN_WARNING
"i8042.c: Can't restore CTR.\n");
823 * i8042_panic_blink() will flash the keyboard LEDs and is called when
824 * kernel panics. Flashing LEDs is useful for users running X who may
825 * not see the console and will help distingushing panics from "real"
828 * Note that DELAY has a limit of 10ms so we will not get stuck here
829 * waiting for KBC to free up even if KBD interrupt is off
832 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
834 static long i8042_panic_blink(long count
)
837 static long last_blink
;
841 * We expect frequency to be about 1/2s. KDB uses about 1s.
842 * Make sure they are different.
844 if (!i8042_blink_frequency
)
846 if (count
- last_blink
< i8042_blink_frequency
)
850 while (i8042_read_status() & I8042_STR_IBF
)
852 dbg("%02x -> i8042 (panic blink)", 0xed);
853 i8042_suppress_kbd_ack
= 2;
854 i8042_write_data(0xed); /* set leds */
856 while (i8042_read_status() & I8042_STR_IBF
)
859 dbg("%02x -> i8042 (panic blink)", led
);
860 i8042_write_data(led
);
870 * Here we try to restore the original BIOS settings. We only want to
871 * do that once, when we really suspend, not when we taking memory
872 * snapshot for swsusp (in this case we'll perform required cleanup
873 * as part of shutdown process).
876 static int i8042_suspend(struct platform_device
*dev
, pm_message_t state
)
878 if (dev
->dev
.power
.power_state
.event
!= state
.event
) {
879 if (state
.event
== PM_EVENT_SUSPEND
)
880 i8042_controller_reset();
882 dev
->dev
.power
.power_state
= state
;
890 * Here we try to reset everything back to a state in which suspended
893 static int i8042_resume(struct platform_device
*dev
)
898 * Do not bother with restoring state if we haven't suspened yet
900 if (dev
->dev
.power
.power_state
.event
== PM_EVENT_ON
)
903 error
= i8042_controller_check();
907 error
= i8042_controller_selftest();
912 * Restore original CTR value and disable all ports
915 i8042_ctr
= i8042_initial_ctr
;
917 i8042_ctr
&= ~I8042_CTR_XLATE
;
918 i8042_ctr
|= I8042_CTR_AUXDIS
| I8042_CTR_KBDDIS
;
919 i8042_ctr
&= ~(I8042_CTR_AUXINT
| I8042_CTR_KBDINT
);
920 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
921 printk(KERN_ERR
"i8042: Can't write CTR to resume\n");
925 if (i8042_mux_present
) {
926 if (i8042_set_mux_mode(1, NULL
) || i8042_enable_mux_ports())
928 "i8042: failed to resume active multiplexor, "
929 "mouse won't work.\n");
930 } else if (i8042_ports
[I8042_AUX_PORT_NO
].serio
)
931 i8042_enable_aux_port();
933 if (i8042_ports
[I8042_KBD_PORT_NO
].serio
)
934 i8042_enable_kbd_port();
936 i8042_interrupt(0, NULL
);
938 dev
->dev
.power
.power_state
= PMSG_ON
;
942 #endif /* CONFIG_PM */
945 * We need to reset the 8042 back to original mode on system shutdown,
946 * because otherwise BIOSes will be confused.
949 static void i8042_shutdown(struct platform_device
*dev
)
951 i8042_controller_reset();
954 static int __devinit
i8042_create_kbd_port(void)
957 struct i8042_port
*port
= &i8042_ports
[I8042_KBD_PORT_NO
];
959 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
963 serio
->id
.type
= i8042_direct
? SERIO_8042
: SERIO_8042_XL
;
964 serio
->write
= i8042_dumbkbd
? NULL
: i8042_kbd_write
;
965 serio
->start
= i8042_start
;
966 serio
->stop
= i8042_stop
;
967 serio
->port_data
= port
;
968 serio
->dev
.parent
= &i8042_platform_device
->dev
;
969 strlcpy(serio
->name
, "i8042 KBD port", sizeof(serio
->name
));
970 strlcpy(serio
->phys
, I8042_KBD_PHYS_DESC
, sizeof(serio
->phys
));
973 port
->irq
= I8042_KBD_IRQ
;
978 static int __devinit
i8042_create_aux_port(int idx
)
981 int port_no
= idx
< 0 ? I8042_AUX_PORT_NO
: I8042_MUX_PORT_NO
+ idx
;
982 struct i8042_port
*port
= &i8042_ports
[port_no
];
984 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
988 serio
->id
.type
= SERIO_8042
;
989 serio
->write
= i8042_aux_write
;
990 serio
->start
= i8042_start
;
991 serio
->stop
= i8042_stop
;
992 serio
->port_data
= port
;
993 serio
->dev
.parent
= &i8042_platform_device
->dev
;
995 strlcpy(serio
->name
, "i8042 AUX port", sizeof(serio
->name
));
996 strlcpy(serio
->phys
, I8042_AUX_PHYS_DESC
, sizeof(serio
->phys
));
998 snprintf(serio
->name
, sizeof(serio
->name
), "i8042 AUX%d port", idx
);
999 snprintf(serio
->phys
, sizeof(serio
->phys
), I8042_MUX_PHYS_DESC
, idx
+ 1);
1002 port
->serio
= serio
;
1004 port
->irq
= I8042_AUX_IRQ
;
1009 static void __devinit
i8042_free_kbd_port(void)
1011 kfree(i8042_ports
[I8042_KBD_PORT_NO
].serio
);
1012 i8042_ports
[I8042_KBD_PORT_NO
].serio
= NULL
;
1015 static void __devinit
i8042_free_aux_ports(void)
1019 for (i
= I8042_AUX_PORT_NO
; i
< I8042_NUM_PORTS
; i
++) {
1020 kfree(i8042_ports
[i
].serio
);
1021 i8042_ports
[i
].serio
= NULL
;
1025 static void __devinit
i8042_register_ports(void)
1029 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1030 if (i8042_ports
[i
].serio
) {
1031 printk(KERN_INFO
"serio: %s at %#lx,%#lx irq %d\n",
1032 i8042_ports
[i
].serio
->name
,
1033 (unsigned long) I8042_DATA_REG
,
1034 (unsigned long) I8042_COMMAND_REG
,
1035 i8042_ports
[i
].irq
);
1036 serio_register_port(i8042_ports
[i
].serio
);
1041 static void __devinit
i8042_unregister_ports(void)
1045 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1046 if (i8042_ports
[i
].serio
) {
1047 serio_unregister_port(i8042_ports
[i
].serio
);
1048 i8042_ports
[i
].serio
= NULL
;
1053 static void i8042_free_irqs(void)
1055 if (i8042_aux_irq_registered
)
1056 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1057 if (i8042_kbd_irq_registered
)
1058 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1060 i8042_aux_irq_registered
= i8042_kbd_irq_registered
= 0;
1063 static int __devinit
i8042_setup_aux(void)
1065 int (*aux_enable
)(void);
1069 if (i8042_check_aux())
1072 if (i8042_nomux
|| i8042_check_mux()) {
1073 error
= i8042_create_aux_port(-1);
1075 goto err_free_ports
;
1076 aux_enable
= i8042_enable_aux_port
;
1078 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
1079 error
= i8042_create_aux_port(i
);
1081 goto err_free_ports
;
1083 aux_enable
= i8042_enable_mux_ports
;
1086 error
= request_irq(I8042_AUX_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1087 "i8042", i8042_platform_device
);
1089 goto err_free_ports
;
1094 i8042_aux_irq_registered
= 1;
1098 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1100 i8042_free_aux_ports();
1104 static int __devinit
i8042_setup_kbd(void)
1108 error
= i8042_create_kbd_port();
1112 error
= request_irq(I8042_KBD_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1113 "i8042", i8042_platform_device
);
1117 error
= i8042_enable_kbd_port();
1121 i8042_kbd_irq_registered
= 1;
1125 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1127 i8042_free_kbd_port();
1131 static int __devinit
i8042_probe(struct platform_device
*dev
)
1135 error
= i8042_controller_selftest();
1139 error
= i8042_controller_init();
1144 error
= i8042_setup_aux();
1145 if (error
&& error
!= -ENODEV
&& error
!= -EBUSY
)
1150 error
= i8042_setup_kbd();
1156 * Ok, everything is ready, let's register all serio ports
1158 i8042_register_ports();
1163 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1165 i8042_controller_reset();
1170 static int __devexit
i8042_remove(struct platform_device
*dev
)
1172 i8042_unregister_ports();
1174 i8042_controller_reset();
1179 static struct platform_driver i8042_driver
= {
1182 .owner
= THIS_MODULE
,
1184 .probe
= i8042_probe
,
1185 .remove
= __devexit_p(i8042_remove
),
1186 .shutdown
= i8042_shutdown
,
1188 .suspend
= i8042_suspend
,
1189 .resume
= i8042_resume
,
1193 static int __init
i8042_init(void)
1199 err
= i8042_platform_init();
1203 err
= i8042_controller_check();
1205 goto err_platform_exit
;
1207 err
= platform_driver_register(&i8042_driver
);
1209 goto err_platform_exit
;
1211 i8042_platform_device
= platform_device_alloc("i8042", -1);
1212 if (!i8042_platform_device
) {
1214 goto err_unregister_driver
;
1217 err
= platform_device_add(i8042_platform_device
);
1219 goto err_free_device
;
1221 panic_blink
= i8042_panic_blink
;
1226 platform_device_put(i8042_platform_device
);
1227 err_unregister_driver
:
1228 platform_driver_unregister(&i8042_driver
);
1230 i8042_platform_exit();
1235 static void __exit
i8042_exit(void)
1237 platform_device_unregister(i8042_platform_device
);
1238 platform_driver_unregister(&i8042_driver
);
1239 i8042_platform_exit();
1244 module_init(i8042_init
);
1245 module_exit(i8042_exit
);