2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
27 #include <linux/suspend.h>
31 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
32 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
33 MODULE_LICENSE("GPL");
35 static bool i8042_nokbd
;
36 module_param_named(nokbd
, i8042_nokbd
, bool, 0);
37 MODULE_PARM_DESC(nokbd
, "Do not probe or use KBD port.");
39 static bool i8042_noaux
;
40 module_param_named(noaux
, i8042_noaux
, bool, 0);
41 MODULE_PARM_DESC(noaux
, "Do not probe or use AUX (mouse) port.");
43 static bool i8042_nomux
;
44 module_param_named(nomux
, i8042_nomux
, bool, 0);
45 MODULE_PARM_DESC(nomux
, "Do not check whether an active multiplexing controller is present.");
47 static bool i8042_unlock
;
48 module_param_named(unlock
, i8042_unlock
, bool, 0);
49 MODULE_PARM_DESC(unlock
, "Ignore keyboard lock.");
51 enum i8042_controller_reset_mode
{
55 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
57 static enum i8042_controller_reset_mode i8042_reset
= I8042_RESET_DEFAULT
;
58 static int i8042_set_reset(const char *val
, const struct kernel_param
*kp
)
60 enum i8042_controller_reset_mode
*arg
= kp
->arg
;
65 error
= kstrtobool(val
, &reset
);
72 *arg
= reset
? I8042_RESET_ALWAYS
: I8042_RESET_NEVER
;
76 static const struct kernel_param_ops param_ops_reset_param
= {
77 .flags
= KERNEL_PARAM_OPS_FL_NOARG
,
78 .set
= i8042_set_reset
,
80 #define param_check_reset_param(name, p) \
81 __param_check(name, p, enum i8042_controller_reset_mode)
82 module_param_named(reset
, i8042_reset
, reset_param
, 0);
83 MODULE_PARM_DESC(reset
, "Reset controller on resume, cleanup or both");
85 static bool i8042_direct
;
86 module_param_named(direct
, i8042_direct
, bool, 0);
87 MODULE_PARM_DESC(direct
, "Put keyboard port into non-translated mode.");
89 static bool i8042_dumbkbd
;
90 module_param_named(dumbkbd
, i8042_dumbkbd
, bool, 0);
91 MODULE_PARM_DESC(dumbkbd
, "Pretend that controller can only read data from keyboard");
93 static bool i8042_noloop
;
94 module_param_named(noloop
, i8042_noloop
, bool, 0);
95 MODULE_PARM_DESC(noloop
, "Disable the AUX Loopback command while probing for the AUX port");
97 static bool i8042_notimeout
;
98 module_param_named(notimeout
, i8042_notimeout
, bool, 0);
99 MODULE_PARM_DESC(notimeout
, "Ignore timeouts signalled by i8042");
101 static bool i8042_kbdreset
;
102 module_param_named(kbdreset
, i8042_kbdreset
, bool, 0);
103 MODULE_PARM_DESC(kbdreset
, "Reset device connected to KBD port");
106 static bool i8042_dritek
;
107 module_param_named(dritek
, i8042_dritek
, bool, 0);
108 MODULE_PARM_DESC(dritek
, "Force enable the Dritek keyboard extension");
112 static bool i8042_nopnp
;
113 module_param_named(nopnp
, i8042_nopnp
, bool, 0);
114 MODULE_PARM_DESC(nopnp
, "Do not use PNP to detect controller settings");
119 static bool i8042_debug
;
120 module_param_named(debug
, i8042_debug
, bool, 0600);
121 MODULE_PARM_DESC(debug
, "Turn i8042 debugging mode on and off");
123 static bool i8042_unmask_kbd_data
;
124 module_param_named(unmask_kbd_data
, i8042_unmask_kbd_data
, bool, 0600);
125 MODULE_PARM_DESC(unmask_kbd_data
, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
128 static bool i8042_bypass_aux_irq_test
;
129 static char i8042_kbd_firmware_id
[128];
130 static char i8042_aux_firmware_id
[128];
135 * i8042_lock protects serialization between i8042_command and
136 * the interrupt handler.
138 static DEFINE_SPINLOCK(i8042_lock
);
141 * Writers to AUX and KBD ports as well as users issuing i8042_command
142 * directly should acquire i8042_mutex (by means of calling
143 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
144 * they do not disturb each other (unfortunately in many i8042
145 * implementations write to one of the ports will immediately abort
146 * command that is being processed by another port).
148 static DEFINE_MUTEX(i8042_mutex
);
158 #define I8042_KBD_PORT_NO 0
159 #define I8042_AUX_PORT_NO 1
160 #define I8042_MUX_PORT_NO 2
161 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
163 static struct i8042_port i8042_ports
[I8042_NUM_PORTS
];
165 static unsigned char i8042_initial_ctr
;
166 static unsigned char i8042_ctr
;
167 static bool i8042_mux_present
;
168 static bool i8042_kbd_irq_registered
;
169 static bool i8042_aux_irq_registered
;
170 static unsigned char i8042_suppress_kbd_ack
;
171 static struct platform_device
*i8042_platform_device
;
172 static struct notifier_block i8042_kbd_bind_notifier_block
;
174 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
);
175 static bool (*i8042_platform_filter
)(unsigned char data
, unsigned char str
,
176 struct serio
*serio
);
178 void i8042_lock_chip(void)
180 mutex_lock(&i8042_mutex
);
182 EXPORT_SYMBOL(i8042_lock_chip
);
184 void i8042_unlock_chip(void)
186 mutex_unlock(&i8042_mutex
);
188 EXPORT_SYMBOL(i8042_unlock_chip
);
190 int i8042_install_filter(bool (*filter
)(unsigned char data
, unsigned char str
,
191 struct serio
*serio
))
196 spin_lock_irqsave(&i8042_lock
, flags
);
198 if (i8042_platform_filter
) {
203 i8042_platform_filter
= filter
;
206 spin_unlock_irqrestore(&i8042_lock
, flags
);
209 EXPORT_SYMBOL(i8042_install_filter
);
211 int i8042_remove_filter(bool (*filter
)(unsigned char data
, unsigned char str
,
217 spin_lock_irqsave(&i8042_lock
, flags
);
219 if (i8042_platform_filter
!= filter
) {
224 i8042_platform_filter
= NULL
;
227 spin_unlock_irqrestore(&i8042_lock
, flags
);
230 EXPORT_SYMBOL(i8042_remove_filter
);
233 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
234 * be ready for reading values from it / writing values to it.
235 * Called always with i8042_lock held.
238 static int i8042_wait_read(void)
242 while ((~i8042_read_status() & I8042_STR_OBF
) && (i
< I8042_CTL_TIMEOUT
)) {
246 return -(i
== I8042_CTL_TIMEOUT
);
249 static int i8042_wait_write(void)
253 while ((i8042_read_status() & I8042_STR_IBF
) && (i
< I8042_CTL_TIMEOUT
)) {
257 return -(i
== I8042_CTL_TIMEOUT
);
261 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
262 * of the i8042 down the toilet.
265 static int i8042_flush(void)
268 unsigned char data
, str
;
272 spin_lock_irqsave(&i8042_lock
, flags
);
274 while ((str
= i8042_read_status()) & I8042_STR_OBF
) {
275 if (count
++ < I8042_BUFFER_SIZE
) {
277 data
= i8042_read_data();
278 dbg("%02x <- i8042 (flush, %s)\n",
279 data
, str
& I8042_STR_AUXDATA
? "aux" : "kbd");
286 spin_unlock_irqrestore(&i8042_lock
, flags
);
292 * i8042_command() executes a command on the i8042. It also sends the input
293 * parameter(s) of the commands to it, and receives the output value(s). The
294 * parameters are to be stored in the param array, and the output is placed
295 * into the same array. The number of the parameters and output values is
296 * encoded in bits 8-11 of the command number.
299 static int __i8042_command(unsigned char *param
, int command
)
303 if (i8042_noloop
&& command
== I8042_CMD_AUX_LOOP
)
306 error
= i8042_wait_write();
310 dbg("%02x -> i8042 (command)\n", command
& 0xff);
311 i8042_write_command(command
& 0xff);
313 for (i
= 0; i
< ((command
>> 12) & 0xf); i
++) {
314 error
= i8042_wait_write();
317 dbg("%02x -> i8042 (parameter)\n", param
[i
]);
318 i8042_write_data(param
[i
]);
321 for (i
= 0; i
< ((command
>> 8) & 0xf); i
++) {
322 error
= i8042_wait_read();
324 dbg(" -- i8042 (timeout)\n");
328 if (command
== I8042_CMD_AUX_LOOP
&&
329 !(i8042_read_status() & I8042_STR_AUXDATA
)) {
330 dbg(" -- i8042 (auxerr)\n");
334 param
[i
] = i8042_read_data();
335 dbg("%02x <- i8042 (return)\n", param
[i
]);
341 int i8042_command(unsigned char *param
, int command
)
346 spin_lock_irqsave(&i8042_lock
, flags
);
347 retval
= __i8042_command(param
, command
);
348 spin_unlock_irqrestore(&i8042_lock
, flags
);
352 EXPORT_SYMBOL(i8042_command
);
355 * i8042_kbd_write() sends a byte out through the keyboard interface.
358 static int i8042_kbd_write(struct serio
*port
, unsigned char c
)
363 spin_lock_irqsave(&i8042_lock
, flags
);
365 if (!(retval
= i8042_wait_write())) {
366 dbg("%02x -> i8042 (kbd-data)\n", c
);
370 spin_unlock_irqrestore(&i8042_lock
, flags
);
376 * i8042_aux_write() sends a byte out through the aux interface.
379 static int i8042_aux_write(struct serio
*serio
, unsigned char c
)
381 struct i8042_port
*port
= serio
->port_data
;
383 return i8042_command(&c
, port
->mux
== -1 ?
385 I8042_CMD_MUX_SEND
+ port
->mux
);
390 * i8042_port_close attempts to clear AUX or KBD port state by disabling
391 * and then re-enabling it.
394 static void i8042_port_close(struct serio
*serio
)
398 const char *port_name
;
400 if (serio
== i8042_ports
[I8042_AUX_PORT_NO
].serio
) {
401 irq_bit
= I8042_CTR_AUXINT
;
402 disable_bit
= I8042_CTR_AUXDIS
;
405 irq_bit
= I8042_CTR_KBDINT
;
406 disable_bit
= I8042_CTR_KBDDIS
;
410 i8042_ctr
&= ~irq_bit
;
411 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
412 pr_warn("Can't write CTR while closing %s port\n", port_name
);
416 i8042_ctr
&= ~disable_bit
;
417 i8042_ctr
|= irq_bit
;
418 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
419 pr_err("Can't reactivate %s port\n", port_name
);
422 * See if there is any data appeared while we were messing with
425 i8042_interrupt(0, NULL
);
429 * i8042_start() is called by serio core when port is about to finish
430 * registering. It will mark port as existing so i8042_interrupt can
431 * start sending data through it.
433 static int i8042_start(struct serio
*serio
)
435 struct i8042_port
*port
= serio
->port_data
;
443 * i8042_stop() marks serio port as non-existing so i8042_interrupt
444 * will not try to send data to the port that is about to go away.
445 * The function is called by serio core as part of unregister procedure.
447 static void i8042_stop(struct serio
*serio
)
449 struct i8042_port
*port
= serio
->port_data
;
451 port
->exists
= false;
454 * We synchronize with both AUX and KBD IRQs because there is
455 * a (very unlikely) chance that AUX IRQ is raised for KBD port
458 synchronize_irq(I8042_AUX_IRQ
);
459 synchronize_irq(I8042_KBD_IRQ
);
464 * i8042_filter() filters out unwanted bytes from the input data stream.
465 * It is called from i8042_interrupt and thus is running with interrupts
466 * off and i8042_lock held.
468 static bool i8042_filter(unsigned char data
, unsigned char str
,
471 if (unlikely(i8042_suppress_kbd_ack
)) {
472 if ((~str
& I8042_STR_AUXDATA
) &&
473 (data
== 0xfa || data
== 0xfe)) {
474 i8042_suppress_kbd_ack
--;
475 dbg("Extra keyboard ACK - filtered out\n");
480 if (i8042_platform_filter
&& i8042_platform_filter(data
, str
, serio
)) {
481 dbg("Filtered out by platform filter\n");
489 * i8042_interrupt() is the most important function in this driver -
490 * it handles the interrupts from the i8042, and sends incoming bytes
491 * to the upper layers.
494 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
)
496 struct i8042_port
*port
;
499 unsigned char str
, data
;
501 unsigned int port_no
;
505 spin_lock_irqsave(&i8042_lock
, flags
);
507 str
= i8042_read_status();
508 if (unlikely(~str
& I8042_STR_OBF
)) {
509 spin_unlock_irqrestore(&i8042_lock
, flags
);
511 dbg("Interrupt %d, without any data\n", irq
);
516 data
= i8042_read_data();
518 if (i8042_mux_present
&& (str
& I8042_STR_AUXDATA
)) {
519 static unsigned long last_transmit
;
520 static unsigned char last_str
;
523 if (str
& I8042_STR_MUXERR
) {
524 dbg("MUX error, status is %02x, data is %02x\n",
527 * When MUXERR condition is signalled the data register can only contain
528 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
529 * it is not always the case. Some KBCs also report 0xfc when there is
530 * nothing connected to the port while others sometimes get confused which
531 * port the data came from and signal error leaving the data intact. They
532 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
533 * to legacy mode yet, when we see one we'll add proper handling).
534 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
535 * rest assume that the data came from the same serio last byte
536 * was transmitted (if transmission happened not too long ago).
541 if (time_before(jiffies
, last_transmit
+ HZ
/10)) {
545 /* fall through - report timeout */
548 case 0xfe: dfl
= SERIO_TIMEOUT
; data
= 0xfe; break;
549 case 0xff: dfl
= SERIO_PARITY
; data
= 0xfe; break;
553 port_no
= I8042_MUX_PORT_NO
+ ((str
>> 6) & 3);
555 last_transmit
= jiffies
;
558 dfl
= ((str
& I8042_STR_PARITY
) ? SERIO_PARITY
: 0) |
559 ((str
& I8042_STR_TIMEOUT
&& !i8042_notimeout
) ? SERIO_TIMEOUT
: 0);
561 port_no
= (str
& I8042_STR_AUXDATA
) ?
562 I8042_AUX_PORT_NO
: I8042_KBD_PORT_NO
;
565 port
= &i8042_ports
[port_no
];
566 serio
= port
->exists
? port
->serio
: NULL
;
568 filter_dbg(port
->driver_bound
, data
, "<- i8042 (interrupt, %d, %d%s%s)\n",
570 dfl
& SERIO_PARITY
? ", bad parity" : "",
571 dfl
& SERIO_TIMEOUT
? ", timeout" : "");
573 filtered
= i8042_filter(data
, str
, serio
);
575 spin_unlock_irqrestore(&i8042_lock
, flags
);
577 if (likely(port
->exists
&& !filtered
))
578 serio_interrupt(serio
, data
, dfl
);
581 return IRQ_RETVAL(ret
);
585 * i8042_enable_kbd_port enables keyboard port on chip
588 static int i8042_enable_kbd_port(void)
590 i8042_ctr
&= ~I8042_CTR_KBDDIS
;
591 i8042_ctr
|= I8042_CTR_KBDINT
;
593 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
594 i8042_ctr
&= ~I8042_CTR_KBDINT
;
595 i8042_ctr
|= I8042_CTR_KBDDIS
;
596 pr_err("Failed to enable KBD port\n");
604 * i8042_enable_aux_port enables AUX (mouse) port on chip
607 static int i8042_enable_aux_port(void)
609 i8042_ctr
&= ~I8042_CTR_AUXDIS
;
610 i8042_ctr
|= I8042_CTR_AUXINT
;
612 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
613 i8042_ctr
&= ~I8042_CTR_AUXINT
;
614 i8042_ctr
|= I8042_CTR_AUXDIS
;
615 pr_err("Failed to enable AUX port\n");
623 * i8042_enable_mux_ports enables 4 individual AUX ports after
624 * the controller has been switched into Multiplexed mode
627 static int i8042_enable_mux_ports(void)
632 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
633 i8042_command(¶m
, I8042_CMD_MUX_PFX
+ i
);
634 i8042_command(¶m
, I8042_CMD_AUX_ENABLE
);
637 return i8042_enable_aux_port();
641 * i8042_set_mux_mode checks whether the controller has an
642 * active multiplexor and puts the chip into Multiplexed (true)
643 * or Legacy (false) mode.
646 static int i8042_set_mux_mode(bool multiplex
, unsigned char *mux_version
)
649 unsigned char param
, val
;
651 * Get rid of bytes in the queue.
657 * Internal loopback test - send three bytes, they should come back from the
658 * mouse interface, the last should be version.
662 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= val
)
664 param
= val
= multiplex
? 0x56 : 0xf6;
665 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= val
)
667 param
= val
= multiplex
? 0xa4 : 0xa5;
668 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
== val
)
672 * Workaround for interference with USB Legacy emulation
673 * that causes a v10.12 MUX to be found.
679 *mux_version
= param
;
685 * i8042_check_mux() checks whether the controller supports the PS/2 Active
686 * Multiplexing specification by Synaptics, Phoenix, Insyde and
690 static int __init
i8042_check_mux(void)
692 unsigned char mux_version
;
694 if (i8042_set_mux_mode(true, &mux_version
))
697 pr_info("Detected active multiplexing controller, rev %d.%d\n",
698 (mux_version
>> 4) & 0xf, mux_version
& 0xf);
701 * Disable all muxed ports by disabling AUX.
703 i8042_ctr
|= I8042_CTR_AUXDIS
;
704 i8042_ctr
&= ~I8042_CTR_AUXINT
;
706 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
707 pr_err("Failed to disable AUX port, can't use MUX\n");
711 i8042_mux_present
= true;
717 * The following is used to test AUX IRQ delivery.
719 static struct completion i8042_aux_irq_delivered __initdata
;
720 static bool i8042_irq_being_tested __initdata
;
722 static irqreturn_t __init
i8042_aux_test_irq(int irq
, void *dev_id
)
725 unsigned char str
, data
;
728 spin_lock_irqsave(&i8042_lock
, flags
);
729 str
= i8042_read_status();
730 if (str
& I8042_STR_OBF
) {
731 data
= i8042_read_data();
732 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
733 data
, str
& I8042_STR_AUXDATA
? "aux" : "kbd");
734 if (i8042_irq_being_tested
&&
735 data
== 0xa5 && (str
& I8042_STR_AUXDATA
))
736 complete(&i8042_aux_irq_delivered
);
739 spin_unlock_irqrestore(&i8042_lock
, flags
);
741 return IRQ_RETVAL(ret
);
745 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
746 * verifies success by readinng CTR. Used when testing for presence of AUX
749 static int __init
i8042_toggle_aux(bool on
)
754 if (i8042_command(¶m
,
755 on
? I8042_CMD_AUX_ENABLE
: I8042_CMD_AUX_DISABLE
))
758 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
759 for (i
= 0; i
< 100; i
++) {
762 if (i8042_command(¶m
, I8042_CMD_CTL_RCTR
))
765 if (!(param
& I8042_CTR_AUXDIS
) == on
)
773 * i8042_check_aux() applies as much paranoia as it can at detecting
774 * the presence of an AUX interface.
777 static int __init
i8042_check_aux(void)
780 bool irq_registered
= false;
781 bool aux_loop_broken
= false;
786 * Get rid of bytes in the queue.
792 * Internal loopback test - filters out AT-type i8042's. Unfortunately
793 * SiS screwed up and their 5597 doesn't support the LOOP command even
794 * though it has an AUX port.
798 retval
= i8042_command(¶m
, I8042_CMD_AUX_LOOP
);
799 if (retval
|| param
!= 0x5a) {
802 * External connection test - filters out AT-soldered PS/2 i8042's
803 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
804 * 0xfa - no error on some notebooks which ignore the spec
805 * Because it's common for chipsets to return error on perfectly functioning
806 * AUX ports, we test for this only when the LOOP command failed.
809 if (i8042_command(¶m
, I8042_CMD_AUX_TEST
) ||
810 (param
&& param
!= 0xfa && param
!= 0xff))
814 * If AUX_LOOP completed without error but returned unexpected data
818 aux_loop_broken
= true;
822 * Bit assignment test - filters out PS/2 i8042's in AT mode
825 if (i8042_toggle_aux(false)) {
826 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
827 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
830 if (i8042_toggle_aux(true))
834 * Reset keyboard (needed on some laptops to successfully detect
835 * touchpad, e.g., some Gigabyte laptop models with Elantech
838 if (i8042_kbdreset
) {
839 pr_warn("Attempting to reset device connected to KBD port\n");
840 i8042_kbd_write(NULL
, (unsigned char) 0xff);
844 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
845 * used it for a PCI card or somethig else.
848 if (i8042_noloop
|| i8042_bypass_aux_irq_test
|| aux_loop_broken
) {
850 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
851 * is working and hope we are right.
857 if (request_irq(I8042_AUX_IRQ
, i8042_aux_test_irq
, IRQF_SHARED
,
858 "i8042", i8042_platform_device
))
861 irq_registered
= true;
863 if (i8042_enable_aux_port())
866 spin_lock_irqsave(&i8042_lock
, flags
);
868 init_completion(&i8042_aux_irq_delivered
);
869 i8042_irq_being_tested
= true;
872 retval
= __i8042_command(¶m
, I8042_CMD_AUX_LOOP
& 0xf0ff);
874 spin_unlock_irqrestore(&i8042_lock
, flags
);
879 if (wait_for_completion_timeout(&i8042_aux_irq_delivered
,
880 msecs_to_jiffies(250)) == 0) {
882 * AUX IRQ was never delivered so we need to flush the controller to
883 * get rid of the byte we put there; otherwise keyboard may not work.
885 dbg(" -- i8042 (aux irq test timeout)\n");
893 * Disable the interface.
896 i8042_ctr
|= I8042_CTR_AUXDIS
;
897 i8042_ctr
&= ~I8042_CTR_AUXINT
;
899 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
903 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
908 static int i8042_controller_check(void)
911 pr_info("No controller found\n");
918 static int i8042_controller_selftest(void)
924 * We try this 5 times; on some really fragile systems this does not
925 * take the first time...
929 if (i8042_command(¶m
, I8042_CMD_CTL_TEST
)) {
930 pr_err("i8042 controller selftest timeout\n");
934 if (param
== I8042_RET_CTL_TEST
)
937 dbg("i8042 controller selftest: %#x != %#x\n",
938 param
, I8042_RET_CTL_TEST
);
944 * On x86, we don't fail entire i8042 initialization if controller
945 * reset fails in hopes that keyboard port will still be functional
946 * and user will still get a working keyboard. This is especially
947 * important on netbooks. On other arches we trust hardware more.
949 pr_info("giving up on controller selftest, continuing anyway...\n");
952 pr_err("i8042 controller selftest failed\n");
958 * i8042_controller init initializes the i8042 controller, and,
959 * most importantly, sets it into non-xlated mode if that's
963 static int i8042_controller_init(void)
967 unsigned char ctr
[2];
970 * Save the CTR for restore on unload / reboot.
975 pr_err("Unable to get stable CTR read\n");
982 if (i8042_command(&ctr
[n
++ % 2], I8042_CMD_CTL_RCTR
)) {
983 pr_err("Can't read CTR while initializing i8042\n");
987 } while (n
< 2 || ctr
[0] != ctr
[1]);
989 i8042_initial_ctr
= i8042_ctr
= ctr
[0];
992 * Disable the keyboard interface and interrupt.
995 i8042_ctr
|= I8042_CTR_KBDDIS
;
996 i8042_ctr
&= ~I8042_CTR_KBDINT
;
1002 spin_lock_irqsave(&i8042_lock
, flags
);
1003 if (~i8042_read_status() & I8042_STR_KEYLOCK
) {
1005 i8042_ctr
|= I8042_CTR_IGNKEYLOCK
;
1007 pr_warn("Warning: Keylock active\n");
1009 spin_unlock_irqrestore(&i8042_lock
, flags
);
1012 * If the chip is configured into nontranslated mode by the BIOS, don't
1013 * bother enabling translating and be happy.
1016 if (~i8042_ctr
& I8042_CTR_XLATE
)
1017 i8042_direct
= true;
1020 * Set nontranslated mode for the kbd interface if requested by an option.
1021 * After this the kbd interface becomes a simple serial in/out, like the aux
1022 * interface is. We don't do this by default, since it can confuse notebook
1027 i8042_ctr
&= ~I8042_CTR_XLATE
;
1033 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
1034 pr_err("Can't write CTR while initializing i8042\n");
1039 * Flush whatever accumulated while we were disabling keyboard port.
1049 * Reset the controller and reset CRT to the original value set by BIOS.
1052 static void i8042_controller_reset(bool s2r_wants_reset
)
1057 * Disable both KBD and AUX interfaces so they don't get in the way
1060 i8042_ctr
|= I8042_CTR_KBDDIS
| I8042_CTR_AUXDIS
;
1061 i8042_ctr
&= ~(I8042_CTR_KBDINT
| I8042_CTR_AUXINT
);
1063 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
1064 pr_warn("Can't write CTR while resetting\n");
1067 * Disable MUX mode if present.
1070 if (i8042_mux_present
)
1071 i8042_set_mux_mode(false, NULL
);
1074 * Reset the controller if requested.
1077 if (i8042_reset
== I8042_RESET_ALWAYS
||
1078 (i8042_reset
== I8042_RESET_ON_S2RAM
&& s2r_wants_reset
)) {
1079 i8042_controller_selftest();
1083 * Restore the original control register setting.
1086 if (i8042_command(&i8042_initial_ctr
, I8042_CMD_CTL_WCTR
))
1087 pr_warn("Can't restore CTR\n");
1092 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1093 * when kernel panics. Flashing LEDs is useful for users running X who may
1094 * not see the console and will help distinguishing panics from "real"
1097 * Note that DELAY has a limit of 10ms so we will not get stuck here
1098 * waiting for KBC to free up even if KBD interrupt is off
1101 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1103 static long i8042_panic_blink(int state
)
1108 led
= (state
) ? 0x01 | 0x04 : 0;
1109 while (i8042_read_status() & I8042_STR_IBF
)
1111 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1112 i8042_suppress_kbd_ack
= 2;
1113 i8042_write_data(0xed); /* set leds */
1115 while (i8042_read_status() & I8042_STR_IBF
)
1118 dbg("%02x -> i8042 (panic blink)\n", led
);
1119 i8042_write_data(led
);
1127 static void i8042_dritek_enable(void)
1129 unsigned char param
= 0x90;
1132 error
= i8042_command(¶m
, 0x1059);
1134 pr_warn("Failed to enable DRITEK extension: %d\n", error
);
1141 * Here we try to reset everything back to a state we had
1142 * before suspending.
1145 static int i8042_controller_resume(bool s2r_wants_reset
)
1149 error
= i8042_controller_check();
1153 if (i8042_reset
== I8042_RESET_ALWAYS
||
1154 (i8042_reset
== I8042_RESET_ON_S2RAM
&& s2r_wants_reset
)) {
1155 error
= i8042_controller_selftest();
1161 * Restore original CTR value and disable all ports
1164 i8042_ctr
= i8042_initial_ctr
;
1166 i8042_ctr
&= ~I8042_CTR_XLATE
;
1167 i8042_ctr
|= I8042_CTR_AUXDIS
| I8042_CTR_KBDDIS
;
1168 i8042_ctr
&= ~(I8042_CTR_AUXINT
| I8042_CTR_KBDINT
);
1169 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
1170 pr_warn("Can't write CTR to resume, retrying...\n");
1172 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
1173 pr_err("CTR write retry failed\n");
1181 i8042_dritek_enable();
1184 if (i8042_mux_present
) {
1185 if (i8042_set_mux_mode(true, NULL
) || i8042_enable_mux_ports())
1186 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1187 } else if (i8042_ports
[I8042_AUX_PORT_NO
].serio
)
1188 i8042_enable_aux_port();
1190 if (i8042_ports
[I8042_KBD_PORT_NO
].serio
)
1191 i8042_enable_kbd_port();
1193 i8042_interrupt(0, NULL
);
1199 * Here we try to restore the original BIOS settings to avoid
1203 static int i8042_pm_suspend(struct device
*dev
)
1207 if (pm_suspend_via_firmware())
1208 i8042_controller_reset(true);
1210 /* Set up serio interrupts for system wakeup. */
1211 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1212 struct serio
*serio
= i8042_ports
[i
].serio
;
1214 if (serio
&& device_may_wakeup(&serio
->dev
))
1215 enable_irq_wake(i8042_ports
[i
].irq
);
1221 static int i8042_pm_resume_noirq(struct device
*dev
)
1223 if (!pm_resume_via_firmware())
1224 i8042_interrupt(0, NULL
);
1229 static int i8042_pm_resume(struct device
*dev
)
1234 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1235 struct serio
*serio
= i8042_ports
[i
].serio
;
1237 if (serio
&& device_may_wakeup(&serio
->dev
))
1238 disable_irq_wake(i8042_ports
[i
].irq
);
1242 * If platform firmware was not going to be involved in suspend, we did
1243 * not restore the controller state to whatever it had been at boot
1244 * time, so we do not need to do anything.
1246 if (!pm_suspend_via_firmware())
1250 * We only need to reset the controller if we are resuming after handing
1251 * off control to the platform firmware, otherwise we can simply restore
1254 want_reset
= pm_resume_via_firmware();
1256 return i8042_controller_resume(want_reset
);
1259 static int i8042_pm_thaw(struct device
*dev
)
1261 i8042_interrupt(0, NULL
);
1266 static int i8042_pm_reset(struct device
*dev
)
1268 i8042_controller_reset(false);
1273 static int i8042_pm_restore(struct device
*dev
)
1275 return i8042_controller_resume(false);
1278 static const struct dev_pm_ops i8042_pm_ops
= {
1279 .suspend
= i8042_pm_suspend
,
1280 .resume_noirq
= i8042_pm_resume_noirq
,
1281 .resume
= i8042_pm_resume
,
1282 .thaw
= i8042_pm_thaw
,
1283 .poweroff
= i8042_pm_reset
,
1284 .restore
= i8042_pm_restore
,
1287 #endif /* CONFIG_PM */
1290 * We need to reset the 8042 back to original mode on system shutdown,
1291 * because otherwise BIOSes will be confused.
1294 static void i8042_shutdown(struct platform_device
*dev
)
1296 i8042_controller_reset(false);
1299 static int __init
i8042_create_kbd_port(void)
1301 struct serio
*serio
;
1302 struct i8042_port
*port
= &i8042_ports
[I8042_KBD_PORT_NO
];
1304 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
1308 serio
->id
.type
= i8042_direct
? SERIO_8042
: SERIO_8042_XL
;
1309 serio
->write
= i8042_dumbkbd
? NULL
: i8042_kbd_write
;
1310 serio
->start
= i8042_start
;
1311 serio
->stop
= i8042_stop
;
1312 serio
->close
= i8042_port_close
;
1313 serio
->ps2_cmd_mutex
= &i8042_mutex
;
1314 serio
->port_data
= port
;
1315 serio
->dev
.parent
= &i8042_platform_device
->dev
;
1316 strlcpy(serio
->name
, "i8042 KBD port", sizeof(serio
->name
));
1317 strlcpy(serio
->phys
, I8042_KBD_PHYS_DESC
, sizeof(serio
->phys
));
1318 strlcpy(serio
->firmware_id
, i8042_kbd_firmware_id
,
1319 sizeof(serio
->firmware_id
));
1321 port
->serio
= serio
;
1322 port
->irq
= I8042_KBD_IRQ
;
1327 static int __init
i8042_create_aux_port(int idx
)
1329 struct serio
*serio
;
1330 int port_no
= idx
< 0 ? I8042_AUX_PORT_NO
: I8042_MUX_PORT_NO
+ idx
;
1331 struct i8042_port
*port
= &i8042_ports
[port_no
];
1333 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
1337 serio
->id
.type
= SERIO_8042
;
1338 serio
->write
= i8042_aux_write
;
1339 serio
->start
= i8042_start
;
1340 serio
->stop
= i8042_stop
;
1341 serio
->ps2_cmd_mutex
= &i8042_mutex
;
1342 serio
->port_data
= port
;
1343 serio
->dev
.parent
= &i8042_platform_device
->dev
;
1345 strlcpy(serio
->name
, "i8042 AUX port", sizeof(serio
->name
));
1346 strlcpy(serio
->phys
, I8042_AUX_PHYS_DESC
, sizeof(serio
->phys
));
1347 strlcpy(serio
->firmware_id
, i8042_aux_firmware_id
,
1348 sizeof(serio
->firmware_id
));
1349 serio
->close
= i8042_port_close
;
1351 snprintf(serio
->name
, sizeof(serio
->name
), "i8042 AUX%d port", idx
);
1352 snprintf(serio
->phys
, sizeof(serio
->phys
), I8042_MUX_PHYS_DESC
, idx
+ 1);
1353 strlcpy(serio
->firmware_id
, i8042_aux_firmware_id
,
1354 sizeof(serio
->firmware_id
));
1357 port
->serio
= serio
;
1359 port
->irq
= I8042_AUX_IRQ
;
1364 static void __init
i8042_free_kbd_port(void)
1366 kfree(i8042_ports
[I8042_KBD_PORT_NO
].serio
);
1367 i8042_ports
[I8042_KBD_PORT_NO
].serio
= NULL
;
1370 static void __init
i8042_free_aux_ports(void)
1374 for (i
= I8042_AUX_PORT_NO
; i
< I8042_NUM_PORTS
; i
++) {
1375 kfree(i8042_ports
[i
].serio
);
1376 i8042_ports
[i
].serio
= NULL
;
1380 static void __init
i8042_register_ports(void)
1384 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1385 struct serio
*serio
= i8042_ports
[i
].serio
;
1388 printk(KERN_INFO
"serio: %s at %#lx,%#lx irq %d\n",
1390 (unsigned long) I8042_DATA_REG
,
1391 (unsigned long) I8042_COMMAND_REG
,
1392 i8042_ports
[i
].irq
);
1393 serio_register_port(serio
);
1394 device_set_wakeup_capable(&serio
->dev
, true);
1399 static void i8042_unregister_ports(void)
1403 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1404 if (i8042_ports
[i
].serio
) {
1405 serio_unregister_port(i8042_ports
[i
].serio
);
1406 i8042_ports
[i
].serio
= NULL
;
1411 static void i8042_free_irqs(void)
1413 if (i8042_aux_irq_registered
)
1414 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1415 if (i8042_kbd_irq_registered
)
1416 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1418 i8042_aux_irq_registered
= i8042_kbd_irq_registered
= false;
1421 static int __init
i8042_setup_aux(void)
1423 int (*aux_enable
)(void);
1427 if (i8042_check_aux())
1430 if (i8042_nomux
|| i8042_check_mux()) {
1431 error
= i8042_create_aux_port(-1);
1433 goto err_free_ports
;
1434 aux_enable
= i8042_enable_aux_port
;
1436 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
1437 error
= i8042_create_aux_port(i
);
1439 goto err_free_ports
;
1441 aux_enable
= i8042_enable_mux_ports
;
1444 error
= request_irq(I8042_AUX_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1445 "i8042", i8042_platform_device
);
1447 goto err_free_ports
;
1452 i8042_aux_irq_registered
= true;
1456 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1458 i8042_free_aux_ports();
1462 static int __init
i8042_setup_kbd(void)
1466 error
= i8042_create_kbd_port();
1470 error
= request_irq(I8042_KBD_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1471 "i8042", i8042_platform_device
);
1475 error
= i8042_enable_kbd_port();
1479 i8042_kbd_irq_registered
= true;
1483 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1485 i8042_free_kbd_port();
1489 static int i8042_kbd_bind_notifier(struct notifier_block
*nb
,
1490 unsigned long action
, void *data
)
1492 struct device
*dev
= data
;
1493 struct serio
*serio
= to_serio_port(dev
);
1494 struct i8042_port
*port
= serio
->port_data
;
1496 if (serio
!= i8042_ports
[I8042_KBD_PORT_NO
].serio
)
1500 case BUS_NOTIFY_BOUND_DRIVER
:
1501 port
->driver_bound
= true;
1504 case BUS_NOTIFY_UNBIND_DRIVER
:
1505 port
->driver_bound
= false;
1512 static int __init
i8042_probe(struct platform_device
*dev
)
1516 i8042_platform_device
= dev
;
1518 if (i8042_reset
== I8042_RESET_ALWAYS
) {
1519 error
= i8042_controller_selftest();
1524 error
= i8042_controller_init();
1530 i8042_dritek_enable();
1534 error
= i8042_setup_aux();
1535 if (error
&& error
!= -ENODEV
&& error
!= -EBUSY
)
1540 error
= i8042_setup_kbd();
1545 * Ok, everything is ready, let's register all serio ports
1547 i8042_register_ports();
1552 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1554 i8042_controller_reset(false);
1555 i8042_platform_device
= NULL
;
1560 static int i8042_remove(struct platform_device
*dev
)
1562 i8042_unregister_ports();
1564 i8042_controller_reset(false);
1565 i8042_platform_device
= NULL
;
1570 static struct platform_driver i8042_driver
= {
1574 .pm
= &i8042_pm_ops
,
1577 .remove
= i8042_remove
,
1578 .shutdown
= i8042_shutdown
,
1581 static struct notifier_block i8042_kbd_bind_notifier_block
= {
1582 .notifier_call
= i8042_kbd_bind_notifier
,
1585 static int __init
i8042_init(void)
1587 struct platform_device
*pdev
;
1592 err
= i8042_platform_init();
1596 err
= i8042_controller_check();
1598 goto err_platform_exit
;
1600 pdev
= platform_create_bundle(&i8042_driver
, i8042_probe
, NULL
, 0, NULL
, 0);
1602 err
= PTR_ERR(pdev
);
1603 goto err_platform_exit
;
1606 bus_register_notifier(&serio_bus
, &i8042_kbd_bind_notifier_block
);
1607 panic_blink
= i8042_panic_blink
;
1612 i8042_platform_exit();
1616 static void __exit
i8042_exit(void)
1618 platform_device_unregister(i8042_platform_device
);
1619 platform_driver_unregister(&i8042_driver
);
1620 i8042_platform_exit();
1622 bus_unregister_notifier(&serio_bus
, &i8042_kbd_bind_notifier_block
);
1626 module_init(i8042_init
);
1627 module_exit(i8042_exit
);