1 # IOMMU_API always gets selected by whoever wants it.
5 menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
21 bool "Freescale IOMMU support"
24 select GENERIC_ALLOCATOR
26 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
27 PAMU can authorize memory access, remap the memory address, and remap I/O
32 bool "MSM IOMMU Support"
33 depends on ARCH_MSM8X60 || ARCH_MSM8960
36 Support for the IOMMUs found on certain Qualcomm SOCs.
37 These IOMMUs allow virtualization of the address space used by most
38 cores within the multimedia subsystem.
40 If unsure, say N here.
42 config IOMMU_PGTABLES_L2
44 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
48 bool "AMD IOMMU support"
55 depends on X86_64 && PCI && ACPI
57 With this option you can enable support for AMD IOMMU hardware in
58 your system. An IOMMU is a hardware component which provides
59 remapping of DMA memory accesses from devices. With an AMD IOMMU you
60 can isolate the DMA memory of different devices and protect the
61 system from misbehaving device drivers or hardware.
63 You can find out if your system has an AMD IOMMU if you look into
64 your BIOS for an option to enable it or if you have an IVRS ACPI
67 config AMD_IOMMU_STATS
68 bool "Export AMD IOMMU statistics to debugfs"
72 This option enables code in the AMD IOMMU driver to collect various
73 statistics about whats happening in the driver and exports that
74 information to userspace via debugfs.
78 tristate "AMD IOMMU Version 2 driver"
79 depends on AMD_IOMMU && PROFILING
82 This option enables support for the AMD IOMMUv2 features of the IOMMU
83 hardware. Select this option if you want to use devices that support
84 the PCI PRI and PASID interface.
91 bool "Support for Intel IOMMU using DMA Remapping Devices"
92 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
96 DMA remapping (DMAR) devices support enables independent address
97 translations for Direct Memory Access (DMA) from devices.
98 These DMA remapping devices are reported via ACPI tables
99 and include PCI device scope covered by these DMA
102 config INTEL_IOMMU_DEFAULT_ON
104 prompt "Enable Intel DMA Remapping Devices by default"
105 depends on INTEL_IOMMU
107 Selecting this option will enable a DMAR device at boot time if
108 one is found. If this option is not selected, DMAR support can
109 be enabled by passing intel_iommu=on to the kernel.
111 config INTEL_IOMMU_BROKEN_GFX_WA
112 bool "Workaround broken graphics drivers (going away soon)"
113 depends on INTEL_IOMMU && BROKEN && X86
115 Current Graphics drivers tend to use physical address
116 for DMA and avoid using DMA APIs. Setting this config
117 option permits the IOMMU driver to set a unity map for
118 all the OS-visible memory. Hence the driver can continue
119 to use physical addresses for DMA, at least until this
120 option is removed in the 2.6.32 kernel.
122 config INTEL_IOMMU_FLOPPY_WA
124 depends on INTEL_IOMMU && X86
126 Floppy disk drivers are known to bypass DMA API calls
127 thereby failing to work when IOMMU is enabled. This
128 workaround will setup a 1:1 mapping for the first
129 16MiB to make floppy (an ISA device) work.
132 bool "Support for Interrupt Remapping"
133 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
136 Supports Interrupt remapping for IO-APIC and MSI devices.
137 To use x2apic mode in the CPU's which support x2APIC enhancements or
138 to support platforms with CPU's having > 8 bit APIC ID, say Y.
142 bool "OMAP IOMMU Support"
143 depends on ARCH_OMAP2PLUS
147 tristate "OMAP IO Virtual Memory Manager Support"
148 depends on OMAP_IOMMU
150 config OMAP_IOMMU_DEBUG
151 tristate "Export OMAP IOMMU/IOVMM internals in DebugFS"
152 depends on OMAP_IOVMM && DEBUG_FS
154 Select this to see extensive information about
155 the internal state of OMAP IOMMU/IOVMM in debugfs.
157 Say N unless you know you need this.
159 config TEGRA_IOMMU_GART
160 bool "Tegra GART IOMMU Support"
161 depends on ARCH_TEGRA_2x_SOC
164 Enables support for remapping discontiguous physical memory
165 shared with the operating system into contiguous I/O virtual
166 space through the GART (Graphics Address Relocation Table)
167 hardware included on Tegra SoCs.
169 config TEGRA_IOMMU_SMMU
170 bool "Tegra SMMU IOMMU Support"
171 depends on ARCH_TEGRA && TEGRA_AHB
174 Enables support for remapping discontiguous physical memory
175 shared with the operating system into contiguous I/O virtual
176 space through the SMMU (System Memory Management Unit)
177 hardware included on Tegra SoCs.
180 bool "Exynos IOMMU Support"
181 depends on ARCH_EXYNOS && EXYNOS_DEV_SYSMMU
184 Support for the IOMMU(System MMU) of Samsung Exynos application
185 processor family. This enables H/W multimedia accellerators to see
186 non-linear physical memory chunks as a linear memory in their
189 If unsure, say N here.
191 config EXYNOS_IOMMU_DEBUG
192 bool "Debugging log for Exynos IOMMU"
193 depends on EXYNOS_IOMMU
195 Select this to see the detailed log message that shows what
196 happens in the IOMMU driver
198 Say N unless you need kernel log message for IOMMU debugging
200 config SHMOBILE_IPMMU
203 config SHMOBILE_IPMMU_TLB
206 config SHMOBILE_IOMMU
207 bool "IOMMU for Renesas IPMMU/IPMMUI"
211 select ARM_DMA_USE_IOMMU
212 select SHMOBILE_IPMMU
213 select SHMOBILE_IPMMU_TLB
215 Support for Renesas IPMMU/IPMMUI. This option enables
216 remapping of DMA memory accesses from all of the IP blocks
219 Warning: Drivers (including userspace drivers of UIO
220 devices) of the IP blocks on the ICB *must* use addresses
221 allocated from the IPMMU (iova) for DMA with this option
227 prompt "IPMMU/IPMMUI address space size"
228 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
229 depends on SHMOBILE_IOMMU
231 This option sets IPMMU/IPMMUI address space size by
232 adjusting the 1st level page table size. The page table size
233 is calculated as follows:
235 page table size = number of page table entries * 4 bytes
236 number of page table entries = address space size / 1 MiB
238 For example, when the address space size is 2048 MiB, the
239 1st level page table size is 8192 bytes.
241 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
244 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
247 config SHMOBILE_IOMMU_ADDRSIZE_512MB
250 config SHMOBILE_IOMMU_ADDRSIZE_256MB
253 config SHMOBILE_IOMMU_ADDRSIZE_128MB
256 config SHMOBILE_IOMMU_ADDRSIZE_64MB
259 config SHMOBILE_IOMMU_ADDRSIZE_32MB
264 config SHMOBILE_IOMMU_L1SIZE
266 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
267 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
268 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
269 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
270 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
271 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
272 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
274 config SPAPR_TCE_IOMMU
275 bool "sPAPR TCE IOMMU Support"
276 depends on PPC_POWERNV || PPC_PSERIES
279 Enables bits of IOMMU API required by VFIO. The iommu_ops
280 is not implemented as it is not necessary for VFIO.
283 bool "ARM Ltd. System MMU (SMMU) Support"
284 depends on ARM64 || (ARM_LPAE && OF)
286 select ARM_DMA_USE_IOMMU if ARM
288 Support for implementations of the ARM System MMU architecture
289 versions 1 and 2. The driver supports both v7l and v8l table
290 formats with 4k and 64k page sizes.
292 Say Y here if your SoC includes an IOMMU device implementing
293 the ARM SMMU architecture.
295 endif # IOMMU_SUPPORT