8 select IRQ_DOMAIN_HIERARCHY
9 select MULTI_IRQ_HANDLER
14 depends on PCI && PCI_MSI
15 select PCI_MSI_IRQ_DOMAIN
23 select MULTI_IRQ_HANDLER
24 select IRQ_DOMAIN_HIERARCHY
28 select PCI_MSI_IRQ_DOMAIN
33 select IRQ_DOMAIN_HIERARCHY
34 select GENERIC_IRQ_CHIP
39 select MULTI_IRQ_HANDLER
43 default 4 if ARCH_S5PV210
47 The maximum number of VICs available in the system, for
52 select GENERIC_IRQ_CHIP
54 select MULTI_IRQ_HANDLER
59 select GENERIC_IRQ_CHIP
61 select MULTI_IRQ_HANDLER
66 select GENERIC_IRQ_CHIP
71 select GENERIC_IRQ_CHIP
76 select GENERIC_IRQ_CHIP
81 select GENERIC_IRQ_CHIP
86 select GENERIC_IRQ_CHIP
89 config CLPS711X_IRQCHIP
91 depends on ARCH_CLPS711X
93 select MULTI_IRQ_HANDLER
103 select GENERIC_IRQ_CHIP
109 select MULTI_IRQ_HANDLER
111 config RENESAS_INTC_IRQPIN
124 Enables SysCfg Controlled IRQs on STi based platforms.
129 select GENERIC_IRQ_CHIP
131 config VERSATILE_FPGA_IRQ
135 config VERSATILE_FPGA_IRQ_NR
138 depends on VERSATILE_FPGA_IRQ
147 Support for a CROSSBAR ip that precedes the main interrupt controller.
148 The primary irqchip invokes the crossbar's callback which inturn allocates
149 a free irq and configures the IP. Thus the peripheral interrupts are
150 routed to one of the free irqchip interrupt lines.
153 tristate "Keystone 2 IRQ controller IP"
154 depends on ARCH_KEYSTONE
156 Support for Texas Instruments Keystone 2 IRQ controller IP which
157 is part of the Keystone 2 IPC mechanism